diff options
| author | Mike Larkin <mlarkin@cvs.openbsd.org> | 2017-06-20 05:34:42 +0000 |
|---|---|---|
| committer | Mike Larkin <mlarkin@cvs.openbsd.org> | 2017-06-20 05:34:42 +0000 |
| commit | 65a11a78e38059c405506ee81aa8625abd0ebcd6 (patch) | |
| tree | 468926a39ffdd374dee17fd8e44638b5c3cd2a98 /sys/arch/amd64/include | |
| parent | ab801c2810febc20345bc3f776cb8c75aca534e5 (diff) | |
SVM: better cleanbits handling. Fixes an issue on Bulldozer CPUs causing
#TF exceptions during guest VM boot
ok brynet
Diffstat (limited to 'sys/arch/amd64/include')
| -rw-r--r-- | sys/arch/amd64/include/cpu.h | 4 | ||||
| -rw-r--r-- | sys/arch/amd64/include/specialreg.h | 25 |
2 files changed, 26 insertions, 3 deletions
diff --git a/sys/arch/amd64/include/cpu.h b/sys/arch/amd64/include/cpu.h index 10e7292d763..77bfe72b034 100644 --- a/sys/arch/amd64/include/cpu.h +++ b/sys/arch/amd64/include/cpu.h @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu.h,v 1.111 2017/04/14 01:02:28 mlarkin Exp $ */ +/* $OpenBSD: cpu.h,v 1.112 2017/06/20 05:34:41 mlarkin Exp $ */ /* $NetBSD: cpu.h,v 1.1 2003/04/26 18:39:39 fvdl Exp $ */ /*- @@ -78,6 +78,8 @@ struct vmx { */ struct svm { uint32_t svm_max_asid; + uint8_t svm_flush_by_asid; + uint8_t svm_vmcb_clean; }; union vmm_cpu_cap { diff --git a/sys/arch/amd64/include/specialreg.h b/sys/arch/amd64/include/specialreg.h index 06571df0dda..00a8523e690 100644 --- a/sys/arch/amd64/include/specialreg.h +++ b/sys/arch/amd64/include/specialreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: specialreg.h,v 1.56 2017/05/30 17:49:47 mlarkin Exp $ */ +/* $OpenBSD: specialreg.h,v 1.57 2017/06/20 05:34:41 mlarkin Exp $ */ /* $NetBSD: specialreg.h,v 1.1 2003/04/26 18:39:48 fvdl Exp $ */ /* $NetBSD: x86/specialreg.h,v 1.2 2003/04/25 21:54:30 fvdl Exp $ */ @@ -1174,8 +1174,29 @@ #define MSR_AMD_VM_CR 0xc0010114 #define MSR_AMD_VM_HSAVE_PA 0xc0010117 #define CPUID_AMD_SVM_CAP 0x8000000A -#define AMD_SVMDIS 0x10 #define AMD_SVM_NESTED_PAGING_CAP (1 << 0) +#define AMD_SVM_VMCB_CLEAN_CAP (1 << 5) +#define AMD_SVM_FLUSH_BY_ASID_CAP (1 << 6) +#define AMD_SVMDIS 0x10 + +#define SVM_CLEANBITS_I (1 << 0) +#define SVM_CLEANBITS_IOPM (1 << 1) +#define SVM_CLEANBITS_ASID (1 << 2) +#define SVM_CLEANBITS_TPR (1 << 3) +#define SVM_CLEANBITS_NP (1 << 4) +#define SVM_CLEANBITS_CR (1 << 5) +#define SVM_CLEANBITS_DR (1 << 6) +#define SVM_CLEANBITS_DT (1 << 7) +#define SVM_CLEANBITS_SEG (1 << 8) +#define SVM_CLEANBITS_CR2 (1 << 9) +#define SVM_CLEANBITS_LBR (1 << 10) +#define SVM_CLEANBITS_AVIC (1 << 11) + +#define SVM_CLEANBITS_ALL \ + (SVM_CLEANBITS_I | SVM_CLEANBITS_IOPM | SVM_CLEANBITS_ASID | \ + SVM_CLEANBITS_TPR | SVM_CLEANBITS_NP | SVM_CLEANBITS_CR | \ + SVM_CLEANBITS_DR | SVM_CLEANBITS_DT | SVM_CLEANBITS_SEG | \ + SVM_CLEANBITS_CR2 | SVM_CLEANBITS_LBR | SVM_CLEANBITS_AVIC ) /* * SVM : VMCB intercepts |