diff options
| author | Jonathan Gray <jsg@cvs.openbsd.org> | 2018-08-08 05:07:47 +0000 |
|---|---|---|
| committer | Jonathan Gray <jsg@cvs.openbsd.org> | 2018-08-08 05:07:47 +0000 |
| commit | 9a78f3f40369e5ba28e96371c9c5f406ba245836 (patch) | |
| tree | 114b8b9839841574a34eaac0c958f497e93cbb5a /sys/arch/amd64/include | |
| parent | 95cf33e4589b924bf45d1e2627a57c5e8c1769e3 (diff) | |
Recognise 'Speculative Store Bypass Disable' support cpuid bit.
Documented in 'Speculative Execution Side Channel Mitigations'
revision 2.0.
Diffstat (limited to 'sys/arch/amd64/include')
| -rw-r--r-- | sys/arch/amd64/include/specialreg.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/sys/arch/amd64/include/specialreg.h b/sys/arch/amd64/include/specialreg.h index 1b32d30fd9c..37e9bee8f2a 100644 --- a/sys/arch/amd64/include/specialreg.h +++ b/sys/arch/amd64/include/specialreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: specialreg.h,v 1.76 2018/07/23 23:25:03 brynet Exp $ */ +/* $OpenBSD: specialreg.h,v 1.77 2018/08/08 05:07:46 jsg Exp $ */ /* $NetBSD: specialreg.h,v 1.1 2003/04/26 18:39:48 fvdl Exp $ */ /* $NetBSD: x86/specialreg.h,v 1.2 2003/04/25 21:54:30 fvdl Exp $ */ @@ -220,6 +220,7 @@ #define SEFF0EDX_IBRS 0x04000000 /* IBRS / IBPB Speculation Control */ #define SEFF0EDX_STIBP 0x08000000 /* STIBP Speculation Control */ #define SEFF0EDX_ARCH_CAP 0x20000000 /* Has IA32_ARCH_CAPABILITIES MSR */ +#define SEFF0EDX_SSBD 0x80000000 /* Spec Store Bypass Disable */ /* * Thermal and Power Management (CPUID function 0x6) EAX bits |