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authordv <dv@cvs.openbsd.org>2021-04-05 18:26:47 +0000
committerdv <dv@cvs.openbsd.org>2021-04-05 18:26:47 +0000
commitb9bea725d4006d6c1ab10594f1e701de74708387 (patch)
tree235bfefecea343ce6d27bc7cb1b7a34a466ea0a9 /sys/arch/amd64/include
parent0284dd4e4b0f7a4241ac64f4fa13c9809f84363d (diff)
Improve rdmsr/wrmsr exit handling for both AMD SVM and Intel VMX.
At some point, the logic for handling vmexits related to msr access changed and the handling for SVM diverged from VMX. While booting the newest 9front release, abieber@ noticed boot loops on an AMD host. This commit changes the behavior to be the same between SVM and VMX hosts, with the exception of a single MSR, and enforces that any rdmsr instruction must be explicitly handled otherwise a #GP is injected into the guest. Any wrmsr instructions that are not explicitly handled are ignored (%rax, %rdx set to 0). The PAT msr is now shadowed, allowing guests to read a copy of the host PAT. Their writes are stored in guest vcpu state and not passed through to the host cpu. (PAT writes are validated, however, and invalid values inject #GP.) tested by brynet@, abieber@ ok brynet@, mlarkin@
Diffstat (limited to 'sys/arch/amd64/include')
-rw-r--r--sys/arch/amd64/include/vmmvar.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/sys/arch/amd64/include/vmmvar.h b/sys/arch/amd64/include/vmmvar.h
index 4990a5c5343..e29da2d9041 100644
--- a/sys/arch/amd64/include/vmmvar.h
+++ b/sys/arch/amd64/include/vmmvar.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: vmmvar.h,v 1.70 2020/04/08 07:39:48 pd Exp $ */
+/* $OpenBSD: vmmvar.h,v 1.71 2021/04/05 18:26:46 dv Exp $ */
/*
* Copyright (c) 2014 Mike Larkin <mlarkin@openbsd.org>
*
@@ -936,6 +936,9 @@ struct vcpu {
paddr_t vc_pvclock_system_gpa;
uint32_t vc_pvclock_system_tsc_mul;
+ /* Shadowed MSRs */
+ uint64_t vc_shadow_pat;
+
/* VMX only */
uint64_t vc_vmx_basic;
uint64_t vc_vmx_entry_ctls;