diff options
| author | Mike Larkin <mlarkin@cvs.openbsd.org> | 2016-09-03 12:12:44 +0000 |
|---|---|---|
| committer | Mike Larkin <mlarkin@cvs.openbsd.org> | 2016-09-03 12:12:44 +0000 |
| commit | eb308c90c82d87435beafebc847fa7d4a508d9ea (patch) | |
| tree | 0ca1d7793f10ae5677d315e1c82c591e31769a63 /sys/arch/amd64/include | |
| parent | cd52ceccf12704aa6f47a7831fda35ff9d9fd501 (diff) | |
add SDBG to cpuid bits and identcpu
Diffstat (limited to 'sys/arch/amd64/include')
| -rw-r--r-- | sys/arch/amd64/include/specialreg.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/sys/arch/amd64/include/specialreg.h b/sys/arch/amd64/include/specialreg.h index 7669b55d222..6d294f7ce55 100644 --- a/sys/arch/amd64/include/specialreg.h +++ b/sys/arch/amd64/include/specialreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: specialreg.h,v 1.45 2016/07/16 06:20:24 mlarkin Exp $ */ +/* $OpenBSD: specialreg.h,v 1.46 2016/09/03 12:12:43 mlarkin Exp $ */ /* $NetBSD: specialreg.h,v 1.1 2003/04/26 18:39:48 fvdl Exp $ */ /* $NetBSD: x86/specialreg.h,v 1.2 2003/04/25 21:54:30 fvdl Exp $ */ @@ -156,6 +156,7 @@ #define CPUIDECX_TM2 0x00000100 /* thermal monitor 2 */ #define CPUIDECX_SSSE3 0x00000200 /* Supplemental Streaming SIMD Ext. 3 */ #define CPUIDECX_CNXTID 0x00000400 /* Context ID */ +#define CPUIDECX_SDBG 0x00000800 /* Silicon debug capability */ #define CPUIDECX_FMA3 0x00001000 /* Fused Multiply Add */ #define CPUIDECX_CX16 0x00002000 /* has CMPXCHG16B instruction */ #define CPUIDECX_XTPR 0x00004000 /* xTPR Update Control */ |