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authorOwain Ainsworth <oga@cvs.openbsd.org>2010-04-20 19:22:07 +0000
committerOwain Ainsworth <oga@cvs.openbsd.org>2010-04-20 19:22:07 +0000
commit29f073e481c194c218793f207b6e34f134144caf (patch)
treec55fc82cca14e2295faa53c069a40b675cb7a354 /sys/arch/amd64/include
parentbbc9ab4e1014be3fc927f1b2ccc6bd79e93488a7 (diff)
Instead of using PWT|PCD for uncached (which is wrong on old cpus and
HARD uncached on anything since the P3), use just PCD which is UC- (uncached but mtrrs can override it to write combining). Now kernel mappings of WC-mtrred memory actually get write combining memory. the speed up is very very nice. ok kettenis@, deraadt@, beck@ (who likes his scrollbars non-wibbly)
Diffstat (limited to 'sys/arch/amd64/include')
-rw-r--r--sys/arch/amd64/include/pte.h5
1 files changed, 3 insertions, 2 deletions
diff --git a/sys/arch/amd64/include/pte.h b/sys/arch/amd64/include/pte.h
index c14138a7e45..16d51cf4fce 100644
--- a/sys/arch/amd64/include/pte.h
+++ b/sys/arch/amd64/include/pte.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: pte.h,v 1.5 2006/10/16 15:51:26 tom Exp $ */
+/* $OpenBSD: pte.h,v 1.6 2010/04/20 19:22:06 oga Exp $ */
/* $NetBSD: pte.h,v 1.1 2003/04/26 18:39:47 fvdl Exp $ */
/*
@@ -106,7 +106,8 @@ typedef u_int64_t pt_entry_t; /* PTE */
#define PG_RW 0x0000000000000002UL /* read-write */
#define PG_u 0x0000000000000004UL /* user accessible */
#define PG_PROT 0x0000000000000006UL
-#define PG_N 0x0000000000000018UL /* non-cacheable */
+#define PG_WT 0x0000000000000008UL /* write through */
+#define PG_N 0x0000000000000010UL /* non-cacheable */
#define PG_U 0x0000000000000020UL /* used */
#define PG_M 0x0000000000000040UL /* modified */
#define PG_PS 0x0000000000000080UL /* 2MB page size */