diff options
| author | Jonathan Gray <jsg@cvs.openbsd.org> | 2012-03-27 05:59:47 +0000 |
|---|---|---|
| committer | Jonathan Gray <jsg@cvs.openbsd.org> | 2012-03-27 05:59:47 +0000 |
| commit | 0bb312a7f0d39bcc9334f926b048402eac71d3f7 (patch) | |
| tree | ee7bbbb886ccadde764f4ec097586f9d019ebfe7 /sys/arch/amd64/include | |
| parent | 0e32e73a6835575f1f36a6b27373b8a96a360215 (diff) | |
Implement the AMD suggested workaround for family 10h & 12h errata 721
"Processor May Incorrectly Update Stack Pointer" by setting a bit
marked 'reserved' in an MSR that is only "documented" to exist on 12h.
AMD claim this problem can only occur in 64-bit mode, set the workaround
bit on i386 in case this isn't true and in the interest of keeping the
errata in sync between i386/amd64.
ok deraadt@
Diffstat (limited to 'sys/arch/amd64/include')
| -rw-r--r-- | sys/arch/amd64/include/specialreg.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/sys/arch/amd64/include/specialreg.h b/sys/arch/amd64/include/specialreg.h index 3b5839fae74..cbcc256fe05 100644 --- a/sys/arch/amd64/include/specialreg.h +++ b/sys/arch/amd64/include/specialreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: specialreg.h,v 1.20 2011/12/26 23:07:04 haesbaert Exp $ */ +/* $OpenBSD: specialreg.h,v 1.21 2012/03/27 05:59:46 jsg Exp $ */ /* $NetBSD: specialreg.h,v 1.1 2003/04/26 18:39:48 fvdl Exp $ */ /* $NetBSD: x86/specialreg.h,v 1.2 2003/04/25 21:54:30 fvdl Exp $ */ @@ -333,6 +333,9 @@ #define MSR_KERNELGSBASE 0xc0000102 /* storage for swapgs ins */ #define MSR_INT_PEN_MSG 0xc0010055 /* Interrupt pending message */ +#define MSR_DE_CFG 0xc0011029 /* Decode Configuration */ +#define DE_CFG_721 0x00000001 /* errata 721 */ + #define IPM_C1E_CMP_HLT 0x10000000 #define IPM_SMI_CMP_HLT 0x08000000 |