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authorMike Larkin <mlarkin@cvs.openbsd.org>2023-04-26 10:52:56 +0000
committerMike Larkin <mlarkin@cvs.openbsd.org>2023-04-26 10:52:56 +0000
commit80dade83a7d54b328f88bc9000ff317db323e445 (patch)
tree386ccd29fb8b026c4bf7c57aacc76c067f83fb1e /sys/arch/amd64
parent74467dda36c56d42204d3691cb3316921bfcd43f (diff)
whitespace fix
Diffstat (limited to 'sys/arch/amd64')
-rw-r--r--sys/arch/amd64/amd64/lapic.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/sys/arch/amd64/amd64/lapic.c b/sys/arch/amd64/amd64/lapic.c
index a5d6d28832f..da17b0875f7 100644
--- a/sys/arch/amd64/amd64/lapic.c
+++ b/sys/arch/amd64/amd64/lapic.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: lapic.c,v 1.67 2023/03/08 18:05:05 cheloha Exp $ */
+/* $OpenBSD: lapic.c,v 1.68 2023/04/26 10:52:55 mlarkin Exp $ */
/* $NetBSD: lapic.c,v 1.2 2003/05/08 01:04:35 fvdl Exp $ */
/*-
@@ -171,7 +171,6 @@ lapic_cpu_number(void)
return i82489_cpu_number();
}
-
void
lapic_map(paddr_t lapic_base)
{
@@ -292,7 +291,7 @@ lapic_set_lvt(void)
* the local APIC timer dead, so we disable it by reading
* the Interrupt Pending Message register and clearing both
* C1eOnCmpHalt (bit 28) and SmiOnCmpHalt (bit 27).
- *
+ *
* Reference:
* "BIOS and Kernel Developer's Guide for AMD NPT
* Family 0Fh Processors"