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authorJonathan Gray <jsg@cvs.openbsd.org>2008-06-13 00:00:46 +0000
committerJonathan Gray <jsg@cvs.openbsd.org>2008-06-13 00:00:46 +0000
commit1f2334458c66964c60bfd9ad0d09c4f963c40db1 (patch)
tree0e1e9129a4c35f7edaf25d9a403919b3daa635cc /sys/arch/amd64
parente2a4920ea3159df08848a57ba1f12c310f0cf9dd (diff)
Detect if Intel's Safer Mode Extensions (SMX) are present,
See http://download.intel.com/technology/security/downloads/31516804.pdf for more information. ok deraadt@ 'looks ok to me' djm@
Diffstat (limited to 'sys/arch/amd64')
-rw-r--r--sys/arch/amd64/amd64/identcpu.c3
-rw-r--r--sys/arch/amd64/include/specialreg.h3
2 files changed, 4 insertions, 2 deletions
diff --git a/sys/arch/amd64/amd64/identcpu.c b/sys/arch/amd64/amd64/identcpu.c
index ade0a360b9a..458facb5da9 100644
--- a/sys/arch/amd64/amd64/identcpu.c
+++ b/sys/arch/amd64/amd64/identcpu.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: identcpu.c,v 1.14 2007/05/29 07:35:55 tedu Exp $ */
+/* $OpenBSD: identcpu.c,v 1.15 2008/06/13 00:00:45 jsg Exp $ */
/* $NetBSD: identcpu.c,v 1.1 2003/04/26 18:39:28 fvdl Exp $ */
/*
@@ -95,6 +95,7 @@ const struct {
{ CPUIDECX_MWAIT, "MWAIT" },
{ CPUIDECX_DSCPL, "DS-CPL" },
{ CPUIDECX_VMX, "VMX" },
+ { CPUIDECX_SMX, "SMX" },
{ CPUIDECX_EST, "EST" },
{ CPUIDECX_TM2, "TM2" },
{ CPUIDECX_CNXTID, "CNXT-ID" },
diff --git a/sys/arch/amd64/include/specialreg.h b/sys/arch/amd64/include/specialreg.h
index 568d3470051..0fc1094e793 100644
--- a/sys/arch/amd64/include/specialreg.h
+++ b/sys/arch/amd64/include/specialreg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: specialreg.h,v 1.11 2007/06/01 22:28:21 tedu Exp $ */
+/* $OpenBSD: specialreg.h,v 1.12 2008/06/13 00:00:45 jsg Exp $ */
/* $NetBSD: specialreg.h,v 1.1 2003/04/26 18:39:48 fvdl Exp $ */
/* $NetBSD: x86/specialreg.h,v 1.2 2003/04/25 21:54:30 fvdl Exp $ */
@@ -126,6 +126,7 @@
#define CPUIDECX_MWAIT 0x00000008 /* Monitor/Mwait */
#define CPUIDECX_DSCPL 0x00000010 /* CPL Qualified Debug Store */
#define CPUIDECX_VMX 0x00000020 /* Virtual Machine Extensions */
+#define CPUIDECX_SMX 0x00000040 /* Safer Mode Extensions */
#define CPUIDECX_EST 0x00000080 /* enhanced SpeedStep */
#define CPUIDECX_TM2 0x00000100 /* thermal monitor 2 */
#define CPUIDECX_CNXTID 0x00000400 /* Context ID */