diff options
author | Niklas Hallqvist <niklas@cvs.openbsd.org> | 1996-05-29 10:15:55 +0000 |
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committer | Niklas Hallqvist <niklas@cvs.openbsd.org> | 1996-05-29 10:15:55 +0000 |
commit | ef9b5449c466470e5241ed75226f1d70921ec10c (patch) | |
tree | eed1e5d5c1692c582fe6a670ff97f50c75f1a66c /sys/arch/amiga/dev/clock.c | |
parent | a7586fe5b7fc8cab4fec3c60ca9dc5f2dcdd8627 (diff) |
Merge of 960526 NetBSD
Diffstat (limited to 'sys/arch/amiga/dev/clock.c')
-rw-r--r-- | sys/arch/amiga/dev/clock.c | 94 |
1 files changed, 72 insertions, 22 deletions
diff --git a/sys/arch/amiga/dev/clock.c b/sys/arch/amiga/dev/clock.c index 8f307f3316a..b015a7573b4 100644 --- a/sys/arch/amiga/dev/clock.c +++ b/sys/arch/amiga/dev/clock.c @@ -1,5 +1,5 @@ -/* $OpenBSD: clock.c,v 1.6 1996/05/02 06:43:37 niklas Exp $ */ -/* $NetBSD: clock.c,v 1.13 1996/04/21 21:10:57 veego Exp $ */ +/* $OpenBSD: clock.c,v 1.7 1996/05/29 10:14:49 niklas Exp $ */ +/* $NetBSD: clock.c,v 1.15 1996/05/10 14:30:53 is Exp $ */ /* * Copyright (c) 1988 University of Utah. @@ -53,6 +53,9 @@ #include <amiga/amiga/device.h> #include <amiga/amiga/custom.h> #include <amiga/amiga/cia.h> +#ifdef DRACO +#include <amiga/amiga/drcustom.h> +#endif #include <amiga/amiga/isr.h> #include <amiga/dev/rtc.h> #include <amiga/dev/zbusvar.h> @@ -69,6 +72,7 @@ extern void hardclock(); #define CLK_INTERVAL amiga_clk_interval int amiga_clk_interval; int eclockfreq; +struct CIA *clockcia; #if defined(IPL_REMAP_1) || defined(IPL_REMAP_2) /* @@ -114,7 +118,11 @@ clockmatch(pdp, match, auxp) void *match, *auxp; { - if (matchname("clock", auxp)) + if (matchname("clock", auxp) +#ifdef DRACO + && (is_draco() < 4) +#endif + ) return(1); return(0); } @@ -128,20 +136,32 @@ clockattach(pdp, dp, auxp) void *auxp; { unsigned short interval; + char cia; if (eclockfreq == 0) eclockfreq = 715909; /* guess NTSC */ CLK_INTERVAL = (eclockfreq / 100); - printf(": system hz %d hardware hz %d\n", hz, eclockfreq); +#ifdef DRACO + if (is_draco()) { + clockcia = (struct CIA *)CIAAbase; + cia = 'A'; + } else +#endif + { + clockcia = (struct CIA *)CIABbase; + cia = 'B'; + } + + printf(": CIA %c system hz %d hardware hz %d\n", cia, hz, eclockfreq); /* * stop timer A */ - ciab.cra = ciab.cra & 0xc0; - ciab.icr = 1 << 0; /* disable timer A interrupt */ - interval = ciab.icr; /* and make sure it's clear */ + clockcia->cra = clockcia->cra & 0xc0; + clockcia->icr = 1 << 0; /* disable timer A interrupt */ + interval = clockcia->icr; /* and make sure it's clear */ /* * load interval into registers. @@ -153,8 +173,8 @@ clockattach(pdp, dp, auxp) /* * order of setting is important ! */ - ciab.talo = interval & 0xff; - ciab.tahi = interval >> 8; + clockcia->talo = interval & 0xff; + clockcia->tahi = interval >> 8; } #if defined(IPL_REMAP_1) || defined(IPL_REMAP_2) @@ -180,12 +200,12 @@ cpu_initclocks() /* * enable interrupts for timer A */ - ciab.icr = (1<<7) | (1<<0); + clcokcia.icr = (1<<7) | (1<<0); /* * start timer A in continuous shot mode */ - ciab.cra = (ciab.cra & 0xc0) | 1; + clockcia.cra = (clockcia.cra & 0xc0) | 1; #if defined(IPL_REMAP_1) || defined(IPL_REMAP_2) isr.isr_intr = clockintr; @@ -196,7 +216,12 @@ cpu_initclocks() /* * and globally enable interrupts for ciab */ - custom.intena = INTF_SETCLR | INTF_EXTER; +#ifdef DRACO + if (is_draco()) /* we use cia a on DraCo */ + *draco_intena |= DRIRQ_INT2; + else +#endif + custom.intena = INTF_SETCLR | INTF_EXTER; #endif } @@ -216,11 +241,11 @@ clkread() u_char hi, hi2, lo; u_int interval; - hi = ciab.tahi; - lo = ciab.talo; - hi2 = ciab.tahi; + hi = clockcia->tahi; + lo = clockcia->talo; + hi2 = clockcia->tahi; if (hi != hi2) { - lo = ciab.talo; + lo = clockcia->talo; hi = hi2; } @@ -244,6 +269,10 @@ u_int micspertick; void setmicspertick() { +#ifdef DRACO + if (is_draco()) + return; /* XXX */ +#endif micspertick = (1000000ULL << 20) / 715909; /* @@ -279,6 +308,12 @@ delay(mic) { u_int temp; +#ifdef DRACO + if (is_draco()) { + DELAY(mic); + return; + } +#endif if (micspertick == 0) setmicspertick(); @@ -362,6 +397,13 @@ DELAY(mic) u_long n; short hpos; +#ifdef DRACO + if (is_draco()) { + while (--mic > 0) + n = *draco_intena; + return; + } +#endif /* * this function uses HSync pulses as base units. The custom chips * display only deals with 31.6kHz/2 refresh, this gives us a @@ -615,7 +657,7 @@ startprofclock() unsigned short interval; /* stop timer B */ - ciab.crb = ciab.crb & 0xc0; + clockcia->crb = clockcia->crb & 0xc0; /* load interval into registers. the clocks run at NTSC: 715.909kHz or PAL: 709.379kHz */ @@ -623,20 +665,20 @@ startprofclock() interval = profint - 1; /* order of setting is important ! */ - ciab.tblo = interval & 0xff; - ciab.tbhi = interval >> 8; + clockcia->tblo = interval & 0xff; + clockcia->tbhi = interval >> 8; /* enable interrupts for timer B */ - ciab.icr = (1<<7) | (1<<1); + clockcia->icr = (1<<7) | (1<<1); /* start timer B in continuous shot mode */ - ciab.crb = (ciab.crb & 0xc0) | 1; + clockcia->crb = (clockcia->crb & 0xc0) | 1; } stopprofclock() { /* stop timer B */ - ciab.crb = ciab.crb & 0xc0; + clockcia->crb = clockcia->crb & 0xc0; } #ifdef PROF @@ -727,6 +769,14 @@ int rtcinit() { clockaddr = (void *)ztwomap(0xdc0000); +#ifdef DRACO + if (is_draco()) { + /* XXX to be done */ + gettod = (void *)0; + settod = (void *)0; + return 0; + } else +#endif if (is_a3000() || is_a4000()) { if (a3gettod() == 0) return(0); |