Merge of 960526 NetBSD

28 files changed, 3680 insertions, 1282 deletions

diff --git a/sys/arch/amiga/dev/clock.c b/sys/arch/amiga/dev/clock.c
index 8f307f3316a..b015a7573b4 100644
--- a/sys/arch/amiga/dev/clock.c
+++ b/sys/arch/amiga/dev/clock.c
@@ -1,5 +1,5 @@
-/*	$OpenBSD: clock.c,v 1.6 1996/05/02 06:43:37 niklas Exp $	*/
-/*	$NetBSD: clock.c,v 1.13 1996/04/21 21:10:57 veego Exp $	*/
+/*	$OpenBSD: clock.c,v 1.7 1996/05/29 10:14:49 niklas Exp $	*/
+/*	$NetBSD: clock.c,v 1.15 1996/05/10 14:30:53 is Exp $	*/
 
 /*
  * Copyright (c) 1988 University of Utah.
@@ -53,6 +53,9 @@
 #include <amiga/amiga/device.h>
 #include <amiga/amiga/custom.h>
 #include <amiga/amiga/cia.h>
+#ifdef DRACO
+#include <amiga/amiga/drcustom.h>
+#endif
 #include <amiga/amiga/isr.h>
 #include <amiga/dev/rtc.h>
 #include <amiga/dev/zbusvar.h>
@@ -69,6 +72,7 @@ extern void hardclock();
 #define CLK_INTERVAL amiga_clk_interval
 int amiga_clk_interval;
 int eclockfreq;
+struct CIA *clockcia;
 
 #if defined(IPL_REMAP_1) || defined(IPL_REMAP_2)
 /*
@@ -114,7 +118,11 @@ clockmatch(pdp, match, auxp)
 	void *match, *auxp;
 {
 
-	if (matchname("clock", auxp))
+	if (matchname("clock", auxp)
+#ifdef DRACO
+	    && (is_draco() < 4)
+#endif
+	    )
 		return(1);
 	return(0);
 }
@@ -128,20 +136,32 @@ clockattach(pdp, dp, auxp)
 	void *auxp;
 {
 	unsigned short interval;
+	char cia;
 
 	if (eclockfreq == 0)
 		eclockfreq = 715909;	/* guess NTSC */
 		
 	CLK_INTERVAL = (eclockfreq / 100);
 
-	printf(": system hz %d hardware hz %d\n", hz, eclockfreq);
+#ifdef DRACO
+	if (is_draco()) {
+		clockcia = (struct CIA *)CIAAbase;
+		cia = 'A';
+	} else 
+#endif
+	{
+		clockcia = (struct CIA *)CIABbase;
+		cia = 'B';
+	}
+
+	printf(": CIA %c system hz %d hardware hz %d\n", cia, hz, eclockfreq);
 
 	/*
 	 * stop timer A 
 	 */
-	ciab.cra = ciab.cra & 0xc0;
-	ciab.icr = 1 << 0;		/* disable timer A interrupt */
-	interval = ciab.icr;		/* and make sure it's clear */
+	clockcia->cra = clockcia->cra & 0xc0;
+	clockcia->icr = 1 << 0;		/* disable timer A interrupt */
+	interval = clockcia->icr;		/* and make sure it's clear */
 
 	/*
 	 * load interval into registers.
@@ -153,8 +173,8 @@ clockattach(pdp, dp, auxp)
 	/*
 	 * order of setting is important !
 	 */
-	ciab.talo = interval & 0xff;
-	ciab.tahi = interval >> 8;
+	clockcia->talo = interval & 0xff;
+	clockcia->tahi = interval >> 8;
 }
 
 #if defined(IPL_REMAP_1) || defined(IPL_REMAP_2)
@@ -180,12 +200,12 @@ cpu_initclocks()
 	/*
 	 * enable interrupts for timer A
 	 */
-	ciab.icr = (1<<7) | (1<<0);
+	clcokcia.icr = (1<<7) | (1<<0);
 
 	/*
 	 * start timer A in continuous shot mode
 	 */
-	ciab.cra = (ciab.cra & 0xc0) | 1;
+	clockcia.cra = (clockcia.cra & 0xc0) | 1;
   
 #if defined(IPL_REMAP_1) || defined(IPL_REMAP_2)
 	isr.isr_intr = clockintr;
@@ -196,7 +216,12 @@ cpu_initclocks()
 	/*
 	 * and globally enable interrupts for ciab
 	 */
-	custom.intena = INTF_SETCLR | INTF_EXTER;
+#ifdef DRACO
+	if (is_draco())		/* we use cia a on DraCo */
+		*draco_intena |= DRIRQ_INT2;
+	else
+#endif
+		custom.intena = INTF_SETCLR | INTF_EXTER;
 #endif
 }
 
@@ -216,11 +241,11 @@ clkread()
 	u_char hi, hi2, lo;
 	u_int interval;
    
-	hi  = ciab.tahi;
-	lo  = ciab.talo;
-	hi2 = ciab.tahi;
+	hi  = clockcia->tahi;
+	lo  = clockcia->talo;
+	hi2 = clockcia->tahi;
 	if (hi != hi2) {
-		lo = ciab.talo;
+		lo = clockcia->talo;
 		hi = hi2;
 	}
 
@@ -244,6 +269,10 @@ u_int micspertick;
 void
 setmicspertick()
 {
+#ifdef DRACO
+	if (is_draco())
+		return;	/* XXX */
+#endif
 	micspertick = (1000000ULL << 20) / 715909;
 
 	/*
@@ -279,6 +308,12 @@ delay(mic)
 {
 	u_int temp;
 
+#ifdef DRACO
+	if (is_draco()) {
+		DELAY(mic);
+		return;
+	}
+#endif
 	if (micspertick == 0)
 		setmicspertick();
 
@@ -362,6 +397,13 @@ DELAY(mic)
 	u_long n;
 	short hpos;
 
+#ifdef DRACO
+	if (is_draco()) {
+		while (--mic > 0)
+			n = *draco_intena;
+		return;
+	}
+#endif
 	/*
 	 * this function uses HSync pulses as base units. The custom chips 
 	 * display only deals with 31.6kHz/2 refresh, this gives us a
@@ -615,7 +657,7 @@ startprofclock()
   unsigned short interval;
 
   /* stop timer B */
-  ciab.crb = ciab.crb & 0xc0;
+  clockcia->crb = clockcia->crb & 0xc0;
 
   /* load interval into registers.
      the clocks run at NTSC: 715.909kHz or PAL: 709.379kHz */
@@ -623,20 +665,20 @@ startprofclock()
   interval = profint - 1;
 
   /* order of setting is important ! */
-  ciab.tblo = interval & 0xff;
-  ciab.tbhi = interval >> 8;
+  clockcia->tblo = interval & 0xff;
+  clockcia->tbhi = interval >> 8;
 
   /* enable interrupts for timer B */
-  ciab.icr = (1<<7) | (1<<1);
+  clockcia->icr = (1<<7) | (1<<1);
 
   /* start timer B in continuous shot mode */
-  ciab.crb = (ciab.crb & 0xc0) | 1;
+  clockcia->crb = (clockcia->crb & 0xc0) | 1;
 }
 
 stopprofclock()
 {
   /* stop timer B */
-  ciab.crb = ciab.crb & 0xc0;
+  clockcia->crb = clockcia->crb & 0xc0;
 }
 
 #ifdef PROF
@@ -727,6 +769,14 @@ int
 rtcinit()
 {
 	clockaddr = (void *)ztwomap(0xdc0000);
+#ifdef DRACO
+	if (is_draco()) {
+		/* XXX to be done */
+		gettod = (void *)0;
+		settod = (void *)0;
+		return 0;
+	} else
+#endif
 	if (is_a3000() || is_a4000()) {
 		if (a3gettod() == 0)
 			return(0);
diff --git a/sys/arch/amiga/dev/drsc.c b/sys/arch/amiga/dev/drsc.c
new file mode 100644
index 00000000000..e4304a6a5b4
--- /dev/null
+++ b/sys/arch/amiga/dev/drsc.c
@@ -0,0 +1,232 @@
+/*	$NetBSD: drsc.c,v 1.2 1996/05/19 19:03:01 is Exp $	*/
+
+/*
+ * Copyright (c) 1996 Ignatios Souvatzis
+ * Copyright (c) 1994 Michael L. Hitch
+ * Copyright (c) 1982, 1990 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the University of
+ *	California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	@(#)dma.c
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/device.h>
+#include <scsi/scsi_all.h>
+#include <scsi/scsiconf.h>
+#include <amiga/amiga/custom.h>
+#include <amiga/amiga/cc.h>
+#include <amiga/amiga/device.h>
+#include <amiga/amiga/isr.h>
+#include <amiga/dev/siopreg.h>
+#include <amiga/dev/siopvar.h>
+#include <amiga/amiga/drcustom.h>
+
+int drscprint __P((void *auxp, char *));
+void drscattach __P((struct device *, struct device *, void *));
+int drscmatch __P((struct device *, void *, void *));
+int drsc_dmaintr __P((struct siop_softc *));
+#ifdef DEBUG
+void drsc_dump __P((void));
+#endif
+
+struct scsi_adapter drsc_scsiswitch = {
+	siop_scsicmd,
+	siop_minphys,
+	0,			/* no lun support */
+	0,			/* no lun support */
+};
+
+struct scsi_device drsc_scsidev = {
+	NULL,		/* use default error handler */
+	NULL,		/* do not have a start functio */
+	NULL,		/* have no async handler */
+	NULL,		/* Use default done routine */
+};
+
+
+#ifdef DEBUG
+#endif
+
+struct cfattach drsc_ca = {
+	sizeof(struct siop_softc),
+	drscmatch,
+	drscattach
+};
+
+struct cfdriver drsc_cd = {
+	NULL, "drsc", DV_DULL, NULL, 0 
+};
+
+static struct siop_softc *drsc_softc;
+
+/*
+ * One of us is on every DraCo motherboard, 
+ */
+int
+drscmatch(pdp, match, auxp)
+	struct device *pdp;
+	void *match, *auxp;
+{
+	struct cfdata *cdp = (struct cfdata *)match;
+	if (is_draco() && (cdp->cf_unit == 0))
+		return(1);
+	return(0);
+}
+
+void
+drscattach(pdp, dp, auxp)
+	struct device *pdp, *dp;
+	void *auxp;
+{
+	struct siop_softc *sc;
+	struct zbus_args *zap;
+	siop_regmap_p rp;
+
+	printf("\n");
+
+	zap = auxp;
+
+	sc = (struct siop_softc *)dp;
+	sc->sc_siopp = rp = (siop_regmap_p)(DRCCADDR+NBPG*DRSCSIPG);
+
+	/*
+	 * CTEST7 = TT1
+	 */
+	sc->sc_clock_freq = 50;		/* Clock = 50MHz */
+	sc->sc_ctest7 = 0x02;
+
+	alloc_sicallback();
+
+	sc->sc_link.adapter_softc = sc;
+	sc->sc_link.adapter_target = 7;
+	sc->sc_link.adapter = &drsc_scsiswitch;
+	sc->sc_link.device = &drsc_scsidev;
+	sc->sc_link.openings = 2;
+
+	siopinitialize(sc);
+
+#if 0
+	sc->sc_isr.isr_intr = drsc_dmaintr;
+	sc->sc_isr.isr_arg = sc;
+	sc->sc_isr.isr_ipl = 4;
+	add_isr(&sc->sc_isr);
+#else
+	drsc_softc = sc;
+	*draco_intpen &= ~DRIRQ_SCSI;
+	*draco_intena |= DRIRQ_SCSI;
+#endif
+	/*
+	 * attach all scsi units on us
+	 */
+	config_found(dp, &sc->sc_link, drscprint);
+}
+
+/*
+ * print diag if pnp is NULL else just extra
+ */
+int
+drscprint(auxp, pnp)
+	void *auxp;
+	char *pnp;
+{
+	if (pnp == NULL)
+		return(UNCONF);
+	return(QUIET);
+}
+
+
+/*
+ * Level 4 interrupt processing for the MacroSystem DraCo mainboard
+ * SCSI.  Because the level 4 interrupt is above splbio, the
+ * interrupt status is saved and an sicallback to the level 2 interrupt
+ * handler scheduled.  This way, the actual processing of the interrupt
+ * can be deferred until splbio is unblocked.
+ */
+
+void
+drsc_handler()
+{
+	struct siop_softc *sc = drsc_softc;
+
+	siop_regmap_p rp;
+	int istat;
+
+	if (sc->sc_flags & SIOP_INTSOFF)
+		return;		/* interrupts are not active */
+
+	rp = sc->sc_siopp;
+	istat = rp->siop_istat;
+
+	if ((istat & (SIOP_ISTAT_SIP | SIOP_ISTAT_DIP)) == 0)
+		return;
+
+	/*
+	 * save interrupt status, DMA status, and SCSI status 0
+	 * (may need to deal with stacked interrupts?)
+	 */
+	sc->sc_sstat0 = rp->siop_sstat0;
+	sc->sc_istat = istat;
+	sc->sc_dstat = rp->siop_dstat;
+	/*
+	 * disable interrupts until the callback can process this
+	 * interrupt.
+	 */
+#ifdef DRSC_NOCALLBACK
+	(void)spl1();
+	siopintr(sc);
+#else
+	rp->siop_sien = 0;
+	rp->siop_dien = 0;
+	sc->sc_flags |= SIOP_INTDEFER | SIOP_INTSOFF;
+	*draco_intpen &= ~DRIRQ_SCSI;
+#ifdef DEBUG
+	if (*draco_intpen & DRIRQ_SCSI)
+		printf("%s: intpen still 0x%x\n", sc->sc_dev.dv_xname,
+		    *draco_intpen);
+#endif
+	add_sicallback((sifunc_t)siopintr, sc, NULL);
+#endif
+	return;
+}
+
+#ifdef DEBUG
+void
+drsc_dump()
+{
+	int i;
+
+	for (i = 0; i < drsc_cd.cd_ndevs; ++i)
+		if (drsc_cd.cd_devs[i])
+			siop_dump(drsc_cd.cd_devs[i]);
+}
+#endif
diff --git a/sys/arch/amiga/dev/empsc.c b/sys/arch/amiga/dev/empsc.c
index b035ebeef3b..7af2b5ab94f 100644
--- a/sys/arch/amiga/dev/empsc.c
+++ b/sys/arch/amiga/dev/empsc.c
@@ -1,5 +1,5 @@
-/*	$OpenBSD: empsc.c,v 1.2 1996/05/02 06:43:37 niklas Exp $ */
-/*	$NetBSD: empsc.c,v 1.5 1996/04/21 21:10:59 veego Exp $	*/
+/*	$OpenBSD: empsc.c,v 1.3 1996/05/29 10:14:51 niklas Exp $ */
+/*	$NetBSD: empsc.c,v 1.7 1996/05/10 13:02:33 is Exp $	*/
 
 /*
 
diff --git a/sys/arch/amiga/dev/grf.c b/sys/arch/amiga/dev/grf.c
index 473fb36d936..07a2fac3086 100644
--- a/sys/arch/amiga/dev/grf.c
+++ b/sys/arch/amiga/dev/grf.c
@@ -1,5 +1,5 @@
-/*	$OpenBSD: grf.c,v 1.4 1996/05/02 06:43:42 niklas Exp $	*/
-/*	$NetBSD: grf.c,v 1.26 1996/04/21 21:11:07 veego Exp $	*/
+/*	$OpenBSD: grf.c,v 1.5 1996/05/29 10:14:54 niklas Exp $	*/
+/*	$NetBSD: grf.c,v 1.27 1996/05/19 20:06:20 is Exp $	*/
 
 /*
  * Copyright (c) 1988 University of Utah.
@@ -63,6 +63,7 @@
 #include <vm/vm_page.h>
 #include <vm/vm_pager.h>
 #include <machine/cpu.h>
+#include <machine/fbio.h>
 #include <amiga/amiga/color.h>	/* DEBUG */
 #include <amiga/amiga/device.h>
 #include <amiga/dev/grfioctl.h>
@@ -279,6 +280,10 @@ grfioctl(dev, cmd, data, flag, p)
 		 * information for grf_ul.
 		 */
 		return(gp->g_mode(gp, GM_GRFIOCTL, data, cmd, dev));
+
+	case FBIOSVIDEO:
+		return(gp->g_mode(gp, GM_GRFIOCTL, data, GRFIOCBLANK, dev));
+
 	default:
 #if NVIEW > 0
 		/*
diff --git a/sys/arch/amiga/dev/grf_cl.c b/sys/arch/amiga/dev/grf_cl.c
index bd378751cf6..9a51bc639f5 100644
--- a/sys/arch/amiga/dev/grf_cl.c
+++ b/sys/arch/amiga/dev/grf_cl.c
@@ -1,5 +1,5 @@
-/*	$OpenBSD: grf_cl.c,v 1.4 1996/05/02 06:43:44 niklas Exp $	*/
-/*      $NetBSD: grf_cl.c,v 1.10 1996/04/28 06:31:47 mhitch Exp $        */
+/*	$OpenBSD: grf_cl.c,v 1.5 1996/05/29 10:14:57 niklas Exp $	*/
+/*      $NetBSD: grf_cl.c,v 1.11 1996/05/19 21:05:20 veego Exp $        */
 
 /*
  * Copyright (c) 1995 Ezra Story
@@ -80,7 +80,7 @@
 
 static int cl_mondefok __P((struct grfvideo_mode *));
 static void cl_boardinit __P((struct grf_softc *));
-static void CompFQ __P((u_int, u_char *, u_char *));
+static void cl_CompFQ __P((u_int, u_char *, u_char *));
 static int cl_getvmode __P((struct grf_softc *, struct grfvideo_mode *));
 static int cl_setvmode __P((struct grf_softc *, unsigned int));
 static int cl_toggle __P((struct grf_softc *, unsigned short));
@@ -143,7 +143,8 @@ unsigned char clconscolors[3][3] = {	/* background, foreground, hilite */
 	{0, 0x40, 0x50}, {152, 152, 152}, {255, 255, 255}
 };
 
-int     cltype = 0;		/* Picasso, Spectrum or Piccolo */
+int	cltype = 0;		/* Picasso, Spectrum or Piccolo */
+int	cl_sd64 = 0;
 unsigned char pass_toggle;	/* passthru status tracker */
 
 /* because all 5426-boards have 2 configdev entries, one for
@@ -187,6 +188,7 @@ grfclmatch(pdp, match, auxp)
 #endif
 	struct zbus_args *zap;
 	static int regprod, fbprod;
+	int error;
 
 	zap = auxp;
 
@@ -200,25 +202,42 @@ grfclmatch(pdp, match, auxp)
 	 * multiple boards at the same time.  */
 	if (cltype == 0) {
 		switch (zap->manid) {
-		case PICASSO:
+		    case PICASSO:
 			if (zap->prodid != 12 && zap->prodid != 11)
 				return (0);
 			regprod = 12;
 			fbprod = 11;
 			break;
-		case SPECTRUM:
+		    case SPECTRUM:
 			if (zap->prodid != 2 && zap->prodid != 1)
 				return (0);
 			regprod = 2;
 			fbprod = 1;
 			break;
-		case PICCOLO:
-			if (zap->prodid != 6 && zap->prodid != 5)
-				return (0);
-			regprod = 6;
-			fbprod = 5;
-			break;
-		default:
+		    case PICCOLO:
+			switch (zap->prodid) {
+			    case 5:
+			    case 6:
+				regprod = 6;
+				fbprod = 5;
+				error = 0;
+				break;
+			    case 10:
+			    case 11:
+				regprod = 11;
+				fbprod = 10;
+				cl_sd64 = 1;
+				error = 0;
+				break;
+		    	    default:
+				error = 1;
+				break;
+			}
+			if (error == 1)
+			    return (0);
+			else
+			    break;
+		    default:
 			return (0);
 		}
 		cltype = zap->manid;
@@ -303,17 +322,25 @@ grfclattach(pdp, dp, auxp)
 		attachflag = 1;
 		printf("grfcl: %dMB ", cl_fbsize / 0x100000);
 		switch (cltype) {
-		case PICASSO:
+		    case PICASSO:
 			printf("Picasso II");
                         cl_maxpixelclock = 86000000;
 			break;
-		case SPECTRUM:
+		    case SPECTRUM:
 			printf("Spectrum");
                         cl_maxpixelclock = 90000000;
 			break;
-		case PICCOLO:
-			printf("Piccolo");
-                        cl_maxpixelclock = 90000000;
+		    case PICCOLO:
+			if (cl_sd64 == 1) {
+				printf("Piccolo SD64");
+				/* 110MHz will be supported if we
+				 * have a palette doubling mode.
+				 */
+				cl_maxpixelclock = 90000000;
+			} else {
+				printf("Piccolo");
+				cl_maxpixelclock = 90000000;
+			}
 			break;
 		}
 		printf(" being used\n");
@@ -356,12 +383,17 @@ cl_boardinit(gp)
 	/* setup initial unchanging parameters */
 
 	WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x21);	/* 8 dot - display off */
-	vgaw(ba, GREG_MISC_OUTPUT_W, 0xe1);	/* mem disable */
+	vgaw(ba, GREG_MISC_OUTPUT_W, 0xed);	/* mem disable */
 
 	WGfx(ba, GCT_ID_OFFSET_1, 0xec);	/* magic cookie */
 	WSeq(ba, SEQ_ID_UNLOCK_EXT, 0x12);	/* yum! cookies! */
 
-	WSeq(ba, SEQ_ID_DRAM_CNTL, 0xb0);
+	if (cl_sd64 == 1) {
+		WSeq(ba, SEQ_ID_CONF_RBACK, 0x00);
+		WSeq(ba, SEQ_ID_DRAM_CNTL, (cl_fbsize / 0x100000 == 2) ? 0x38 : 0xb8);
+	} else {
+		WSeq(ba, SEQ_ID_DRAM_CNTL, 0xb0);
+	}
 	WSeq(ba, SEQ_ID_RESET, 0x03);
 	WSeq(ba, SEQ_ID_MAP_MASK, 0xff);
 	WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00);
@@ -386,6 +418,10 @@ cl_boardinit(gp)
 	WCrt(ba, CRT_ID_MODE_CONTROL, 0xa3);	/* c3 */
 	WCrt(ba, CRT_ID_LINE_COMPARE, 0xff);	/* ff */
 	WCrt(ba, CRT_ID_EXT_DISP_CNTL, 0x22);
+	if (cl_sd64 == 1) {
+		WCrt(ba, CRT_ID_SYNC_ADJ_GENLOCK, 0x00);
+		WCrt(ba, CRT_ID_OVERLAY_EXT_CTRL_REG, 0x40);
+	}
 	WSeq(ba, SEQ_ID_CURSOR_STORE, 0x3c);	/* mouse 0x00 */
 
 	WGfx(ba, GCT_ID_SET_RESET, 0x00);
@@ -412,7 +448,7 @@ cl_boardinit(gp)
 
 	vgaw(ba, VDAC_MASK, 0xff);
 	delay(200000);
-	vgaw(ba, GREG_MISC_OUTPUT_W, 0xe3);	/* c3 */
+	vgaw(ba, GREG_MISC_OUTPUT_W, 0xef);
 
 	WGfx(ba, GCT_ID_BLT_STAT_START, 0x40);
 	WGfx(ba, GCT_ID_BLT_STAT_START, 0x00);
@@ -526,12 +562,12 @@ cl_mode(gp, cmd, arg, a2, a3)
 	int     error;
 
 	switch (cmd) {
-	case GM_GRFON:
+	    case GM_GRFON:
 		error = cl_load_mon(gp,
 		    (struct grfcltext_mode *) monitor_current) ? 0 : EINVAL;
 		return (error);
 
-	case GM_GRFOFF:
+	    case GM_GRFOFF:
 #ifndef CL5426CONSOLE
 		cl_off(gp);
 #else
@@ -539,27 +575,27 @@ cl_mode(gp, cmd, arg, a2, a3)
 #endif
 		return (0);
 
-	case GM_GRFCONFIG:
+	    case GM_GRFCONFIG:
 		return (0);
 
-	case GM_GRFGETVMODE:
+	    case GM_GRFGETVMODE:
 		return (cl_getvmode(gp, (struct grfvideo_mode *) arg));
 
-	case GM_GRFSETVMODE:
+	    case GM_GRFSETVMODE:
 		error = cl_setvmode(gp, *(unsigned *) arg);
 		if (!error && (gp->g_flags & GF_GRFON))
 			cl_load_mon(gp,
 			    (struct grfcltext_mode *) monitor_current);
 		return (error);
 
-	case GM_GRFGETNUMVM:
+	    case GM_GRFGETNUMVM:
 		*(int *) arg = monitor_def_max;
 		return (0);
 
-	case GM_GRFIOCTL:
+	    case GM_GRFIOCTL:
 		return (cl_ioctl(gp, a2, arg));
 
-	default:
+	    default:
 		break;
 	}
 
@@ -573,37 +609,37 @@ cl_ioctl(gp, cmd, data)
 	void   *data;
 {
 	switch (cmd) {
-	case GRFIOCGSPRITEPOS:
+	    case GRFIOCGSPRITEPOS:
 		return (cl_getmousepos(gp, (struct grf_position *) data));
 
-	case GRFIOCSSPRITEPOS:
+	    case GRFIOCSSPRITEPOS:
 		return (cl_setmousepos(gp, (struct grf_position *) data));
 
-	case GRFIOCSSPRITEINF:
+	    case GRFIOCSSPRITEINF:
 		return (cl_setspriteinfo(gp, (struct grf_spriteinfo *) data));
 
-	case GRFIOCGSPRITEINF:
+	    case GRFIOCGSPRITEINF:
 		return (cl_getspriteinfo(gp, (struct grf_spriteinfo *) data));
 
-	case GRFIOCGSPRITEMAX:
+	    case GRFIOCGSPRITEMAX:
 		return (cl_getspritemax(gp, (struct grf_position *) data));
 
-	case GRFIOCGETCMAP:
+	    case GRFIOCGETCMAP:
 		return (cl_getcmap(gp, (struct grf_colormap *) data));
 
-	case GRFIOCPUTCMAP:
+	    case GRFIOCPUTCMAP:
 		return (cl_putcmap(gp, (struct grf_colormap *) data));
 
-	case GRFIOCBITBLT:
+	    case GRFIOCBITBLT:
 		break;
 
-	case GRFTOGGLE:
+	    case GRFTOGGLE:
 		return (cl_toggle(gp, 0));
 
-	case GRFIOCSETMON:
+	    case GRFIOCSETMON:
 		return (cl_setmonitor(gp, (struct grfvideo_mode *) data));
 
-        case GRFIOCBLANK:
+            case GRFIOCBLANK:
                 return (cl_blank(gp, (int *)data));
 
 	}
@@ -950,18 +986,18 @@ cl_getcmap(gfp, cmap)
  */
 
 	switch (cltype) {
-	case SPECTRUM:
-	case PICCOLO:
+	    case SPECTRUM:
+	    case PICCOLO:
 		rp = blue + cmap->index;
 		gp = green + cmap->index;
 		bp = red + cmap->index;
 		break;
-	case PICASSO:
+	    case PICASSO:
 		rp = red + cmap->index;
 		gp = green + cmap->index;
 		bp = blue + cmap->index;
 		break;
-	default:
+	    default:
 		rp = gp = bp = 0;
 		break;
 	}
@@ -1005,18 +1041,18 @@ cl_putcmap(gfp, cmap)
 		x = cmap->count - 1;
 
 		switch (cltype) {
-		case SPECTRUM:
-		case PICCOLO:
+		    case SPECTRUM:
+		    case PICCOLO:
 			rp = blue + cmap->index;
 			gp = green + cmap->index;
 			bp = red + cmap->index;
 			break;
-		case PICASSO:
+		    case PICASSO:
 			rp = red + cmap->index;
 			gp = green + cmap->index;
 			bp = blue + cmap->index;
 			break;
-		default:
+		    default:
 			rp = gp = bp = 0;
 			break;
 		}
@@ -1053,7 +1089,7 @@ cl_toggle(gp, wopp)
 }
 
 static void
-CompFQ(fq, num, denom)
+cl_CompFQ(fq, num, denom)
 	u_int   fq;
 	u_char *num;
 	u_char *denom;
@@ -1126,18 +1162,18 @@ cl_mondefok(gv)
                         return(0);
 
 	switch (gv->depth) {
-	case 4:
+	    case 4:
                 if (gv->mode_num != 255)
                         return(0);
-	case 1:
-	case 8:
+	    case 1:
+	    case 8:
                 maxpix = cl_maxpixelclock;
                 break;
-	case 15:
-	case 16:
+	    case 15:
+	    case 16:
                 maxpix = cl_maxpixelclock - (cl_maxpixelclock / 3);
                 break;
-	case 24:
+	    case 24:
                 maxpix = cl_maxpixelclock / 3;
                 break;
 	default:
@@ -1163,6 +1199,7 @@ cl_load_mon(gp, md)
 	char    LACE, DBLSCAN, TEXT;
 	unsigned short clkdiv;
 	int     uplim, lowlim;
+	int	sr15;
 
 	/* identity */
 	gv = &md->gv;
@@ -1230,17 +1267,26 @@ cl_load_mon(gp, md)
 		VDE /= 2;
 
 	WSeq(ba, SEQ_ID_MEMORY_MODE, (TEXT || (gv->depth == 1)) ? 0x06 : 0x0e);
-	WSeq(ba, SEQ_ID_DRAM_CNTL, (TEXT || (gv->depth == 1)) ? 0x90 : 0xb0);
+	if (cl_sd64 == 1) {
+	    if (TEXT || (gv->depth == 1))
+		sr15 = 0x90;
+	    else
+		sr15 = ((cl_fbsize / 0x100000 == 2) ? 0x38 : 0xb8);
+	    WSeq(ba, SEQ_ID_CONF_RBACK, 0x00);
+	} else {
+		sr15 = (TEXT || (gv->depth == 1)) ? 0x90 : 0xb0;
+	}
+	WSeq(ba, SEQ_ID_DRAM_CNTL, sr15);
 	WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00);
 	WSeq(ba, SEQ_ID_MAP_MASK, (gv->depth == 1) ? 0x01 : 0xff);
 	WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00);
 
 	/* Set clock */
 
-	CompFQ((gv->depth == 24) ? gv->pixel_clock * 3 : gv->pixel_clock,
+	cl_CompFQ((gv->depth == 24) ? gv->pixel_clock * 3 : gv->pixel_clock,
 	    &num0, &denom0);
-	WSeq(ba, SEQ_ID_VCLK_0_NUM, num0);
-	WSeq(ba, SEQ_ID_VCLK_0_DENOM, denom0);
+	WSeq(ba, SEQ_ID_VCLK_3_NUM, num0);
+	WSeq(ba, SEQ_ID_VCLK_3_DENOM, denom0);
 
 	/* load display parameters into board */
 
@@ -1308,19 +1354,19 @@ cl_load_mon(gp, md)
 	/* depth dependent stuff */
 
 	switch (gv->depth) {
-	case 1:
-	case 4:
-	case 8:
+	    case 1:
+	    case 4:
+	    case 8:
 		clkdiv = 0;
 		break;
-	case 15:
-	case 16:
+	    case 15:
+	    case 16:
 		clkdiv = 3;
 		break;
-	case 24:
+	    case 24:
 		clkdiv = 2;
 		break;
-	default:
+	    default:
 		clkdiv = 0;
 		panic("grfcl: Unsuported depth: %i", gv->depth);
 		break;
@@ -1354,24 +1400,24 @@ cl_load_mon(gp, md)
 	vgar(ba, VDAC_MASK);
 	delay(200000);
 	switch (gv->depth) {
-	case 1:
-	case 4:		/* text */
+	    case 1:
+	    case 4:		/* text */
 		vgaw(ba, VDAC_MASK, 0);
 		HDE = gv->disp_width / 16;
 		break;
-	case 8:
+	    case 8:
 		vgaw(ba, VDAC_MASK, 0);
 		HDE = gv->disp_width / 8;
 		break;
-	case 15:
+	    case 15:
 		vgaw(ba, VDAC_MASK, 0xd0);
 		HDE = gv->disp_width / 4;
 		break;
-	case 16:
+	    case 16:
 		vgaw(ba, VDAC_MASK, 0xc1);
 		HDE = gv->disp_width / 4;
 		break;
-	case 24:
+	    case 24:
 		vgaw(ba, VDAC_MASK, 0xc5);
 		HDE = (gv->disp_width / 8) * 3;
 		break;
@@ -1386,6 +1432,10 @@ cl_load_mon(gp, md)
 	delay(20000);
 
 	WCrt(ba, CRT_ID_OFFSET, HDE);
+	if (cl_sd64 == 1) {
+		WCrt(ba, CRT_ID_SYNC_ADJ_GENLOCK, 0x00);
+		WCrt(ba, CRT_ID_OVERLAY_EXT_CTRL_REG, 0x40);
+	}
 	WCrt(ba, CRT_ID_EXT_DISP_CNTL,
 	    ((TEXT && gv->pixel_clock > 29000000) ? 0x40 : 0x00) |
 	    0x22 |
diff --git a/sys/arch/amiga/dev/grf_clreg.h b/sys/arch/amiga/dev/grf_clreg.h
index a55a0c74fa6..c024cf1503f 100644
--- a/sys/arch/amiga/dev/grf_clreg.h
+++ b/sys/arch/amiga/dev/grf_clreg.h
@@ -1,5 +1,5 @@
-/*	$OpenBSD: grf_clreg.h,v 1.3 1996/05/02 06:43:45 niklas Exp $	*/
-/*	$NetBSD: grf_clreg.h,v 1.3 1996/04/21 21:11:13 veego Exp $	*/
+/*	$OpenBSD: grf_clreg.h,v 1.4 1996/05/29 10:14:59 niklas Exp $	*/
+/*	$NetBSD: grf_clreg.h,v 1.4 1996/05/19 21:05:23 veego Exp $	*/
 
 /*
  * Copyright (c) 1995 Ezra Story
@@ -166,6 +166,7 @@ struct grfcltext_mode {
 #define GCT_ID_BLT_MODE		0x30
 #define GCT_ID_BLT_STAT_START	0x31
 #define GCT_ID_BLT_ROP		0x32
+#define GCT_ID_RESERVED		0x33
 #define GCT_ID_TRP_COL_LOW	0x34	/* transparent color */
 #define GCT_ID_TRP_COL_HIGH	0x35
 #define GCT_ID_TRP_MASK_LOW	0x38
@@ -246,6 +247,8 @@ struct grfcltext_mode {
 #define CRT_ID_LACE_END         0x19
 #define CRT_ID_LACE_CNTL        0x1A
 #define CRT_ID_EXT_DISP_CNTL    0x1B
+#define CRT_ID_SYNC_ADJ_GENLOCK 0x1C
+#define CRT_ID_OVERLAY_EXT_CTRL_REG    0x1D
 
 #define CRT_ID_GD_LATCH_RBACK	0x22
 
@@ -297,58 +300,72 @@ struct grfcltext_mode {
  * inline functions.
  */
 static inline void RegWakeup(volatile void *ba) {
-    	extern int cltype;
-
-    	switch (cltype) { 
-    	case SPECTRUM: 
-    	    	vgaw(ba, PASS_ADDRESS_W, 0x1f); 
-    	    	break; 
-    	case PICASSO: 
-    	    	vgaw(ba, PASS_ADDRESS_W, 0xff); 
-    	    	break; 
-    	case PICCOLO: 
-    	    	vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) | 0x10); 
-    	    	break; 
-    	} 
-    	delay(200000);
+	extern int cltype;
+	extern int cl_sd64;
+
+	switch (cltype) {
+	    case SPECTRUM:
+		vgaw(ba, PASS_ADDRESS_W, 0x1f);
+		break;
+	    case PICASSO:
+		vgaw(ba, PASS_ADDRESS_W, 0xff);
+		break;
+	    case PICCOLO:
+		if (cl_sd64 == 1)
+			vgaw(ba, PASS_ADDRESS_W, 0x1f);
+		else
+			vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) | 0x10);
+		break;
+	}
+	delay(200000);
 }
+
 static inline void RegOnpass(volatile void *ba) {
-    	extern int cltype;
-    	extern unsigned char pass_toggle;
-
-    	switch (cltype) { 
-    	case SPECTRUM:
-    	    	vgaw(ba, PASS_ADDRESS_W, 0x4f); 
-    	    	break; 
-    	case PICASSO: 
-    	    	vgaw(ba, PASS_ADDRESS_WP, 0x01); 
-    	    	break; 
-    	case PICCOLO: 
-    	    	vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) & 0xdf); 
-    	    	break; 
-    	} 
-    	pass_toggle = 1;
-    	delay(200000);
+	extern int cltype;
+	extern int cl_sd64;
+	extern unsigned char pass_toggle;
+
+	switch (cltype) {
+	    case SPECTRUM:
+		vgaw(ba, PASS_ADDRESS_W, 0x4f);
+		break;
+	    case PICASSO:
+		vgaw(ba, PASS_ADDRESS_WP, 0x01);
+		break;
+	    case PICCOLO:
+		if (cl_sd64 == 1)
+			vgaw(ba, PASS_ADDRESS_W, 0x4f);
+		else
+			vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) & 0xdf);
+		break;
+	}
+	pass_toggle = 1;
+	delay(200000);
 }
+
 static inline void RegOffpass(volatile void *ba) {
-    	extern int cltype;
-    	extern unsigned char pass_toggle;
-
-    	switch (cltype) { 
-    	case SPECTRUM: 
-    	    	vgaw(ba, PASS_ADDRESS_W, 0x6f); 
-    	    	break; 
-    	case PICASSO: 
-    	    	vgaw(ba, PASS_ADDRESS_W, 0xff); 
-    	    	delay(200000); 
-    	    	vgaw(ba, PASS_ADDRESS_W, 0xff); 
-    	    	break; 
-    	case PICCOLO: 
-    	    	vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) | 0x20); 
-    	    	break; 
-    	} 
-    	pass_toggle = 0;
-    	delay(200000);
+	extern int cltype;
+	extern int cl_sd64;
+	extern unsigned char pass_toggle;
+
+	switch (cltype) {
+	    case SPECTRUM:
+		vgaw(ba, PASS_ADDRESS_W, 0x6f);
+		break;
+	    case PICASSO:
+		vgaw(ba, PASS_ADDRESS_W, 0xff);
+		delay(200000);
+		vgaw(ba, PASS_ADDRESS_W, 0xff);
+		break;
+	    case PICCOLO:
+		if (cl_sd64 == 1)
+			vgaw(ba, PASS_ADDRESS_W, 0x6f);
+		else
+			vgaw(ba, PASS_ADDRESS_W, vgar(ba, PASS_ADDRESS) | 0x20);
+		break;
+	}
+	pass_toggle = 0;
+	delay(200000);
 }
 
 static inline unsigned char RAttr(volatile void * ba, short idx) {
diff --git a/sys/arch/amiga/dev/grf_cv.c b/sys/arch/amiga/dev/grf_cv.c
index 2c768263984..207614f485b 100644
--- a/sys/arch/amiga/dev/grf_cv.c
+++ b/sys/arch/amiga/dev/grf_cv.c
@@ -1,5 +1,5 @@
-/*	$OpenBSD: grf_cv.c,v 1.9 1996/05/04 13:54:22 niklas Exp $	*/
-/*	$NetBSD: grf_cv.c,v 1.13 1996/05/01 09:59:24 veego Exp $	*/
+/*	$OpenBSD: grf_cv.c,v 1.10 1996/05/29 10:15:01 niklas Exp $	*/
+/*	$NetBSD: grf_cv.c,v 1.14 1996/05/19 21:05:27 veego Exp $	*/
 
 /*
  * Copyright (c) 1995 Michael Teske
@@ -50,7 +50,7 @@
  *    The HWC routines provided here are buggy in 16/24 bit
  *    and may cause a Vertical Bar Crash of the Trio64.
  *    On the other hand it's better to put the routines in the Xserver,
- *    so please don't put CV_HARDWARE_CURSOR in your config file.
+ *    so please _don't_ put CV_HARDWARE_CURSOR in your config file.
  */
 
 #include <sys/param.h>
@@ -73,7 +73,7 @@ void	grfcvattach __P((struct device *, struct device *, void *));
 int	grfcvprint  __P((void *, char *));
 
 static int cv_has_4mb __P((volatile caddr_t));
-static unsigned short compute_clock __P((unsigned long));
+static unsigned short cv_compute_clock __P((unsigned long));
 void	cv_boardinit __P((struct grf_softc *));
 int	cv_getvmode __P((struct grf_softc *, struct grfvideo_mode *));
 int	cv_setvmode __P((struct grf_softc *, unsigned int));
@@ -95,7 +95,7 @@ static	inline void gfx_on_off __P((int, volatile caddr_t));
 int	cv_getspritepos __P((struct grf_softc *, struct grf_position *));
 int	cv_setspritepos __P((struct grf_softc *, struct grf_position *));
 int	cv_getspriteinfo __P((struct grf_softc *,struct grf_spriteinfo *));
-void cv_setup_hwc __P((struct grf_softc *,
+void	cv_setup_hwc __P((struct grf_softc *,
 	unsigned char, unsigned char, unsigned char, unsigned char,
 	const unsigned long *));
 int	cv_setspriteinfo __P((struct grf_softc *,struct grf_spriteinfo *));
@@ -169,7 +169,7 @@ unsigned char cvconscolors[16][3] = {	/* background, foreground, hilite */
 	{0x00, 0x00, 0xff},
 	{0xff, 0xff, 0x00},
 	{0x00, 0xff, 0xff},
-	{0xff, 0x00, 0xff}
+	{0x00, 0x00, 0xff}
 };
 
 static unsigned char clocks[]={
@@ -431,7 +431,7 @@ grfcvprint(auxp, pnp)
  */
 
 static unsigned short
-compute_clock(freq)
+cv_compute_clock(freq)
 	unsigned long freq;
 {
 	static unsigned char *mnr, *save;	/* M, N + R vals */
@@ -549,7 +549,7 @@ cv_boardinit(gp)
 	WSeq(ba, SEQ_ID_CLKSYN_CNTL_2, test);
 
 	/* Memory CLK */
-	clockpar = compute_clock(cv_memclk);
+	clockpar = cv_compute_clock(cv_memclk);
 	test = (clockpar & 0xFF00) >> 8;
 	WSeq(ba, SEQ_ID_MCLK_HI, test);		/* PLL N-Divider Value */
 
@@ -938,6 +938,17 @@ cv_setmonitor(gp, gv)
 #endif
 
 	md = monitor_def + (gv->mode_num - 1);
+
+	/*
+	 * Prevent user from crashing the system by using
+	 * grfconfig while in X
+	 */
+	if (gp->g_flags & GF_GRFON)
+		if (md == monitor_current) {
+			printf("grf_cv: Changing the used mode not allowed!\n");
+			return (EINVAL);
+		}
+
 	bcopy(gv, md, sizeof(struct grfvideo_mode));
 
 	/* adjust pixel oriented values to internal rep. */
@@ -1049,15 +1060,16 @@ cv_mondefok(gv)
 	struct grfvideo_mode *gv;
 {
 	unsigned long maxpix;
-	int widthok = 0;
 
 	if (gv->mode_num < 1 || gv->mode_num > monitor_def_max) {
-		if (gv->mode_num != 255 || (gv->depth != 4 && gv->depth != 8))
+		if (gv->mode_num != 255 || gv->depth != 4)
 			return (0);
 	}
 
 	switch(gv->depth) {
 	   case 4:
+		maxpix = MAXPIXELCLOCK - 55000000;
+		break;
 	   case 8:
 		maxpix = MAXPIXELCLOCK;
 		break;
@@ -1078,49 +1090,27 @@ cv_mondefok(gv)
 #endif
 		break;
 	   default:
+		printf("grf_cv: Illegal depth in mode %d\n",
+			(int) gv->mode_num);
 		return (0);
 	}
 
-	if (gv->pixel_clock > maxpix)
+	if (gv->pixel_clock > maxpix) {
+		printf("grf_cv: Pixelclock too high in mode %d\n",
+			(int) gv->mode_num);
 		return (0);
-
-	/*
-	 * These are the supported witdh values for the
-	 * graphics engine. To Support other widths, one
-	 * has to use one of these widths for memory alignment, i.e.
-	 * one has to set CRT_ID_SCREEN_OFFSET to one of these values and
-	 * CRT_ID_HOR_DISP_ENA_END to the desired width.
-	 * Since a working graphics engine is essential
-	 * for the console, console modes of other width are not supported.
-	 * We could do that, though, but then you have to tell the Xserver
-	 * about this strange configuration and I don't know how at the moment :-)
-	 */
-
-	switch (gv->disp_width) {
-	    case 1024:
-	    case 640:
-	    case 800:
-	    case 1280:
-	    case 1152:
-	    case 1600:
-		widthok = 1;
-		break;
-	    default: /* XXX*/
-		widthok = 0;
-		break;
 	}
 
-	if (widthok) return (1);
-	else {
-		if (gv->mode_num == 255) { /* console mode */
-			return (1);
-		} else {
-			printf ("Warning for mode %d:\n", (int) gv->mode_num);
-			printf ("Don't use a blitter-suporting Xserver with this display width\n");
-			printf ("Use one of 640 800 1024 1152 1280 1600!\n");
-			return (1);
+	if (gv->mode_num == 255) { /* console mode */
+		if ((gv->disp_width / 8) > MAXCOLS) {
+			printf ("grfcv: Too many columns for console\n");
+			return (0);
+		} else if ((gv->disp_height / S3FONTY) > MAXROWS) {
+			printf ("grfcv: Too many rows for console\n");
+			return (0);
 		}
 	}
+
 	return (1);
 }
 
@@ -1138,7 +1128,7 @@ cv_load_mon(gp, md)
 		VSE, VT;
 	char LACE, DBLSCAN, TEXT, CONSOLE;
 	int uplim, lowlim;
-	int cr50, cr33, sr15, sr18, clock_mode, test;
+	int cr50, sr15, sr18, clock_mode, test;
 	int m, n;	/* For calc'ing display FIFO */
 	int tfillm, temptym;	/* FIFO fill and empty mclk's */
 	int hmul;	/* Multiplier for hor. Values */
@@ -1149,7 +1139,7 @@ cv_load_mon(gp, md)
 	CONSOLE = (gv->mode_num == 255);
 
 	if (!cv_mondefok(gv)) {
-		printf("grfcv: The monitor definition is not okay.\n");
+		printf("grfcv: The monitor definition is illegal.\n");
 		printf("grfcv: See the manpage of grfconfig for more informations\n");
 		return (0);
 	}
@@ -1222,8 +1212,9 @@ cv_load_mon(gp, md)
 	if (LACE)
 		VDE /= 2;
 
-	/* GFx hardware cursor off */
+	/* GFX hardware cursor off */
 	WCrt(ba, CRT_ID_HWGC_MODE, 0x00);
+	WCrt(ba, CRT_ID_EXT_DAC_CNTL, 0x00);
 
 	WSeq(ba, SEQ_ID_MEMORY_MODE, (TEXT || (gv->depth == 1)) ? 0x06 : 0x0e);
 	WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00);
@@ -1232,7 +1223,7 @@ cv_load_mon(gp, md)
 
 	/* Set clock */
 
-	mnr = compute_clock(gv->pixel_clock);
+	mnr = cv_compute_clock(gv->pixel_clock);
 	WSeq(ba, SEQ_ID_DCLK_HI, ((mnr & 0xFF00) >> 8));
 	WSeq(ba, SEQ_ID_DCLK_LO, (mnr & 0xFF));
 
@@ -1321,12 +1312,14 @@ cv_load_mon(gp, md)
 
 	vgaw(ba, VDAC_MASK, 0xff);
 
+	/* Blank border */
+	test = RCrt(ba, CRT_ID_BACKWAD_COMP_2);
+	WCrt(ba, CRT_ID_BACKWAD_COMP_2, (test | 0x20));
+
 	sr15 = RSeq(ba, SEQ_ID_CLKSYN_CNTL_2);
 	sr15 &= 0xef;
 	sr18 = RSeq(ba, SEQ_ID_RAMDAC_CNTL);
 	sr18 &= 0x7f;
-	cr33 = RCrt(ba, CRT_ID_BACKWAD_COMP_2);
-	cr33 &= 0xdf;
 	clock_mode = 0x00;
 	cr50 = 0x00;
 
@@ -1347,7 +1340,6 @@ cv_load_mon(gp, md)
 			clock_mode = 0x10 | 0x02;
 			sr15 |= 0x10;
 			sr18 |= 0x80;
-			cr33 |= 0x20;
 		}
 		HDE = gv->disp_width / 8;
 		cr50 |= 0x00;
@@ -1376,7 +1368,6 @@ cv_load_mon(gp, md)
 	WCrt(ba, CRT_ID_EXT_MISC_CNTL_2, clock_mode | test);
 	WSeq(ba, SEQ_ID_CLKSYN_CNTL_2, sr15);
 	WSeq(ba, SEQ_ID_RAMDAC_CNTL, sr18);
-	WCrt(ba, CRT_ID_BACKWAD_COMP_2, cr33);
 	WCrt(ba, CRT_ID_SCREEN_OFFSET, HDE);
 
 	WCrt(ba, CRT_ID_MISC_1, (TEXT ? 0x05 : 0x35));
@@ -1407,7 +1398,7 @@ cv_load_mon(gp, md)
 	   case 1600:
 		cr50 |= 0x81;
 		break;
-	   default: /* XXX*/
+	   default: /* XXX The Xserver has to handle this */
 		break;
 	}
 
@@ -1435,15 +1426,18 @@ cv_load_mon(gp, md)
  	tfillm = (96 * (cv_memclk/1000))/240000;
 
 	switch(gv->depth) {
-	   case 32:
-	   case 24:
+	    case 32:
+	    case 24:
 		temptym = (24 * (cv_memclk/1000)) / (gv->pixel_clock/1000);
 		break;
-	   case 15:
-	   case 16:
+	    case 15:
+	    case 16:
 		temptym = (48 * (cv_memclk/1000)) / (gv->pixel_clock/1000);
 		break;
-	   default:
+	    case 4:
+		temptym = (192 * (cv_memclk/1000)) / (gv->pixel_clock/1000);
+		break;
+	    default:
 		temptym = (96 * (cv_memclk/1000)) / (gv->pixel_clock/1000);
 		break;
 	}
@@ -1664,10 +1658,13 @@ cv_setspritepos (gp, pos)
 	return(0);
 }
 
-#define M2I(val)                                                     \
+static inline short
+M2I(short val) {
 	asm volatile (" rorw #8,%0   ;                               \
 			swap %0      ;                               \
 			rorw #8,%0   ; " : "=d" (val) : "0" (val));
+	return (val);
+}
 
 #define M2INS(val)                                                   \
 	asm volatile (" rorw #8,%0   ;                               \
@@ -1738,7 +1735,7 @@ cv_setup_hwc (gp, col1, col2, hsx, hsy, data)
 	unsigned char hsy;
 	const unsigned long *data;
 {
-	volatile unsigned char *ba = gp->g_regkva;
+	volatile caddr_t ba = gp->g_regkva;
 	unsigned long *c = (unsigned long *)(gp->g_fbkva + HWC_OFF);
 	const unsigned long *s = data;
 	int test;
@@ -1794,6 +1791,7 @@ cv_setspriteinfo (gp, info)
 	struct grf_spriteinfo *info;
 {
 	volatile caddr_t ba, fb;
+	int depth = gp->g_display.gd_planes;
 
 	ba = gp->g_regkva;
 	fb = gp->g_fbkva;
@@ -1812,7 +1810,24 @@ cv_setspriteinfo (gp, info)
 
 		/* Cursor off */
 		WCrt (ba, CRT_ID_HWGC_MODE, 0x00);
-		/* move cursor off-screen */
+
+		/*
+		 * The Trio64 crashes if the cursor data is written
+		 * while the cursor is displayed.
+		 * Sadly, turning the cursor off is not enough.
+		 * What we have to do is:
+		 * 1. Wait for vertical retrace, to make sure no-one
+		 * has moved the cursor in this sync period (because
+		 * another write then would have no effect, argh!).
+		 * 2. Move the cursor off-screen
+		 * 3. Another wait for v. retrace to make sure the cursor
+		 * is really off.
+		 * 4. Write the data, finally.
+		 * (thanks to Harald Koenig for this tip!)
+		 */
+
+		VerticalRetraceWait(ba);
+
 		WCrt (ba, CRT_ID_HWGC_ORIGIN_X_HI, 0x7);
 		WCrt (ba, CRT_ID_HWGC_ORIGIN_X_LO,  0xff);
 		WCrt (ba, CRT_ID_HWGC_ORIGIN_Y_LO, 0xff);
@@ -1835,6 +1850,10 @@ cv_setspriteinfo (gp, info)
 
 		hwp = (u_short *)(fb  +HWC_OFF);
 
+		/* This is necessary in order not to crash the board */
+
+		VerticalRetraceWait(ba);
+
 		/*
 		 * setting it is slightly more difficult, because we can't
 		 * force the application to not pass a *smaller* than
@@ -1868,14 +1887,40 @@ cv_setspriteinfo (gp, info)
 			else
 				im3 = m3 = im4 = m4 = 0;
 
-			*hwp++ = m1;
-			*hwp++ = im1;
-			*hwp++ = m2;
-			*hwp++ = im2;
-			*hwp++ = m3;
-			*hwp++ = im3;
-			*hwp++ = m4;
-			*hwp++ = im4;
+			switch (depth) {
+			    case 8:
+				*hwp++ = m1;
+				*hwp++ = im1;
+				*hwp++ = m2;
+				*hwp++ = im2;
+				*hwp++ = m3;
+				*hwp++ = im3;
+				*hwp++ = m4;
+				*hwp++ = im4;
+				break;
+			    case 15:
+			    case 16:
+				*hwp++ = M2I(m1);
+				*hwp++ = M2I(im1);
+				*hwp++ = M2I(m2);
+				*hwp++ = M2I(im2);
+				*hwp++ = M2I(m3);
+				*hwp++ = M2I(im3);
+				*hwp++ = M2I(m4);
+				*hwp++ = M2I(im4);
+				break;
+			    case 24:
+			    case 32:
+				*hwp++ = M2I(im1);
+				*hwp++ = M2I(m1);
+				*hwp++ = M2I(im2);
+				*hwp++ = M2I(m2);
+				*hwp++ = M2I(im3);
+				*hwp++ = M2I(m3);
+				*hwp++ = M2I(im4);
+				*hwp++ = M2I(m4);
+				break;
+			}
 		}
 		for (; row < 64; row++) {
 			*hwp++ = 0x0000;
@@ -1893,21 +1938,24 @@ cv_setspriteinfo (gp, info)
 		cv_hoty = info->hot.y;
 
 		/* One must not write twice per vertical blank :-( */
-		VerticalRetraceWait(ba);
+		/* VerticalRetraceWait(ba); */
 
 		cv_setspritepos (gp, &info->pos);
 	}
 	if (info->set & GRFSPRSET_CMAP) {
 		int test;
-		int depth = gp->g_display.gd_planes;
+
+		VerticalRetraceWait(ba);
 
 		/* reset colour stack */
 		test = RCrt(ba, CRT_ID_HWGC_MODE);
 		asm volatile("nop");
 		switch (depth) {
-		    case 24: case 32:
+		    case 32:
+		    case 24:
 			WCrt (ba, CRT_ID_HWGC_FG_STACK, 0);
-		    case 8: case 16:
+		    case 16:
+		    case 8:
 			/* info->cmap.green[1] */
 			WCrt (ba, CRT_ID_HWGC_FG_STACK, 0);
 			WCrt (ba, CRT_ID_HWGC_FG_STACK, 0);
diff --git a/sys/arch/amiga/dev/grf_cvreg.h b/sys/arch/amiga/dev/grf_cvreg.h
index 64078af7270..96ba25955b2 100644
--- a/sys/arch/amiga/dev/grf_cvreg.h
+++ b/sys/arch/amiga/dev/grf_cvreg.h
@@ -1,5 +1,5 @@
-/*	$OpenBSD: grf_cvreg.h,v 1.5 1996/03/30 22:18:17 niklas Exp $	*/
-/*	$NetBSD: grf_cvreg.h,v 1.4 1996/03/02 14:02:58 veego Exp $	*/
+/*	$OpenBSD: grf_cvreg.h,v 1.6 1996/05/29 10:15:04 niklas Exp $	*/
+/*	$NetBSD: grf_cvreg.h,v 1.5 1996/05/19 21:05:30 veego Exp $	*/
 
 /*
  * Copyright (c) 1995 Michael Teske
@@ -56,6 +56,9 @@ struct grfcvtext_mode {
 	unsigned short	fdend;
 };
 
+/* maximum console size */
+#define MAXROWS 200
+#define MAXCOLS 200
 
 /* read VGA register */
 #define vgar(ba, reg) (*(((volatile caddr_t)ba)+reg))
diff --git a/sys/arch/amiga/dev/grf_et.c b/sys/arch/amiga/dev/grf_et.c
new file mode 100644
index 00000000000..411a974b915
--- /dev/null
+++ b/sys/arch/amiga/dev/grf_et.c
@@ -0,0 +1,1545 @@
+/*	$NetBSD: grf_et.c,v 1.1 1996/05/19 21:05:32 veego Exp $	*/
+
+/*
+ * Copyright (c) 1996 Tobias Abt
+ * Copyright (c) 1995 Ezra Story
+ * Copyright (c) 1995 Kari Mettinen
+ * Copyright (c) 1994 Markus Wild
+ * Copyright (c) 1994 Lutz Vieweg
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *      This product includes software developed by Lutz Vieweg.
+ * 4. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "grfet.h"
+#if NGRFET > 0
+
+/*
+ * Graphics routines for Tseng ET4000 (&W32) boards,
+ *
+ * This code offers low-level routines to access Tseng ET4000
+ * graphics-boards from within NetBSD for the Amiga.
+ * No warranties for any kind of function at all - this
+ * code may crash your hardware and scratch your harddisk.  Use at your
+ * own risk.  Freely distributable.
+ *
+ * Modified for Tseng ET4000 from
+ * Kari Mettinen's Cirrus driver by Tobias Abt
+ *
+ *
+ * TODO:
+ *
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/errno.h>
+#include <sys/ioctl.h>
+#include <sys/device.h>
+#include <sys/malloc.h>
+
+#include <machine/cpu.h>
+#include <dev/cons.h>
+#ifdef TSENGCONSOLE
+#include <amiga/dev/itevar.h>
+#endif
+#include <amiga/amiga/device.h>
+#include <amiga/dev/grfioctl.h>
+#include <amiga/dev/grfvar.h>
+#include <amiga/dev/grf_etreg.h>
+#include <amiga/dev/zbusvar.h>
+
+int	et_mondefok __P((struct grfvideo_mode * gv));
+void	et_boardinit __P((struct grf_softc * gp));
+static void et_CompFQ __P((u_int fq, u_char * num, u_char * denom));
+int	et_getvmode __P((struct grf_softc * gp, struct grfvideo_mode * vm));
+int	et_setvmode __P((struct grf_softc * gp, unsigned int mode));
+int	et_toggle __P((struct grf_softc * gp, unsigned short));
+int	et_getcmap __P((struct grf_softc * gfp, struct grf_colormap * cmap));
+int	et_putcmap __P((struct grf_softc * gfp, struct grf_colormap * cmap));
+#ifndef TSENGCONSOLE
+void	et_off __P((struct grf_softc * gp));
+#endif
+void	et_inittextmode __P((struct grf_softc * gp));
+int	et_ioctl __P((register struct grf_softc * gp, u_long cmd, void *data));
+int	et_getmousepos __P((struct grf_softc * gp, struct grf_position * data));
+void	et_writesprpos __P((volatile char *ba, short x, short y));
+#ifdef notyet
+void	et_writeshifted __P((unsigned char *to, char shiftx, char shifty));
+#endif
+int	et_setmousepos __P((struct grf_softc * gp, struct grf_position * data));
+static int et_setspriteinfo __P((struct grf_softc * gp, struct grf_spriteinfo * data));
+int	et_getspriteinfo __P((struct grf_softc * gp, struct grf_spriteinfo * data));
+static int et_getspritemax __P((struct grf_softc * gp, struct grf_position * data));
+int	et_setmonitor __P((struct grf_softc * gp, struct grfvideo_mode * gv));
+int	et_blank __P((struct grf_softc * gp, int * on));
+static int et_getControllerType __P((struct grf_softc * gp));
+static int et_getDACType __P((struct grf_softc * gp));
+
+int	grfetmatch __P((struct device *, void *, void *));
+void	grfetattach __P((struct device *, struct device *, void *));
+int	grfetprint __P((void *, char *));
+void	et_memset __P((unsigned char *d, unsigned char c, int l));
+
+/* Graphics display definitions.
+ * These are filled by 'grfconfig' using GRFIOCSETMON.
+ */
+#define monitor_def_max 8
+static struct grfvideo_mode monitor_def[8] = {
+	{0}, {0}, {0}, {0}, {0}, {0}, {0}, {0}
+};
+static struct grfvideo_mode *monitor_current = &monitor_def[0];
+
+/* Console display definition.
+ *   Default hardcoded text mode.  This grf_et is set up to
+ *   use one text mode only, and this is it.  You may use
+ *   grfconfig to change the mode after boot.
+ */
+/* Console font */
+#ifdef KFONT_8X11
+#define TSENGFONT kernel_font_8x11
+#define TSENGFONTY 11
+#else
+#define TSENGFONT kernel_font_8x8
+#define TSENGFONTY 8
+#endif
+extern unsigned char TSENGFONT[];
+
+struct grfettext_mode etconsole_mode = {
+	{255, "", 25000000, 640, 480, 4, 640/8, 784/8, 680/8, 768/8, 800/8,
+	 481, 521, 491, 493, 525},
+	8, TSENGFONTY, 640 / 8, 480 / TSENGFONTY, TSENGFONT, 32, 255
+};
+
+/* some modes
+# 640x480 256colors  41kHz  79Hz   active
+x 31500000 640 480 8 640 752 672 768 728 487 505 488 490 512
+# 31500000 640 480 8 80 94 84 96 91 487 505 488 490 512
+# 640x512 256colors  42kHz  76Hz   active
+x 32500000 640 512 8 640 760 664 760 736 519 536 520 522 543
+# 32500000 640 512 8 80 95 83 95 92 519 536 520 522 543
+# 720x540 256colors  43kHz  74Hz   active
+x 37500000 720 540 8 720 856 744 840 832 547 565 548 550 572
+# 37500000 720 540 8 90 107 93 105 104 547 565 548 550 572
+# 800x600 256colors  48kHz  73Hz   active
+x 50350000 800 600 8 792 1048 864 960 1016 599 648 615 617 647
+# 50350000 800 600 8 99 131 108 120 127 599 648 615 617 647
+# 912x684 256colors  57kHz  78Hz   active
+x 65000000 912 684 8 904 1136 944 1040 1104 683 725 693 695 724
+# 65000000 912 684 8 113 142 118 130 138 683 725 693 695 724
+# 1024x768 256colors  61kHz  75Hz   active
+x 80000000 1024 768 8 1024 1288 1072 1168 1264 775 806 780 782 813
+# 80000000 1024 768 8 128 161 134 146 158 775 806 780 782 813
+# 1120x832 256colors  56kHz  64Hz   active
+x 80000000 1120 832 8 1120 1424 1152 1248 1400 839 848 833 835 855
+# 80000000 1120 832 8 140 178 144 156 175 839 848 833 835 855
+*/
+ 
+/* Console colors */
+unsigned char etconscolors[3][3] = {	/* background, foreground, hilite */
+	{0, 0x40, 0x50}, {152, 152, 152}, {255, 255, 255}
+};
+
+int ettype = 0;		/* oMniBus, Domino or Merlin */
+int etctype = 0;	/* ET4000 or ETW32 */
+int etdtype = 0;	/* Type of DAC (see grf_etregs.h) */
+
+char etcmap_shift = 0;	/* 6 or 8 bit cmap entries */
+unsigned char pass_toggle;	/* passthru status tracker */
+
+unsigned char Merlin_switch = 0;
+
+/* because all Tseng-boards have 2 configdev entries, one for
+ * framebuffer mem and the other for regs, we have to hold onto
+ * the pointers globally until we match on both.  This and 'ettype'
+ * are the primary obsticles to multiple board support, but if you
+ * have multiple boards you have bigger problems than grf_et.
+ */
+static void *et_fbaddr = 0;	/* framebuffer */
+static void *et_regaddr = 0;	/* registers */
+static int et_fbsize;		/* framebuffer size */
+
+/* current sprite info, if you add support for multiple boards
+ * make this an array or something
+ */
+struct grf_spriteinfo et_cursprite;
+
+/* sprite bitmaps in kernel stack, you'll need to arrayize these too if
+ * you add multiple board support
+ */
+static unsigned char et_imageptr[8 * 64], et_maskptr[8 * 64];
+static unsigned char et_sprred[2], et_sprgreen[2], et_sprblue[2];
+
+/* standard driver stuff */
+struct cfattach grfet_ca = {
+	sizeof(struct grf_softc), grfetmatch, grfetattach
+};
+
+struct cfdriver grfet_cd = {
+	NULL, "grfet", DV_DULL, NULL, 0
+};
+static struct cfdata *cfdata;
+
+
+int
+grfetmatch(pdp, match, auxp)
+	struct device *pdp;
+	void *match, *auxp;
+{
+#ifdef TSENGCONSOLE
+	struct cfdata *cfp = match;
+#endif
+	struct zbus_args *zap;
+	static int regprod, fbprod;
+
+	zap = auxp;
+
+#ifndef TSENGCONSOLE
+	if (amiga_realconfig == 0)
+		return (0);
+#endif
+
+	/* Grab the first board we encounter as the preferred one.  This will
+	 * allow one board to work in a multiple Tseng board system, but not
+	 * multiple boards at the same time.  */
+	if (ettype == 0) {
+		switch (zap->manid) {
+		    case OMNIBUS:
+			if (zap->prodid != 0)
+				return (0);
+			regprod = 0;
+			fbprod = 0;
+			break;
+		    case DOMINO:
+			if (zap->prodid != 2 && zap->prodid != 1)
+				return (0);
+			regprod = 2;
+			fbprod = 1;
+			break;
+		    case MERLIN:
+			if (zap->prodid != 3 && zap->prodid != 4)
+				return (0);
+			regprod = 4;
+			fbprod = 3;
+			/*
+			 * This card works only in ZorroII mode.
+			 * ZorroIII needs different initialisations,
+			 * which will be implemented later.
+			 */
+			if iszthreepa(zap->pa)
+				return (0);
+			break;
+		    default:
+			return (0);
+		}
+		ettype = zap->manid;
+	} else {
+		if (ettype != zap->manid) {
+			return (0);
+		}
+	}
+
+	/* Configure either registers or framebuffer in any order */
+	/* as said before, oMniBus does not support ProdID */
+	if (ettype == OMNIBUS) {
+		if (zap->size == 64 * 1024) {
+			/* register area */
+			et_regaddr = zap->va;
+		} else {
+			/* memory area */
+			et_fbaddr = zap->va;
+			et_fbsize = zap->size;
+		}
+	} else {
+		if (zap->prodid == regprod) {
+			et_regaddr = zap->va;
+		} else {
+			if (zap->prodid == fbprod) {
+				et_fbaddr = zap->va;
+				et_fbsize = zap->size;
+			} else {
+				return (0);
+			}
+		}
+	}
+
+#ifdef TSENGCONSOLE
+	if (amiga_realconfig == 0) {
+		cfdata = cfp;
+	}
+#endif
+
+	return (1);
+}
+
+
+void
+grfetattach(pdp, dp, auxp)
+	struct device *pdp, *dp;
+	void   *auxp;
+{
+	static struct grf_softc congrf;
+	struct zbus_args *zap;
+	struct grf_softc *gp;
+	static char attachflag = 0;
+
+	zap = auxp;
+
+	printf("\n");
+
+	/* make sure both halves have matched */
+	if (!et_regaddr || !et_fbaddr)
+		return;
+
+	if (zap->manid == MERLIN && iszthreepa(zap->pa)) {
+		printf("grfet: WARNING: It is not possible to use the Merlin in ZorroIII mode.\n");
+		printf("grfet: Switch the Jumper to use it in ZorroII mode.\n");
+		printf("grfet unattached!!\n");
+		return;
+	}
+
+	/* do all that messy console/grf stuff */
+	if (dp == NULL)
+		gp = &congrf;
+	else
+		gp = (struct grf_softc *) dp;
+
+	if (dp != NULL && congrf.g_regkva != 0) {
+		/*
+		 * inited earlier, just copy (not device struct)
+		 */
+		bcopy(&congrf.g_display, &gp->g_display,
+		    (char *) &gp[1] - (char *) &gp->g_display);
+	} else {
+		gp->g_regkva = (volatile caddr_t) et_regaddr;
+		gp->g_fbkva = (volatile caddr_t) et_fbaddr;
+
+		gp->g_unit = GRF_ET4000_UNIT;
+		gp->g_mode = et_mode;
+		gp->g_conpri = grfet_cnprobe();
+		gp->g_flags = GF_ALIVE;
+
+		/* wakeup the board */
+		et_boardinit(gp);
+
+#ifdef TSENGCONSOLE
+		grfet_iteinit(gp);
+		(void) et_load_mon(gp, &etconsole_mode);
+#endif
+	}
+
+	/*
+	 * attach grf (once)
+	 */
+	if (amiga_config_found(cfdata, &gp->g_device, gp, grfetprint)) {
+		attachflag = 1;
+		printf("grfet: %dMB ", et_fbsize / 0x100000);
+		switch (ettype) {
+		    case OMNIBUS:
+			printf("oMniBus");
+			break;
+		    case DOMINO:
+			printf("Domino");
+			break;
+		    case MERLIN:
+			printf("Merlin");
+			break;
+		}
+		printf(" with ");
+		switch (etctype) {
+		    case ET4000:
+			printf("Tseng ET4000");
+			break;
+		    case ETW32:
+			printf("Tseng ETW32");
+			break;
+		}
+		printf(" and ");
+		switch (etdtype) {
+		    case SIERRA11483:
+			printf("Sierra SC11483 DAC");
+			break;
+		    case SIERRA15025:
+			printf("Sierra SC15025 DAC");
+			break;
+		    case MUSICDAC:
+			printf("MUSIC DAC");
+			break;
+		    case MERLINDAC:
+			printf("BrookTree DAC");
+			break;
+		}
+		printf(" being used\n");
+	} else {
+		if (!attachflag)
+			printf("grfet unattached!!\n");
+	}
+}
+
+
+int
+grfetprint(auxp, pnp)
+	void   *auxp;
+	char   *pnp;
+{
+	if (pnp)
+		printf("ite at %s: ", pnp);
+	return (UNCONF);
+}
+
+
+void
+et_boardinit(gp)
+	struct grf_softc *gp;
+{
+	unsigned char *ba = gp->g_regkva;
+	int     x;
+
+	/* wakeup board and flip passthru OFF */
+
+	RegWakeup(ba);
+	RegOnpass(ba);
+
+	if (ettype == MERLIN) {
+	  /* Merlin needs some special initialisations */
+	  vgaw(ba, MERLIN_SWITCH_REG, 0);
+	  delay(20000);
+	  vgaw(ba, MERLIN_SWITCH_REG, 8);
+	  delay(20000);
+	  vgaw(ba, MERLIN_SWITCH_REG, 0);
+	  delay(20000);
+	  vgaw(ba, MERLIN_VDAC_DATA, 1);
+
+	  vgaw(ba, MERLIN_VDAC_INDEX, 0x00);
+	  vgaw(ba, MERLIN_VDAC_SPRITE,  0xff);
+	  vgaw(ba, MERLIN_VDAC_INDEX, 0x01);
+	  vgaw(ba, MERLIN_VDAC_SPRITE,  0x0f);
+	  vgaw(ba, MERLIN_VDAC_INDEX, 0x02);
+	  vgaw(ba, MERLIN_VDAC_SPRITE,  0x42);
+	  vgaw(ba, MERLIN_VDAC_INDEX, 0x03);
+	  vgaw(ba, MERLIN_VDAC_SPRITE,  0x00);
+
+	  vgaw(ba, MERLIN_VDAC_DATA, 0);
+	}
+
+
+	/* setup initial unchanging parameters */
+
+	vgaw(ba, GREG_HERCULESCOMPAT, 0x03);
+	vgaw(ba, GREG_DISPMODECONTROL, 0xa0);
+	vgaw(ba, GREG_MISC_OUTPUT_W, 0x63);
+
+	WSeq(ba, SEQ_ID_RESET, 0x03);
+	WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x21);	/* 8 dot, Display off */
+	WSeq(ba, SEQ_ID_MAP_MASK, 0x0f);
+	WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00);
+	WSeq(ba, SEQ_ID_MEMORY_MODE, 0x0e);
+/*	WSeq(ba, SEQ_ID_TS_STATE_CONTROL, 0x00);	*/
+	WSeq(ba, SEQ_ID_AUXILIARY_MODE, 0xf4);
+
+	WCrt(ba, CRT_ID_PRESET_ROW_SCAN, 0x00);
+	WCrt(ba, CRT_ID_CURSOR_START, 0x00);
+	WCrt(ba, CRT_ID_CURSOR_END, 0x08);
+	WCrt(ba, CRT_ID_START_ADDR_HIGH, 0x00);
+	WCrt(ba, CRT_ID_START_ADDR_LOW, 0x00);
+	WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, 0x00);
+	WCrt(ba, CRT_ID_CURSOR_LOC_LOW, 0x00);
+
+	WCrt(ba, CRT_ID_UNDERLINE_LOC, 0x07);
+	WCrt(ba, CRT_ID_MODE_CONTROL, 0xa3);	/* c3 */
+	WCrt(ba, CRT_ID_LINE_COMPARE, 0xff);	/* ff */
+/*
+	WCrt(ba, CRT_ID_EXT_DISP_CNTL, 0x22);
+*/
+/* ET4000 special */
+	WCrt(ba, CRT_ID_RASCAS_CONFIG, 0x28);
+	WCrt(ba, CTR_ID_EXT_START, 0x00);
+	WCrt(ba, CRT_ID_6845_COMPAT, 0x08);
+	WCrt(ba, CRT_ID_VIDEO_CONFIG1, 0xd3);
+	WCrt(ba, CRT_ID_VIDEO_CONFIG2, 0x0f);
+	WCrt(ba, CRT_ID_HOR_OVERFLOW, 0x00);
+
+	WGfx(ba, GCT_ID_SET_RESET, 0x00);
+	WGfx(ba, GCT_ID_ENABLE_SET_RESET, 0x00);
+	WGfx(ba, GCT_ID_COLOR_COMPARE, 0x00);
+	WGfx(ba, GCT_ID_DATA_ROTATE, 0x00);
+	WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00);
+	WGfx(ba, GCT_ID_GRAPHICS_MODE, 0x00);
+	WGfx(ba, GCT_ID_MISC, 0x01);
+	WGfx(ba, GCT_ID_COLOR_XCARE, 0x0f);
+	WGfx(ba, GCT_ID_BITMASK, 0xff);
+
+	vgaw(ba, GREG_SEGMENTSELECT, 0x00);
+
+	for (x = 0; x < 0x10; x++)
+		WAttr(ba, x, x);
+	WAttr(ba, ACT_ID_ATTR_MODE_CNTL, 0x01);
+	WAttr(ba, ACT_ID_OVERSCAN_COLOR, 0x00);
+	WAttr(ba, ACT_ID_COLOR_PLANE_ENA, 0x0f);
+	WAttr(ba, ACT_ID_HOR_PEL_PANNING, 0x00);
+	WAttr(ba, ACT_ID_COLOR_SELECT, 0x00);
+	WAttr(ba, ACT_ID_MISCELLANEOUS, 0x00);
+
+	vgaw(ba, VDAC_MASK, 0xff);
+	delay(200000);
+	vgaw(ba, GREG_MISC_OUTPUT_W, 0xe3);	/* c3 */
+
+	/* colors initially set to greyscale */
+
+	switch(ettype) {
+	    case MERLIN:
+		vgaw(ba, MERLIN_VDAC_INDEX, 0);
+		for (x = 255; x >= 0; x--) {
+		    vgaw(ba, MERLIN_VDAC_COLORS, x);
+		    vgaw(ba, MERLIN_VDAC_COLORS, x);
+		    vgaw(ba, MERLIN_VDAC_COLORS, x);
+		}
+		break;
+	    default:
+		vgaw(ba, VDAC_ADDRESS_W, 0);
+		for (x = 255; x >= 0; x--) {
+		    vgaw(ba, VDAC_DATA, x);
+		    vgaw(ba, VDAC_DATA, x);
+		    vgaw(ba, VDAC_DATA, x);
+		}
+		break;
+	}
+	/* set sprite bitmap pointers */
+	/* should work like that */
+	et_cursprite.image = et_imageptr;
+	et_cursprite.mask = et_maskptr;
+	et_cursprite.cmap.red = et_sprred;
+	et_cursprite.cmap.green = et_sprgreen;
+	et_cursprite.cmap.blue = et_sprblue;
+	
+	/* card spezific initialisations */
+	switch(ettype) {
+	    case OMNIBUS:
+		etctype = et_getControllerType(gp);
+		etdtype = et_getDACType(gp);
+		break;
+	    case MERLIN:
+		etctype = ETW32;
+		etdtype = MERLINDAC;
+	break;
+	    case DOMINO:
+		etctype = ET4000;
+		etdtype = SIERRA11483;
+		break;
+	}
+}
+
+
+int
+et_getvmode(gp, vm)
+	struct grf_softc *gp;
+	struct grfvideo_mode *vm;
+{
+	struct grfvideo_mode *gv;
+
+#ifdef TSENGCONSOLE
+	/* Handle grabbing console mode */
+	if (vm->mode_num == 255) {
+		bcopy(&etconsole_mode, vm, sizeof(struct grfvideo_mode));
+		/* XXX so grfconfig can tell us the correct text dimensions. */
+		vm->depth = etconsole_mode.fy;
+	} else 
+#endif
+        {
+                if (vm->mode_num == 0)
+                        vm->mode_num = (monitor_current - monitor_def) + 1;
+                if (vm->mode_num < 1 || vm->mode_num > monitor_def_max)
+                        return (EINVAL);
+                gv = monitor_def + (vm->mode_num - 1);
+                if (gv->mode_num == 0)
+                        return (EINVAL);
+
+                bcopy(gv, vm, sizeof(struct grfvideo_mode));
+        }
+
+        /* adjust internal values to pixel values */
+
+        vm->hblank_start *= 8;
+        vm->hblank_stop *= 8;
+        vm->hsync_start *= 8;
+        vm->hsync_stop *= 8;
+        vm->htotal *= 8;
+        
+	return (0);
+}
+
+
+int
+et_setvmode(gp, mode)
+	struct grf_softc *gp;
+	unsigned mode;
+{
+	if (!mode || (mode > monitor_def_max) ||
+	    monitor_def[mode - 1].mode_num == 0)
+		return (EINVAL);
+
+	monitor_current = monitor_def + (mode - 1);
+
+	return (0);
+}
+
+
+#ifndef TSENGCONSOLE
+void
+et_off(gp)
+	struct grf_softc *gp;
+{
+	char   *ba = gp->g_regkva;
+
+	/* we'll put the pass-through on for cc ite and set Full Bandwidth bit
+	 * on just in case it didn't work...but then it doesn't matter does
+	 * it? =) */
+	RegOnpass(ba);
+	WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x21);
+}
+#endif
+
+
+int
+et_blank(gp, on)
+        struct grf_softc *gp;
+        int *on;
+{
+        WSeq(gp->g_regkva, SEQ_ID_CLOCKING_MODE, *on ? 0x21 : 0x01);
+        return(0);
+}
+        
+
+/*
+ * Change the mode of the display.
+ * Return a UNIX error number or 0 for success.
+ */
+int
+et_mode(gp, cmd, arg, a2, a3)
+	register struct grf_softc *gp;
+	u_long cmd;
+	void *arg;
+	u_long a2;
+	int a3;
+{
+	int     error;
+
+	switch (cmd) {
+	    case GM_GRFON:
+		error = et_load_mon(gp,
+		    (struct grfettext_mode *) monitor_current) ? 0 : EINVAL;
+		return (error);
+
+	    case GM_GRFOFF:
+#ifndef TSENGCONSOLE
+		et_off(gp);
+#else
+		et_load_mon(gp, &etconsole_mode);
+#endif
+		return (0);
+
+	    case GM_GRFCONFIG:
+		return (0);
+
+	    case GM_GRFGETVMODE:
+		return (et_getvmode(gp, (struct grfvideo_mode *) arg));
+
+	    case GM_GRFSETVMODE:
+		error = et_setvmode(gp, *(unsigned *) arg);
+		if (!error && (gp->g_flags & GF_GRFON))
+			et_load_mon(gp,
+			    (struct grfettext_mode *) monitor_current);
+		return (error);
+
+	    case GM_GRFGETNUMVM:
+		*(int *) arg = monitor_def_max;
+		return (0);
+
+	    case GM_GRFIOCTL:
+		return (et_ioctl(gp, a2, arg));
+
+	    default:
+		break;
+	}
+
+	return (EINVAL);
+}
+
+int
+et_ioctl(gp, cmd, data)
+	register struct grf_softc *gp;
+	u_long cmd;
+	void   *data;
+{
+	switch (cmd) {
+	    case GRFIOCGSPRITEPOS:
+		return (et_getmousepos(gp, (struct grf_position *) data));
+
+	    case GRFIOCSSPRITEPOS:
+		return (et_setmousepos(gp, (struct grf_position *) data));
+
+	    case GRFIOCSSPRITEINF:
+		return (et_setspriteinfo(gp, (struct grf_spriteinfo *) data));
+
+	    case GRFIOCGSPRITEINF:
+		return (et_getspriteinfo(gp, (struct grf_spriteinfo *) data));
+
+	    case GRFIOCGSPRITEMAX:
+		return (et_getspritemax(gp, (struct grf_position *) data));
+
+	    case GRFIOCGETCMAP:
+		return (et_getcmap(gp, (struct grf_colormap *) data));
+
+	    case GRFIOCPUTCMAP:
+		return (et_putcmap(gp, (struct grf_colormap *) data));
+
+	    case GRFIOCBITBLT:
+		break;
+
+	    case GRFTOGGLE:
+		return (et_toggle(gp, 0));
+
+	    case GRFIOCSETMON:
+		return (et_setmonitor(gp, (struct grfvideo_mode *) data));
+
+            case GRFIOCBLANK:
+		return (et_blank(gp, (int *)data));
+	}
+	return (EINVAL);
+}
+
+
+int
+et_getmousepos(gp, data)
+	struct grf_softc *gp;
+	struct grf_position *data;
+{
+	data->x = et_cursprite.pos.x;
+	data->y = et_cursprite.pos.y;
+	return (0);
+}
+
+
+void
+et_writesprpos(ba, x, y)
+	volatile char *ba;
+	short   x;
+	short   y;
+{
+}
+
+
+#ifdef notyet
+void
+et_writeshifted(to, shiftx, shifty)
+	unsigned char *to;
+	char    shiftx;
+	char    shifty;
+{
+}
+#endif
+
+
+int
+et_setmousepos(gp, data)
+	struct grf_softc *gp;
+	struct grf_position *data;
+{
+	volatile char *ba = gp->g_regkva;
+#if 0
+	volatile char *fb = gp->g_fbkva;
+	volatile char *sprite = fb + (et_fbsize - 1024);
+#endif
+	short rx, ry, prx, pry;
+
+	/* no movement */
+	if (et_cursprite.pos.x == data->x && et_cursprite.pos.y == data->y)
+		return (0);
+
+        /* current and previous real coordinates */
+	rx = data->x - et_cursprite.hot.x;
+	ry = data->y - et_cursprite.hot.y;
+	prx = et_cursprite.pos.x - et_cursprite.hot.x;
+	pry = et_cursprite.pos.y - et_cursprite.hot.y;
+
+        /* if we are/were on an edge, create (un)shifted bitmap --
+         * ripped out optimization (not extremely worthwhile,
+         * and kind of buggy anyhow).
+         */
+#ifdef notyet
+        if (rx < 0 || ry < 0 || prx < 0 || pry < 0) {
+                et_writeshifted(sprite, rx < 0 ? -rx : 0, ry < 0 ? -ry : 0);
+        }
+#endif
+
+        /* do movement, save position */
+        et_writesprpos(ba, rx < 0 ? 0 : rx, ry < 0 ? 0 : ry);
+	et_cursprite.pos.x = data->x;
+	et_cursprite.pos.y = data->y;
+
+	return (0);
+}
+
+
+int
+et_getspriteinfo(gp, data)
+	struct grf_softc *gp;
+	struct grf_spriteinfo *data;
+{
+
+	return(EINVAL);
+}
+
+
+static int
+et_setspriteinfo(gp, data)
+	struct grf_softc *gp;
+	struct grf_spriteinfo *data;
+{
+
+	return(EINVAL);
+}
+
+
+static int
+et_getspritemax(gp, data)
+	struct grf_softc *gp;
+	struct grf_position *data;
+{
+
+	return(EINVAL);
+}
+
+
+int
+et_setmonitor(gp, gv)
+	struct grf_softc *gp;
+	struct grfvideo_mode *gv;
+{
+	struct grfvideo_mode *md;
+
+        if (!et_mondefok(gv))
+                return(EINVAL);
+
+#ifdef TSENGCONSOLE
+	/* handle interactive setting of console mode */
+	if (gv->mode_num == 255) {
+		bcopy(gv, &etconsole_mode.gv, sizeof(struct grfvideo_mode));
+                etconsole_mode.gv.hblank_start /= 8;
+                etconsole_mode.gv.hblank_stop /= 8;
+                etconsole_mode.gv.hsync_start /= 8;
+                etconsole_mode.gv.hsync_stop /= 8;
+                etconsole_mode.gv.htotal /= 8;
+		etconsole_mode.rows = gv->disp_height / etconsole_mode.fy;
+		etconsole_mode.cols = gv->disp_width / etconsole_mode.fx;
+		if (!(gp->g_flags & GF_GRFON))
+			et_load_mon(gp, &etconsole_mode);
+		ite_reinit(gp->g_itedev);
+		return (0);
+	}
+#endif
+
+	md = monitor_def + (gv->mode_num - 1);
+	bcopy(gv, md, sizeof(struct grfvideo_mode));
+
+        /* adjust pixel oriented values to internal rep. */
+
+        md->hblank_start /= 8;
+        md->hblank_stop /= 8;
+        md->hsync_start /= 8;
+        md->hsync_stop /= 8;
+        md->htotal /= 8;
+
+	return (0);
+}
+
+
+int
+et_getcmap(gfp, cmap)
+	struct grf_softc *gfp;
+	struct grf_colormap *cmap;
+{
+	volatile unsigned char *ba;
+	u_char  red[256], green[256], blue[256], *rp, *gp, *bp;
+	short   x;
+	int     error;
+
+	if (cmap->count == 0 || cmap->index >= 256)
+		return 0;
+
+	if (cmap->index + cmap->count > 256)
+		cmap->count = 256 - cmap->index;
+
+	ba = gfp->g_regkva;
+	/* first read colors out of the chip, then copyout to userspace */
+	x = cmap->count - 1;
+
+	rp = red + cmap->index;
+	gp = green + cmap->index;
+	bp = blue + cmap->index;
+
+	switch(ettype) {
+	    case MERLIN:
+		vgaw(ba, MERLIN_VDAC_INDEX, cmap->index);
+		do {
+			*rp++ = vgar(ba, MERLIN_VDAC_COLORS);
+			*gp++ = vgar(ba, MERLIN_VDAC_COLORS);
+			*bp++ = vgar(ba, MERLIN_VDAC_COLORS);
+		} while (x-- > 0);
+		break;
+	    default:
+		vgaw(ba, VDAC_ADDRESS_W, cmap->index);
+		do {
+			*rp++ = vgar(ba, VDAC_DATA) << etcmap_shift;
+			*gp++ = vgar(ba, VDAC_DATA) << etcmap_shift;
+			*bp++ = vgar(ba, VDAC_DATA) << etcmap_shift;
+		} while (x-- > 0);
+		break;
+	}
+
+	if (!(error = copyout(red + cmap->index, cmap->red, cmap->count))
+	&& !(error = copyout(green + cmap->index, cmap->green, cmap->count))
+	&& !(error = copyout(blue + cmap->index, cmap->blue, cmap->count)))
+		return (0);
+
+	return (error);
+}
+
+
+int
+et_putcmap(gfp, cmap)
+	struct grf_softc *gfp;
+	struct grf_colormap *cmap;
+{
+	volatile unsigned char *ba;
+	u_char  red[256], green[256], blue[256], *rp, *gp, *bp;
+	short   x;
+	int     error;
+
+	if (cmap->count == 0 || cmap->index >= 256)
+		return (0);
+
+	if (cmap->index + cmap->count > 256)
+		cmap->count = 256 - cmap->index;
+
+	/* first copy the colors into kernelspace */
+	if (!(error = copyin(cmap->red, red + cmap->index, cmap->count))
+	    && !(error = copyin(cmap->green, green + cmap->index, cmap->count))
+	    && !(error = copyin(cmap->blue, blue + cmap->index, cmap->count))) {
+		ba = gfp->g_regkva;
+		x = cmap->count - 1;
+
+		rp = red + cmap->index;
+		gp = green + cmap->index;
+		bp = blue + cmap->index;
+
+		switch(ettype){
+		case MERLIN:
+		  vgaw(ba, MERLIN_VDAC_INDEX, cmap->index);
+		  do {
+		    vgaw(ba, MERLIN_VDAC_COLORS, *rp++);
+		    vgaw(ba, MERLIN_VDAC_COLORS, *gp++);
+		    vgaw(ba, MERLIN_VDAC_COLORS, *bp++);
+		  } while (x-- > 0);
+		  break;
+		default:
+		  vgaw(ba, VDAC_ADDRESS_W, cmap->index);
+		  do {
+		    vgaw(ba, VDAC_DATA, *rp++ >> etcmap_shift);
+		    vgaw(ba, VDAC_DATA, *gp++ >> etcmap_shift);
+		    vgaw(ba, VDAC_DATA, *bp++ >> etcmap_shift);
+		  } while (x-- > 0);
+		  break;
+		}
+
+		return (0);
+	} else
+		return (error);
+}
+
+
+int
+et_toggle(gp, wopp)
+	struct grf_softc *gp;
+	unsigned short wopp;	/* don't need that one yet, ill */
+{
+	volatile unsigned char *ba;
+
+	ba = gp->g_regkva;
+
+	if (pass_toggle) {
+		RegOffpass(ba);
+	} else {
+		RegOnpass(ba);
+	}
+	return (0);
+}
+
+#define ET_NUMCLOCKS 32
+
+static u_char et_clocks[ET_NUMCLOCKS] = {
+	0, 1, 6, 2, 3, 7, 4, 5,
+	0, 1, 6, 2, 3, 7, 4, 5,
+	0, 1, 6, 2, 3, 7, 4, 5,
+	0, 1, 6, 2, 3, 7, 4, 5
+};
+
+static u_char et_clockdividers[ET_NUMCLOCKS] = {
+	3, 3, 3, 3, 3, 3, 3, 3,
+	2, 2, 2, 2, 2, 2, 2, 2,
+	1, 1, 1, 1, 1, 1, 1, 1,
+	0, 0, 0, 0, 0, 0, 0, 0
+};
+
+static u_int et_clockfreqs[ET_NUMCLOCKS] = {
+	  6293750,  7080500,  7875000,  8125000,
+	  9000000,  9375000, 10000000, 11225000,
+	 12587500, 14161000, 15750000, 16250000,
+	 18000000, 18750000, 20000000, 22450000,
+	 25175000, 28322000, 31500000, 32500000,
+	 36000000, 37500000, 40000000, 44900000,
+	 50350000, 56644000, 63000000, 65000000,
+	 72000000, 75000000, 80000000, 89800000
+};
+
+
+static void
+et_CompFQ(fq, num, denom)
+	u_int   fq;
+	u_char *num;
+	u_char *denom;
+{
+	int i;
+
+	for (i=0; i < ET_NUMCLOCKS;) {
+		if (fq <= et_clockfreqs[i++]) {
+			break;
+		}
+	}	
+
+	*num = et_clocks[--i];
+	*denom = et_clockdividers[i];
+
+	return;
+}
+
+
+int
+et_mondefok(gv)
+	struct grfvideo_mode *gv;
+{
+        
+	if (gv->mode_num < 1 || gv->mode_num > monitor_def_max)
+                if (gv->mode_num != 255 || gv->depth != 4)
+                        return(0);
+
+	switch (gv->depth) {
+	    case 4:
+                if (gv->mode_num != 255)
+                        return(0);
+	    case 1:
+	    case 8:
+	    case 15:
+	    case 16:
+	    case 24:
+                break;
+	    default:
+		return (0);
+	}
+        return (1);
+}
+
+
+int
+et_load_mon(gp, md)
+	struct grf_softc *gp;
+	struct grfettext_mode *md;
+{
+	struct grfvideo_mode *gv;
+	struct grfinfo *gi;
+	volatile unsigned char *ba;
+	unsigned char num0, denom0;
+	unsigned short HT, HDE, HBS, HBE, HSS, HSE, VDE, VBS, VBE, VSS,
+	        VSE, VT;
+	char    LACE, DBLSCAN, TEXT;
+	unsigned char seq;
+	int     uplim, lowlim;
+
+	/* identity */
+	gv = &md->gv;
+	TEXT = (gv->depth == 4);
+
+	if (!et_mondefok(gv)) {
+		printf("mondef not ok\n");
+		return (0);
+	}
+	ba = gp->g_regkva;
+
+	/* provide all needed information in grf device-independant locations */
+	gp->g_data = (caddr_t) gv;
+	gi = &gp->g_display;
+	gi->gd_regaddr = (caddr_t) ztwopa(ba);
+	gi->gd_regsize = 64 * 1024;
+	gi->gd_fbaddr = (caddr_t) kvtop(gp->g_fbkva);
+	gi->gd_fbsize = et_fbsize;
+	gi->gd_colors = 1 << gv->depth;
+	gi->gd_planes = gv->depth;
+	gi->gd_fbwidth = gv->disp_width;
+	gi->gd_fbheight = gv->disp_height;
+	gi->gd_fbx = 0;
+	gi->gd_fby = 0;
+	if (TEXT) {
+		gi->gd_dwidth = md->fx * md->cols;
+		gi->gd_dheight = md->fy * md->rows;
+	} else {
+		gi->gd_dwidth = gv->disp_width;
+		gi->gd_dheight = gv->disp_height;
+	}
+	gi->gd_dx = 0;
+	gi->gd_dy = 0;
+
+	/* get display mode parameters */
+
+	HBS = gv->hblank_start;
+	HBE = gv->hblank_stop;
+	HSS = gv->hsync_start;
+	HSE = gv->hsync_stop;
+	HT  = gv->htotal;
+	VBS = gv->vblank_start;
+	VSS = gv->vsync_start;
+	VSE = gv->vsync_stop;
+	VBE = gv->vblank_stop;
+	VT  = gv->vtotal;
+
+	if (TEXT)
+		HDE = ((gv->disp_width + md->fx - 1) / md->fx) - 1;
+	else
+		HDE = (gv->disp_width + 3) / 8 - 1;	/* HBS; */
+	VDE = gv->disp_height - 1;
+
+	/* figure out whether lace or dblscan is needed */
+
+	uplim = gv->disp_height + (gv->disp_height / 4);
+	lowlim = gv->disp_height - (gv->disp_height / 4);
+	LACE = (((VT * 2) > lowlim) && ((VT * 2) < uplim)) ? 1 : 0;
+	DBLSCAN = (((VT / 2) > lowlim) && ((VT / 2) < uplim)) ? 1 : 0;
+
+	/* adjustments */
+
+	if (LACE)
+		VDE /= 2;
+
+	WSeq(ba, SEQ_ID_MEMORY_MODE, (TEXT || (gv->depth == 1)) ? 0x06 : 0x0e);
+
+	WGfx(ba, GCT_ID_READ_MAP_SELECT, 0x00);
+	WSeq(ba, SEQ_ID_MAP_MASK, (gv->depth == 1) ? 0x01 : 0xff);
+	WSeq(ba, SEQ_ID_CHAR_MAP_SELECT, 0x00);
+
+	/* Set clock */
+
+	et_CompFQ( gv->pixel_clock, &num0, &denom0);
+
+	vgaw(ba, GREG_MISC_OUTPUT_W, 0xe3 | ((num0 & 3) << 2));
+	WCrt(ba, CRT_ID_6845_COMPAT, (num0 & 4) ? 0x0a : 0x08);
+	seq=RSeq(ba, SEQ_ID_CLOCKING_MODE);
+	switch(denom0) {
+	    case 0:
+		WSeq(ba, SEQ_ID_AUXILIARY_MODE, 0xb4);
+		WSeq(ba, SEQ_ID_CLOCKING_MODE, seq & 0xf7);
+ 		break;
+	    case 1:
+		WSeq(ba, SEQ_ID_AUXILIARY_MODE, 0xf4);
+		WSeq(ba, SEQ_ID_CLOCKING_MODE, seq & 0xf7);
+		break;
+	    case 2:
+		WSeq(ba, SEQ_ID_AUXILIARY_MODE, 0xf5);
+		WSeq(ba, SEQ_ID_CLOCKING_MODE, seq & 0xf7);
+		break;
+	    case 3:
+		WSeq(ba, SEQ_ID_AUXILIARY_MODE, 0xf5);
+		WSeq(ba, SEQ_ID_CLOCKING_MODE, seq | 0x08);
+		break;
+	} 
+	/* load display parameters into board */
+
+	WCrt(ba, CRT_ID_HOR_TOTAL, HT);
+	WCrt(ba, CRT_ID_HOR_DISP_ENA_END, ((HDE >= HBS) ? HBS - 1 : HDE));
+	WCrt(ba, CRT_ID_START_HOR_BLANK, HBS);
+	WCrt(ba, CRT_ID_END_HOR_BLANK, (HBE & 0x1f) | 0x80);	/* | 0x80? */
+	WCrt(ba, CRT_ID_START_HOR_RETR, HSS);
+	WCrt(ba, CRT_ID_END_HOR_RETR,
+	    (HSE & 0x1f) |
+	    ((HBE & 0x20) ? 0x80 : 0x00));
+	WCrt(ba, CRT_ID_VER_TOTAL, VT);
+	WCrt(ba, CRT_ID_OVERFLOW,
+	    0x10 |
+	    ((VT  & 0x100) ? 0x01 : 0x00) |
+	    ((VDE & 0x100) ? 0x02 : 0x00) |
+	    ((VSS & 0x100) ? 0x04 : 0x00) |
+	    ((VBS & 0x100) ? 0x08 : 0x00) |
+	    ((VT  & 0x200) ? 0x20 : 0x00) |
+	    ((VDE & 0x200) ? 0x40 : 0x00) |
+	    ((VSS & 0x200) ? 0x80 : 0x00));
+
+	WCrt(ba, CRT_ID_MAX_ROW_ADDRESS,
+	    0x40 |		/* TEXT ? 0x00 ??? */
+	    (DBLSCAN ? 0x80 : 0x00) |
+	    ((VBS & 0x200) ? 0x20 : 0x00) |
+	    (TEXT ? ((md->fy - 1) & 0x1f) : 0x00));
+
+	WCrt(ba, CRT_ID_MODE_CONTROL,
+	    ((TEXT || (gv->depth == 1)) ? 0xc3 : 0xab));
+
+	/* text cursor */
+
+	if (TEXT) {
+#if ET_ULCURSOR
+		WCrt(ba, CRT_ID_CURSOR_START, (md->fy & 0x1f) - 2);
+		WCrt(ba, CRT_ID_CURSOR_END, (md->fy & 0x1f) - 1);
+#else
+		WCrt(ba, CRT_ID_CURSOR_START, 0x00);
+		WCrt(ba, CRT_ID_CURSOR_END, md->fy & 0x1f);
+#endif
+		WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, 0x00);
+		WCrt(ba, CRT_ID_CURSOR_LOC_LOW, 0x00);
+	}
+
+	WCrt(ba, CRT_ID_UNDERLINE_LOC, ((md->fy - 1) & 0x1f)
+		| ((TEXT || (gv->depth == 1)) ? 0x00 : 0x60));
+
+	WCrt(ba, CRT_ID_START_ADDR_HIGH, 0x00);
+	WCrt(ba, CRT_ID_START_ADDR_LOW, 0x00);
+
+	WCrt(ba, CRT_ID_START_VER_RETR, VSS);
+	WCrt(ba, CRT_ID_END_VER_RETR, (VSE & 0x0f) | 0x30);
+	WCrt(ba, CRT_ID_VER_DISP_ENA_END, VDE);
+	WCrt(ba, CRT_ID_START_VER_BLANK, VBS);
+	WCrt(ba, CRT_ID_END_VER_BLANK, VBE);
+
+	WCrt(ba, CRT_ID_LINE_COMPARE, 0xff);
+
+	WCrt(ba, CRT_ID_OVERFLOW_HIGH,
+		((VBS & 0x400) ? 0x01 : 0x00) |
+		((VT  & 0x400) ? 0x02 : 0x00) |
+		((VDE & 0x400) ? 0x04 : 0x00) |
+		((VSS & 0x400) ? 0x08 : 0x00) |
+		0x10 |
+		(LACE ? 0x80 : 0x00));
+
+        WCrt(ba, CRT_ID_HOR_OVERFLOW,
+                ((HT  & 0x100) ? 0x01 : 0x00) |
+                ((HBS & 0x100) ? 0x04 : 0x00) |
+                ((HSS & 0x100) ? 0x10 : 0x00)
+        );
+
+	/* depth dependent stuff */
+
+	WGfx(ba, GCT_ID_GRAPHICS_MODE,
+	    ((TEXT || (gv->depth == 1)) ? 0x00 : 0x40));
+	WGfx(ba, GCT_ID_MISC, (TEXT ? 0x04 : 0x01));
+
+	vgaw(ba, VDAC_MASK, 0xff);
+	vgar(ba, VDAC_MASK);
+	vgar(ba, VDAC_MASK);
+	vgar(ba, VDAC_MASK);
+	vgar(ba, VDAC_MASK);
+	switch (gv->depth) {
+	    case 1:
+	    case 4:	/* text */
+		switch(etdtype) {
+		    case SIERRA11483:
+		    case SIERRA15025:
+		    case MUSICDAC:
+			vgaw(ba, VDAC_MASK, 0);
+			break;
+		    case MERLINDAC:
+			setMerlinDACmode(ba, 0);
+			break;
+		}
+		HDE = gv->disp_width / 16;
+		break;
+	    case 8:
+		switch(etdtype) {
+		    case SIERRA11483:
+		    case SIERRA15025:
+		    case MUSICDAC:
+			vgaw(ba, VDAC_MASK, 0);
+			break;
+		    case MERLINDAC:
+			setMerlinDACmode(ba, 0);
+			break;
+		}
+		HDE = gv->disp_width / 8;
+		break;
+	    case 15:
+		switch(etdtype) {
+		    case SIERRA11483:
+		    case SIERRA15025:
+		    case MUSICDAC:
+			vgaw(ba, VDAC_MASK, 0xa0);
+			break;
+		    case MERLINDAC:
+			setMerlinDACmode(ba, 0xa0);
+			break;
+		}
+		HDE = gv->disp_width / 4;
+		break;
+	    case 16:
+		switch(etdtype) {
+		    case SIERRA11483:
+			vgaw(ba, VDAC_MASK, 0);	/* illegal mode! */
+			break;
+		    case SIERRA15025:
+			vgaw(ba, VDAC_MASK, 0xe0);
+			break;
+		    case MUSICDAC:
+			vgaw(ba, VDAC_MASK, 0xc0);
+			break;
+		    case MERLINDAC:
+			setMerlinDACmode(ba, 0xe0);
+			break;
+		}
+		HDE = gv->disp_width / 4;
+		break;
+	    case 24:
+		switch(etdtype) {
+		    case SIERRA11483:
+			vgaw(ba, VDAC_MASK, 0);	/* illegal mode! */
+			break;
+		    case SIERRA15025:
+			vgaw(ba, VDAC_MASK, 0xe1);
+			break;
+		    case MUSICDAC:
+			vgaw(ba, VDAC_MASK, 0xe0);
+			break;
+		    case MERLINDAC:
+			setMerlinDACmode(ba, 0xf0);
+			break;
+		}
+		HDE = (gv->disp_width / 8) * 3;
+		break;
+	    case 32:
+		switch(etdtype) {
+		    case SIERRA11483:
+		    case MUSICDAC:
+			vgaw(ba, VDAC_MASK, 0);	/* illegal mode! */
+			break;
+		    case SIERRA15025:
+			vgaw(ba, VDAC_MASK, 0x61);
+			break;
+		    case MERLINDAC:
+			setMerlinDACmode(ba, 0xb0);
+			break;
+		}
+		HDE = gv->disp_width / 2;
+		break;
+	}
+	WAttr(ba, ACT_ID_ATTR_MODE_CNTL, (TEXT ? 0x0a : 0x01));
+	WAttr(ba, 0x20 | ACT_ID_COLOR_PLANE_ENA,
+	    (gv->depth == 1) ? 0x01 : 0x0f);
+
+	WCrt(ba, CRT_ID_OFFSET, HDE);
+
+	/* text initialization */
+	if (TEXT) {
+		et_inittextmode(gp);
+	}
+
+	WSeq(ba, SEQ_ID_CLOCKING_MODE, 0x01);
+
+	/* Pass-through */
+	RegOffpass(ba);
+
+	return (1);
+}
+
+
+void
+et_inittextmode(gp)
+	struct grf_softc *gp;
+{
+	struct grfettext_mode *tm = (struct grfettext_mode *) gp->g_data;
+	volatile unsigned char *ba = gp->g_regkva;
+	unsigned char *fb = gp->g_fbkva;
+	unsigned char *c, *f, y;
+	unsigned short z;
+
+
+	/* load text font into beginning of display memory. Each character
+	 * cell is 32 bytes long (enough for 4 planes) */
+
+	SetTextPlane(ba, 0x02);
+        et_memset(fb, 0, 256 * 32);
+	c = (unsigned char *) (fb) + (32 * tm->fdstart);
+	f = tm->fdata;
+	for (z = tm->fdstart; z <= tm->fdend; z++, c += (32 - tm->fy))
+		for (y = 0; y < tm->fy; y++)
+			*c++ = *f++;
+
+	/* clear out text/attr planes (three screens worth) */
+
+	SetTextPlane(ba, 0x01);
+	et_memset(fb, 0x07, tm->cols * tm->rows * 3);
+	SetTextPlane(ba, 0x00);
+	et_memset(fb, 0x20, tm->cols * tm->rows * 3);
+
+	/* print out a little init msg */
+
+	c = (unsigned char *) (fb) + (tm->cols - 16);
+	strcpy(c, "TSENG");
+	c[6] = 0x20;
+
+	/* set colors (B&W) */
+
+	switch(ettype) {
+	    case MERLIN:
+		vgaw(ba, MERLIN_VDAC_INDEX, 0);
+		for (z = 0; z < 256; z++) {
+			y = (z & 1) ? ((z > 7) ? 2 : 1) : 0;
+	    
+			vgaw(ba, MERLIN_VDAC_COLORS, etconscolors[y][0]);
+			vgaw(ba, MERLIN_VDAC_COLORS, etconscolors[y][1]);
+			vgaw(ba, MERLIN_VDAC_COLORS, etconscolors[y][2]);
+		}
+		break;
+	    default:
+		vgaw(ba, VDAC_ADDRESS_W, 0);
+		for (z = 0; z < 256; z++) {
+			y = (z & 1) ? ((z > 7) ? 2 : 1) : 0;
+	    
+			vgaw(ba, VDAC_DATA, etconscolors[y][0] >> etcmap_shift);
+			vgaw(ba, VDAC_DATA, etconscolors[y][1] >> etcmap_shift);
+			vgaw(ba, VDAC_DATA, etconscolors[y][2] >> etcmap_shift);
+		}
+		break;
+	}
+}
+
+
+void
+et_memset(d, c, l)
+	unsigned char *d;
+	unsigned char c;
+	int     l;
+{
+	for (; l > 0; l--)
+		*d++ = c;
+}
+
+
+static int
+et_getControllerType(gp)
+	struct grf_softc * gp;
+{
+	unsigned char *ba = gp->g_regkva; /* register base */
+	unsigned char *mem = gp->g_fbkva; /* memory base */
+	unsigned char *mmu = mem + MMU_APERTURE0; /* MMU aperture 0 base */
+
+	*mem = 0;
+
+	/* make ACL visible */
+	WCrt(ba, CRT_ID_VIDEO_CONFIG1, 0xfb);
+	WIma(ba, IMA_PORTCONTROL, 0x01);
+
+	*((unsigned long *)mmu) = 0;
+	*(mem + 0x13) = 0x38;
+ 
+	*mmu = 0xff;
+
+	/* hide ACL */
+	WIma(ba, IMA_PORTCONTROL, 0x00);
+	WCrt(ba, CRT_ID_VIDEO_CONFIG1, 0xd3);
+ 
+	return((*mem == 0xff) ? ETW32 : ET4000);
+}
+
+
+static int
+et_getDACType(gp)
+	struct grf_softc * gp;
+{
+	unsigned char *ba = gp->g_regkva;
+	union {
+		int  tt;
+		char cc[4];
+	} check;
+
+	/* check for Sierra SC 15025 */
+
+  if(vgar(ba, HDR)); if(vgar(ba, HDR)); if(vgar(ba, HDR)); if(vgar(ba, HDR));
+  vgaw(ba, VDAC_COMMAND, 0x10); /* set ERPF */
+
+  vgaw(ba, VDAC_XINDEX, 9);
+  check.cc[0]=vgar(ba, VDAC_XDATA);
+  vgaw(ba, VDAC_XINDEX, 10);
+  check.cc[1]=vgar(ba, VDAC_XDATA);
+  vgaw(ba, VDAC_XINDEX, 11);
+  check.cc[2]=vgar(ba, VDAC_XDATA);
+  vgaw(ba, VDAC_XINDEX, 12);
+  check.cc[3]=vgar(ba, VDAC_XDATA);
+  
+  if(vgar(ba, HDR)); if(vgar(ba, HDR)); if(vgar(ba, HDR)); if(vgar(ba, HDR));
+  vgaw(ba, VDAC_COMMAND, 0x00); /* clear ERPF */
+
+  if(check.tt == 0x533ab141){
+    if(vgar(ba, HDR)); if(vgar(ba, HDR)); if(vgar(ba, HDR)); if(vgar(ba, HDR));
+    vgaw(ba, VDAC_COMMAND, 0x10); /* set ERPF */
+   
+    /* switch to 8 bits per color */
+    vgaw(ba, VDAC_XINDEX, 8);
+    vgaw(ba, VDAC_XDATA, 1);
+    /* do not shift color values */
+    etcmap_shift = 0;
+    
+    if(vgar(ba, HDR)); if(vgar(ba, HDR)); if(vgar(ba, HDR)); if(vgar(ba, HDR));
+    vgaw(ba, VDAC_COMMAND, 0x00); /* clear ERPF */
+    
+    vgaw(ba, VDAC_MASK, 0xff);
+    return(SIERRA15025);
+  }
+
+  /* check for MUSIC DAC */
+  
+  if(vgar(ba, HDR)); if(vgar(ba, HDR)); if(vgar(ba, HDR)); if(vgar(ba, HDR));
+  vgaw(ba, VDAC_COMMAND, 0x02); /* set some strange MUSIC mode (???) */
+  
+  vgaw(ba, VDAC_XINDEX, 0x01);
+  if(vgar(ba, VDAC_XDATA) == 0x01){
+    /* shift color values by 2 */
+    etcmap_shift = 2;
+
+    vgaw(ba, VDAC_MASK, 0xff);
+    return(MUSICDAC);
+  }
+
+	/* nothing else found, so let us pretend it is a stupid Sierra SC 11483 */
+	/* shift color values by 2 */
+	etcmap_shift = 2;
+ 
+	vgaw(ba, VDAC_MASK, 0xff);
+	return(SIERRA11483);  
+}
+
+#endif /* NGRFET */
diff --git a/sys/arch/amiga/dev/grf_etreg.h b/sys/arch/amiga/dev/grf_etreg.h
new file mode 100644
index 00000000000..41e82d8ab80
--- /dev/null
+++ b/sys/arch/amiga/dev/grf_etreg.h
@@ -0,0 +1,385 @@
+/*	$NetBSD: grf_etreg.h,v 1.1 1996/05/19 21:05:34 veego Exp $	*/
+
+/*
+ * Copyright (c) 1996 Tobias Abt
+ * Copyright (c) 1995 Ezra Story
+ * Copyright (c) 1995 Kari Mettinen
+ * Copyright (c) 1994 Markus Wild
+ * Copyright (c) 1994 Lutz Vieweg
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *      This product includes software developed by Lutz Vieweg.
+ * 4. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.   
+ */
+
+#ifndef _GRF_ETREG_H
+#define _GRF_ETREG_H
+
+/*
+ * Written & Copyright by Kari Mettinen, Ezra Story.
+ *
+ * This is derived from Cirrus driver source
+ */
+
+/* Extension to grfvideo_mode to support text modes.
+ * This can be passed to both text & gfx functions 
+ * without worry.  If gv.depth == 4, then the extended
+ * fields for a text mode are present.
+ */
+struct grfettext_mode {
+    	struct grfvideo_mode gv;
+    	unsigned short	fx; 	    /* font x dimension */
+    	unsigned short	fy; 	    /* font y dimension */
+    	unsigned short  cols;       /* screen dimensions */
+    	unsigned short	rows;
+    	void	    	*fdata;     /* font data */
+    	unsigned short	fdstart;
+    	unsigned short	fdend;
+};
+
+
+/* Tseng boards types, stored in ettype in grf_et.c.
+ * used to decide how to handle Pass-through, etc. 
+ */
+
+#define OMNIBUS		2181
+#define DOMINO		2167
+#define MERLIN		2117
+
+/* VGA controller types */
+#define ET4000      0
+#define ETW32       1
+
+/* DAC types */
+#define SIERRA11483 0    /* Sierra 11483 HiColor DAC */
+#define SIERRA15025 1    /* Sierra 15025 TrueColor DAC */
+#define MUSICDAC    2    /* MUSIC TrueColor DAC */
+#define MERLINDAC   3    /* Merlin's BrookTree TrueColor DAC */
+
+/* read VGA register */
+#define vgar(ba, reg) (*(((volatile unsigned char *)ba)+reg))
+
+/* write VGA register */
+#define vgaw(ba, reg, val) \
+	*(((volatile unsigned char *)ba)+reg) = ((unsigned char)val)
+
+/*
+ * defines for the used register addresses (mw)
+ *
+ * NOTE: there are some registers that have different addresses when
+ *       in mono or color mode. We only support color mode, and thus
+ *       some addresses won't work in mono-mode!
+ *
+ * General and VGA-registers taken from retina driver. Fixed a few
+ * bugs in it. (SR and GR read address is Port + 1, NOT Port)
+ *
+ */
+
+/* General Registers: */
+#define GREG_STATUS0_R		0x03C2
+#define GREG_STATUS1_R		0x03DA
+#define GREG_MISC_OUTPUT_R	0x03CC
+#define GREG_MISC_OUTPUT_W	0x03C2	
+#define GREG_FEATURE_CONTROL_R	0x03CA
+#define GREG_FEATURE_CONTROL_W	0x03DA
+#define GREG_POS		0x0102
+#define	GREG_HERCULESCOMPAT	0x03BF
+#define	GREG_VIDEOSYSENABLE	0x03C3
+#define	GREG_DISPMODECONTROL	0x03D8
+#define	GREG_COLORSELECT	0x03D9
+#define	GREG_ATNTMODECONTROL	0x03DE
+#define	GREG_SEGMENTSELECT	0x03CD
+
+/* ETW32 special */
+#define W32mappedRegs 0xfff00
+    
+/* MMU */
+#define MMU_APERTURE0 0x80000
+#define MMU_APERTURE1 0xa0000
+#define MMU_APERTURE2 0xc0000
+
+/* Accellerator */
+
+/* Attribute Controller: */
+#define ACT_ADDRESS		0x03C0
+#define ACT_ADDRESS_R		0x03C1
+#define ACT_ADDRESS_W		0x03C0
+#define ACT_ADDRESS_RESET	0x03DA
+#define ACT_ID_PALETTE0		0x00
+#define ACT_ID_PALETTE1		0x01
+#define ACT_ID_PALETTE2		0x02
+#define ACT_ID_PALETTE3		0x03
+#define ACT_ID_PALETTE4		0x04
+#define ACT_ID_PALETTE5		0x05
+#define ACT_ID_PALETTE6		0x06
+#define ACT_ID_PALETTE7		0x07
+#define ACT_ID_PALETTE8		0x08
+#define ACT_ID_PALETTE9		0x09
+#define ACT_ID_PALETTE10	0x0A
+#define ACT_ID_PALETTE11	0x0B
+#define ACT_ID_PALETTE12	0x0C
+#define ACT_ID_PALETTE13	0x0D
+#define ACT_ID_PALETTE14	0x0E
+#define ACT_ID_PALETTE15	0x0F
+#define ACT_ID_ATTR_MODE_CNTL	0x10
+#define ACT_ID_OVERSCAN_COLOR	0x11
+#define ACT_ID_COLOR_PLANE_ENA	0x12
+#define ACT_ID_HOR_PEL_PANNING	0x13
+#define ACT_ID_COLOR_SELECT	0x14
+#define	ACT_ID_MISCELLANEOUS	0x16
+
+/* Graphics Controller: */
+#define GCT_ADDRESS		0x03CE
+#define GCT_ADDRESS_R		0x03CF
+#define GCT_ADDRESS_W		0x03CF
+#define GCT_ID_SET_RESET	0x00
+#define GCT_ID_ENABLE_SET_RESET	0x01
+#define GCT_ID_COLOR_COMPARE	0x02
+#define GCT_ID_DATA_ROTATE	0x03
+#define GCT_ID_READ_MAP_SELECT	0x04
+#define GCT_ID_GRAPHICS_MODE	0x05
+#define GCT_ID_MISC		0x06
+#define GCT_ID_COLOR_XCARE	0x07
+#define GCT_ID_BITMASK		0x08
+
+/* Sequencer: */
+#define SEQ_ADDRESS		0x03C4
+#define SEQ_ADDRESS_R		0x03C5
+#define SEQ_ADDRESS_W		0x03C5
+#define SEQ_ID_RESET		0x00
+#define SEQ_ID_CLOCKING_MODE	0x01
+#define SEQ_ID_MAP_MASK		0x02
+#define SEQ_ID_CHAR_MAP_SELECT	0x03
+#define SEQ_ID_MEMORY_MODE	0x04
+#define	SEQ_ID_STATE_CONTROL	0x06
+#define	SEQ_ID_AUXILIARY_MODE	0x07
+
+/* don't know about them right now...
+#define TEXT_PLANE_CHAR	    0x01
+#define TEXT_PLANE_ATTR	    0x02
+#define TEXT_PLANE_FONT	    0x04
+*/
+
+/* CRT Controller: */
+#define CRT_ADDRESS		0x03D4
+#define CRT_ADDRESS_R		0x03D5
+#define CRT_ADDRESS_W		0x03D5
+#define CRT_ID_HOR_TOTAL	0x00
+#define CRT_ID_HOR_DISP_ENA_END	0x01
+#define CRT_ID_START_HOR_BLANK	0x02
+#define CRT_ID_END_HOR_BLANK	0x03
+#define CRT_ID_START_HOR_RETR	0x04
+#define CRT_ID_END_HOR_RETR	0x05
+#define CRT_ID_VER_TOTAL	0x06
+#define CRT_ID_OVERFLOW		0x07
+#define CRT_ID_PRESET_ROW_SCAN	0x08
+#define	CRT_ID_MAX_ROW_ADDRESS	0x09
+#define CRT_ID_CURSOR_START	0x0A
+#define CRT_ID_CURSOR_END	0x0B
+#define CRT_ID_START_ADDR_HIGH	0x0C
+#define CRT_ID_START_ADDR_LOW	0x0D
+#define CRT_ID_CURSOR_LOC_HIGH	0x0E
+#define CRT_ID_CURSOR_LOC_LOW	0x0F
+#define CRT_ID_START_VER_RETR	0x10
+#define CRT_ID_END_VER_RETR	0x11
+#define CRT_ID_VER_DISP_ENA_END	0x12
+#define CRT_ID_OFFSET		0x13
+#define CRT_ID_UNDERLINE_LOC	0x14
+#define CRT_ID_START_VER_BLANK	0x15
+#define CRT_ID_END_VER_BLANK	0x16
+#define CRT_ID_MODE_CONTROL	0x17
+#define CRT_ID_LINE_COMPARE	0x18
+
+#define	CRT_ID_SEGMENT_COMP	0x30
+#define	CRT_ID_GENERAL_PURPOSE	0x31
+#define	CRT_ID_RASCAS_CONFIG	0x32
+#define	CTR_ID_EXT_START	0x33
+#define	CRT_ID_6845_COMPAT	0x34
+#define	CRT_ID_OVERFLOW_HIGH	0x35
+#define	CRT_ID_VIDEO_CONFIG1	0x36
+#define	CRT_ID_VIDEO_CONFIG2	0x37
+#define	CRT_ID_HOR_OVERFLOW	0x3f
+
+/* IMAGE port */
+#define IMA_ADDRESS		0x217a
+#define IMA_ADDRESS_R		0x217b
+#define IMA_ADDRESS_W		0x217b
+#define IMA_STARTADDRESSLOW     0xf0
+#define IMA_STARTADDRESSMIDDLE  0xf1
+#define IMA_STARTADDRESSHIGH    0xf2
+#define IMA_TRANSFERLENGTHLOW   0xf3
+#define IMA_TRANSFERLENGTHHIGH  0xf4
+#define IMA_ROWOFFSETLOW        0xf5
+#define IMA_ROWOFFSETHIGH       0xf6
+#define IMA_PORTCONTROL         0xf7
+
+/* Pass-through */
+#define PASS_ADDRESS		0x8000
+#define PASS_ADDRESS_W		0x8000
+
+/* Video DAC */
+#define VDAC_ADDRESS		0x03c8
+#define VDAC_ADDRESS_W		0x03c8
+#define VDAC_ADDRESS_R		0x03c7
+#define VDAC_STATE		0x03c7
+#define VDAC_DATA		0x03c9
+#define VDAC_MASK		0x03c6
+#define HDR			0x03c6	/* Hidden DAC register, 4 reads to access */
+
+#define VDAC_COMMAND 0x03c6
+#define VDAC_XINDEX 0x03c7
+#define VDAC_XDATA 0x03c8
+
+#define MERLIN_VDAC_INDEX 0x01
+#define MERLIN_VDAC_COLORS 0x05
+#define MERLIN_VDAC_SPRITE 0x09
+#define MERLIN_VDAC_DATA 0x19
+#define MERLIN_SWITCH_REG 0x0401
+
+#define WGfx(ba, idx, val) \
+	do { vgaw(ba, GCT_ADDRESS, idx); vgaw(ba, GCT_ADDRESS_W , val); } while (0)
+
+#define WSeq(ba, idx, val) \
+	do { vgaw(ba, SEQ_ADDRESS, idx); vgaw(ba, SEQ_ADDRESS_W , val); } while (0)
+
+#define WCrt(ba, idx, val) \
+	do { vgaw(ba, CRT_ADDRESS, idx); vgaw(ba, CRT_ADDRESS_W , val); } while (0)
+
+#define WIma(ba, idx, val) \
+	do { vgaw(ba, IMA_ADDRESS, idx); vgaw(ba, IMA_ADDRESS_W , val); } while (0)
+
+#define WAttr(ba, idx, val) \
+	do {	\
+		if(vgar(ba, GREG_STATUS1_R));\
+		vgaw(ba, ACT_ADDRESS_W, idx);\
+		vgaw(ba, ACT_ADDRESS_W, val);\
+	} while (0)
+
+#define SetTextPlane(ba, m) \
+	do { \
+		WGfx(ba, GCT_ID_READ_MAP_SELECT, m & 3 );\
+		WSeq(ba, SEQ_ID_MAP_MASK, (1 << (m & 3)));\
+	} while (0)
+
+#define setMerlinDACmode(ba, mode) \
+	do { \
+		vgaw(ba, VDAC_MASK,  mode | (vgar(ba, VDAC_MASK) & 0x0f));\
+	} while (0)
+
+/* Special wakeup/passthrough registers on graphics boards
+ *
+ * The methods have diverged a bit for each board, so
+ * WPass(P) has been converted into a set of specific
+ * inline functions.
+ */
+static inline void RegWakeup(volatile void *ba) {
+    	extern int ettype;
+
+    	switch (ettype) { 
+    	case OMNIBUS: 
+    	    	vgaw(ba, PASS_ADDRESS_W, 0x00); 
+    	    	break; 
+/*
+    	case DOMINO: 
+    	    	vgaw(ba, PASS_ADDRESS_W, 0x00); 
+    	    	break; 
+    	case MERLIN: 
+    	    	break; 
+*/
+    	} 
+    	delay(200000);
+}
+
+
+static inline void RegOnpass(volatile void *ba) {
+    	extern int ettype;
+	extern unsigned char pass_toggle;
+	extern unsigned char Merlin_switch;
+
+    	switch (ettype) { 
+    	case OMNIBUS: 
+	  vgaw(ba, PASS_ADDRESS_W, 0x00); 
+	  break; 
+    	case DOMINO: 
+	  vgaw(ba, PASS_ADDRESS_W, 0x00); 
+	  break; 
+    	case MERLIN:
+	  Merlin_switch &= 0xfe;
+	  vgaw(ba, MERLIN_SWITCH_REG, Merlin_switch);
+    	    	break;
+    	} 
+    	pass_toggle = 1;
+    	delay(200000);
+}
+
+
+static inline void RegOffpass(volatile void *ba) {
+    	extern int ettype;
+    	extern unsigned char pass_toggle;
+	extern unsigned char Merlin_switch;
+
+    	switch (ettype) { 
+    	case OMNIBUS: 
+    	    	vgaw(ba, PASS_ADDRESS_W, 0x01); 
+    	    	break; 
+    	case DOMINO: 
+    	    	vgaw(ba, PASS_ADDRESS_W, 0x00); 
+    	    	break; 
+    	case MERLIN:
+	  Merlin_switch |= 0x01;
+	  vgaw(ba, MERLIN_SWITCH_REG, Merlin_switch);
+    	    	break;
+    	} 
+    	pass_toggle = 0;
+    	delay(200000);
+}
+
+static inline unsigned char RAttr(volatile void * ba, short idx) {
+	if(vgar(ba, GREG_STATUS1_R));
+	vgaw(ba, ACT_ADDRESS_W, idx);
+	return vgar (ba, ACT_ADDRESS_R);
+}
+
+static inline unsigned char RSeq(volatile void * ba, short idx) {
+	vgaw (ba, SEQ_ADDRESS, idx);
+	return vgar (ba, SEQ_ADDRESS_R);
+}
+
+static inline unsigned char RCrt(volatile void * ba, short idx) {
+	vgaw (ba, CRT_ADDRESS, idx);
+	return vgar (ba, CRT_ADDRESS_R);
+}
+
+static inline unsigned char RGfx(volatile void * ba, short idx) {
+	vgaw(ba, GCT_ADDRESS, idx);
+	return vgar (ba, GCT_ADDRESS_R);
+}
+
+int et_mode __P((register struct grf_softc *gp, u_long cmd, void *arg, u_long a2, int a3));
+int et_load_mon __P((struct grf_softc *gp, struct grfettext_mode *gv)); 
+int grfet_cnprobe __P((void));
+void grfet_iteinit __P((struct grf_softc *gp));
+
+#endif /* _GRF_ETREG_H */
diff --git a/sys/arch/amiga/dev/grf_rh.c b/sys/arch/amiga/dev/grf_rh.c
index aafc22f54d3..b24b5794a0d 100644
--- a/sys/arch/amiga/dev/grf_rh.c
+++ b/sys/arch/amiga/dev/grf_rh.c
@@ -1,5 +1,5 @@
-/*	$OpenBSD: grf_rh.c,v 1.6 1996/05/04 13:54:26 niklas Exp $	*/
-/*	$NetBSD: grf_rh.c,v 1.15 1996/05/01 09:59:26 veego Exp $	*/
+/*	$OpenBSD: grf_rh.c,v 1.7 1996/05/29 10:15:10 niklas Exp $	*/
+/*	$NetBSD: grf_rh.c,v 1.17 1996/05/19 21:05:37 veego Exp $	*/
 
 /*
  * Copyright (c) 1994 Markus Wild
@@ -56,7 +56,7 @@ enum mode_type { MT_TXTONLY, MT_GFXONLY, MT_BOTH };
 
 int rh_mondefok __P((struct MonDef *));
 
-u_short CompFQ __P((u_int fq));
+u_short rh_CompFQ __P((u_int fq));
 int rh_load_mon __P((struct grf_softc *gp, struct MonDef *md));
 int rh_getvmode __P((struct grf_softc *gp, struct grfvideo_mode *vm));
 int rh_setvmode __P((struct grf_softc *gp, unsigned int mode, 
@@ -664,7 +664,7 @@ RZ3SetHWCloc (gp, x, y)
 }
 
 u_short
-CompFQ(fq)
+rh_CompFQ(fq)
 	u_int fq;
 {
  	/* yuck... this sure could need some explanation.. */
@@ -722,15 +722,15 @@ rh_mondefok(mdp)
 	struct MonDef *mdp;
 {
 	switch(mdp->DEP) {
-	case 8:
-	case 16:
-        case 24:
+	    case 8:
+	    case 16:
+            case 24:
 		return(1);
-	case 4:
+	    case 4:
 		if (mdp->FX == 4 || (mdp->FX >= 7 && mdp->FX <= 16))
 			return(1);
 		/*FALLTHROUGH*/
-	default:
+	    default:
 		return(0);
 	}
 }
@@ -788,40 +788,40 @@ rh_load_mon(gp, md)
 	FW =0;
 	if (md->DEP == 4) {		/* XXX some text-mode! */
 		switch (md->FX) {
-		case 4:
+		    case 4:
 			FW = 0;
 			break;
-		case 7:
+		    case 7:
 			FW = 1;
 			break;
-		case 8:
+		    case 8:
 			FW = 2;
 			break;
-		case 9:
+		    case 9:
 			FW = 3;
 			break;
-		case 10:
+		    case 10:
 			FW = 4;
 			break;
-		case 11:
+		    case 11:
 			FW = 5;
 			break;
-		case 12:
+		    case 12:
 			FW = 6;
 			break;
-		case 13:
+		    case 13:
 			FW = 7;
 			break;
-		case 14:
+		    case 14:
 			FW = 8;
 			break;
-		case 15:
+		    case 15:
 			FW = 9;
 			break;
-		case 16:
+		    case 16:
 			FW = 11;
 			break;
-		default:
+		    default:
 			return(0);
 			break;
 		}
@@ -1003,9 +1003,9 @@ rh_load_mon(gp, md)
 	WCrt(ba, CRT_ID_MONITOR_POWER, 0x00);
 
 	{
-		unsigned short tmp = CompFQ(md->FQ);
+		unsigned short tmp = rh_CompFQ(md->FQ);
 		WPLL(ba, 2   , tmp);
-                tmp = CompFQ(rh_memclk);
+                tmp = rh_CompFQ(rh_memclk);
 		WPLL(ba,10   , tmp);
 		WPLL(ba,14   , 0x22);
 	}
@@ -1494,6 +1494,12 @@ grfrhattach(pdp, dp, auxp)
 		    (char *)&gp[1] - (char *)&gp->g_display);
 	} else {
 		gp->g_regkva = (volatile caddr_t)zap->va;
+
+		gp->g_regkva[0x3c8]=0;
+		gp->g_regkva[0x3c9]=30;
+		gp->g_regkva[0x3c9]=30;
+		gp->g_regkva[0x3c9]=00;
+
 		gp->g_fbkva = (volatile caddr_t)zap->va + LM_OFFSET;
 		gp->g_unit = GRF_RETINAIII_UNIT;
 		gp->g_mode = rh_mode;
@@ -1617,38 +1623,38 @@ rh_mode(gp, cmd, arg, a2, a3)
 	int a3;
 {
 	switch (cmd) {
-	case GM_GRFON:
+	    case GM_GRFON:
                 rh_setvmode (gp, rh_default_gfx + 1, MT_GFXONLY);
 		return(0);
 
-	case GM_GRFOFF:
+	    case GM_GRFOFF:
                 rh_setvmode (gp, rh_default_mon + 1, MT_TXTONLY);
 		return(0);
 
-	case GM_GRFCONFIG:
+	    case GM_GRFCONFIG:
 		return(0);
 
-	case GM_GRFGETVMODE:
+	    case GM_GRFGETVMODE:
 		return(rh_getvmode (gp, (struct grfvideo_mode *) arg));
 
-	case GM_GRFSETVMODE:
+	    case GM_GRFSETVMODE:
                 return(rh_setvmode (gp, *(unsigned *) arg, 
                                     (gp->g_flags & GF_GRFON) ? MT_GFXONLY : MT_TXTONLY));
 
-	case GM_GRFGETNUMVM:
+	    case GM_GRFGETNUMVM:
 		*(int *)arg = rh_mon_max;
 		return(0);
 
 #ifdef BANKEDDEVPAGER
-	case GM_GRFGETBANK:
-	case GM_GRFGETCURBANK:
-	case GM_GRFSETBANK:
+	    case GM_GRFGETBANK:
+	    case GM_GRFGETCURBANK:
+	    case GM_GRFSETBANK:
 		return(EINVAL);
 #endif
-	case GM_GRFIOCTL:
+	    case GM_GRFIOCTL:
 		return(rh_ioctl (gp, a2, arg));
 
-	default:
+	    default:
 		break;
 	}
 
@@ -1662,29 +1668,32 @@ rh_ioctl (gp, cmd, data)
 	void *data;
 {
 	switch (cmd) {
-	case GRFIOCGSPRITEPOS:
+	    case GRFIOCGSPRITEPOS:
 		return(rh_getspritepos (gp, (struct grf_position *) data));
 
-	case GRFIOCSSPRITEPOS:
+	    case GRFIOCSSPRITEPOS:
 		return(rh_setspritepos (gp, (struct grf_position *) data));
 
-	case GRFIOCSSPRITEINF:
+	    case GRFIOCSSPRITEINF:
 		return(rh_setspriteinfo (gp, (struct grf_spriteinfo *) data));
 
-	case GRFIOCGSPRITEINF:
+	    case GRFIOCGSPRITEINF:
 		return(rh_getspriteinfo (gp, (struct grf_spriteinfo *) data));
 
-	case GRFIOCGSPRITEMAX:
+	    case GRFIOCGSPRITEMAX:
 		return(rh_getspritemax (gp, (struct grf_position *) data));
 
-	case GRFIOCGETCMAP:
+	    case GRFIOCGETCMAP:
 		return(rh_getcmap (gp, (struct grf_colormap *) data));
 
-	case GRFIOCPUTCMAP:
+	    case GRFIOCPUTCMAP:
 		return(rh_putcmap (gp, (struct grf_colormap *) data));
 
-	case GRFIOCBITBLT:
+	    case GRFIOCBITBLT:
 		return(rh_bitblt (gp, (struct grf_bitblt *) data));
+
+	    case GRFIOCBLANK:
+		return (rh_blank(gp, (int *)data));
 	}
 
 	return(EINVAL);
@@ -2048,4 +2057,21 @@ rh_bitblt (gp, bb)
 
 	return(0);
 }
+
+
+int
+rh_blank(gp, on)
+	struct grf_softc *gp;
+	int *on;
+{
+	int r;
+
+	r = RSeq(gp->g_regkva, SEQ_ID_CLOCKING_MODE);
+	r &= 0xdf;	/* set Bit 5 to 0 */
+
+	WSeq(gp->g_regkva, SEQ_ID_CLOCKING_MODE, r | (*on ? 0x00 : 0x20));
+
+	return(0);
+}
+
 #endif	/* NGRF */
diff --git a/sys/arch/amiga/dev/grf_rhreg.h b/sys/arch/amiga/dev/grf_rhreg.h
index 9e47b1d000c..d4dd0d0526f 100644
--- a/sys/arch/amiga/dev/grf_rhreg.h
+++ b/sys/arch/amiga/dev/grf_rhreg.h
@@ -1,5 +1,5 @@
-/*	$OpenBSD: grf_rhreg.h,v 1.2 1996/05/02 06:43:49 niklas Exp $	*/
-/*	$NetBSD: grf_rhreg.h,v 1.6 1996/04/21 21:11:19 veego Exp $	*/
+/*	$OpenBSD: grf_rhreg.h,v 1.3 1996/05/29 10:15:13 niklas Exp $	*/
+/*	$NetBSD: grf_rhreg.h,v 1.7 1996/05/19 21:05:41 veego Exp $	*/
 
 /*
  * Copyright (c) 1994 Markus Wild
@@ -695,6 +695,7 @@ int rh_getspriteinfo __P((struct grf_softc *gp, struct grf_spriteinfo *info));
 int rh_setspriteinfo __P((struct grf_softc *gp, struct grf_spriteinfo *info));
 int rh_getspritemax __P((struct grf_softc *gp, struct grf_position *pos));
 int rh_bitblt __P((struct grf_softc *gp, struct grf_bitblt *bb));
+int rh_blank __P((struct grf_softc *, int *));
 
 struct ite_softc;
 void rh_init __P((struct ite_softc *));
diff --git a/sys/arch/amiga/dev/grf_rt.c b/sys/arch/amiga/dev/grf_rt.c
index a398ab52fd4..0a28eed7381 100644
--- a/sys/arch/amiga/dev/grf_rt.c
+++ b/sys/arch/amiga/dev/grf_rt.c
@@ -1,5 +1,5 @@
-/*	$OpenBSD: grf_rt.c,v 1.5 1996/05/04 13:54:29 niklas Exp $	*/
-/*	$NetBSD: grf_rt.c,v 1.26 1996/05/01 09:59:28 veego Exp $	*/
+/*	$OpenBSD: grf_rt.c,v 1.6 1996/05/29 10:15:15 niklas Exp $	*/
+/*	$NetBSD: grf_rt.c,v 1.27 1996/05/19 21:05:45 veego Exp $	*/
 
 /*
  * Copyright (c) 1993 Markus Wild
@@ -305,40 +305,40 @@ rt_load_mon(gp, md)
 	FW = 0;
 	if (md->DEP == 4) {
 		switch (md->FX) {
-		case 4:
+		    case 4:
 			FW = 0;
 			break;
-		case 7:
+		    case 7:
 			FW = 1;
 			break;
-		case 8:
+		    case 8:
 			FW = 2;
 			break;
-		case 9:
+		    case 9:
 			FW = 3;
 			break;
-		case 10:
+		    case 10:
 			FW = 4;
 			break;
-		case 11:
+		    case 11:
 			FW = 5;
 			break;
-		case 12:
+		    case 12:
 			FW = 6;
 			break;
-		case 13:
+		    case 13:
 			FW = 7;
 			break;
-		case 14:
+		    case 14:
 			FW = 8;
 			break;
-		case 15:
+		    case 15:
 			FW = 9;
 			break;
-		case 16:
+		    case 16:
 			FW = 11;
 			break;
-		default:
+		    default:
 			return(0);
 			break;
 		};
@@ -456,111 +456,111 @@ rt_load_mon(gp, md)
 	WCrt (ba, CRT_ID_PRESET_ROW_SCAN,	0x00);
 	
 	if (md->DEP == 4) {
-		WCrt (ba, CRT_ID_MAX_SCAN_LINE, 	((  (md->FLG & MDF_DBL)/ MDF_DBL * 0x80) 
-							 | 				   0x40 
-							 | ((md->VBS & 0x200)/0x200	 * 0x20) 
-							 | ((md->FY-1) 			 & 0x1f)));
+		WCrt (ba, CRT_ID_MAX_SCAN_LINE,	((  (md->FLG & MDF_DBL)/ MDF_DBL * 0x80) 
+						 | 				   0x40 
+						 | ((md->VBS & 0x200)/0x200	 * 0x20) 
+						 | ((md->FY-1) 			 & 0x1f)));
 	}
 	else {
-		WCrt (ba, CRT_ID_MAX_SCAN_LINE, 	((  (md->FLG & MDF_DBL)/ MDF_DBL * 0x80) 
-							 | 				   0x40 
-							 | ((md->VBS & 0x200)/0x200	 * 0x20) 
-							 | (0	 			 & 0x1f)));
+		WCrt (ba, CRT_ID_MAX_SCAN_LINE,	((  (md->FLG & MDF_DBL)/ MDF_DBL * 0x80) 
+						 | 				   0x40 
+						 | ((md->VBS & 0x200)/0x200	 * 0x20) 
+						 | (0	 			 & 0x1f)));
 	}
 	
-	WCrt (ba, CRT_ID_CURSOR_START,		(md->FY & 0x1f) - 2);
-	WCrt (ba, CRT_ID_CURSOR_END,		(md->FY & 0x1f) - 1);
+	WCrt (ba, CRT_ID_CURSOR_START, (md->FY & 0x1f) - 2);
+	WCrt (ba, CRT_ID_CURSOR_END, (md->FY & 0x1f) - 1);
 	
-	WCrt (ba, CRT_ID_START_ADDR_HIGH,	0x00);
-	WCrt (ba, CRT_ID_START_ADDR_LOW,	0x00);
+	WCrt (ba, CRT_ID_START_ADDR_HIGH, 0x00);
+	WCrt (ba, CRT_ID_START_ADDR_LOW, 0x00);
 	
-	WCrt (ba, CRT_ID_CURSOR_LOC_HIGH,	0x00);
-	WCrt (ba, CRT_ID_CURSOR_LOC_LOW,	0x00);
+	WCrt (ba, CRT_ID_CURSOR_LOC_HIGH, 0x00);
+	WCrt (ba, CRT_ID_CURSOR_LOC_LOW, 0x00);
 	
-	WCrt (ba, CRT_ID_START_VER_RETR,	md->VSS    & 0xff);
-	WCrt (ba, CRT_ID_END_VER_RETR,		(md->VSE   & 0x0f) | 0x80 | 0x20); 
-	WCrt (ba, CRT_ID_VER_DISP_ENA_END,	VDE        & 0xff);
+	WCrt (ba, CRT_ID_START_VER_RETR, md->VSS & 0xff);
+	WCrt (ba, CRT_ID_END_VER_RETR, (md->VSE & 0x0f) | 0x80 | 0x20); 
+	WCrt (ba, CRT_ID_VER_DISP_ENA_END, VDE & 0xff);
 	if (md->DEP == 4)
-		WCrt (ba, CRT_ID_OFFSET,	(HDE / 2)  & 0xff);
+		WCrt (ba, CRT_ID_OFFSET, (HDE / 2)  & 0xff);
 	else
-		WCrt (ba, CRT_ID_OFFSET,	(md->TX / 8)  & 0xff);
+		WCrt (ba, CRT_ID_OFFSET, (md->TX / 8)  & 0xff);
 
-	WCrt (ba, CRT_ID_UNDERLINE_LOC,		(md->FY-1) & 0x1f);
-	WCrt (ba, CRT_ID_START_VER_BLANK,	md->VBS    & 0xff);
-	WCrt (ba, CRT_ID_END_VER_BLANK,		md->VBE    & 0xff);
+	WCrt (ba, CRT_ID_UNDERLINE_LOC, (md->FY-1) & 0x1f);
+	WCrt (ba, CRT_ID_START_VER_BLANK, md->VBS  & 0xff);
+	WCrt (ba, CRT_ID_END_VER_BLANK, md->VBE & 0xff);
 		/* byte mode + wrap + select row scan counter + cms */
-	WCrt (ba, CRT_ID_MODE_CONTROL,		0xe3); 
-	WCrt (ba, CRT_ID_LINE_COMPARE,		0xff); 
+	WCrt (ba, CRT_ID_MODE_CONTROL, 0xe3); 
+	WCrt (ba, CRT_ID_LINE_COMPARE, 0xff); 
 	
 		/* enable extended end bits + those bits */
-	WCrt (ba, CRT_ID_EXT_HOR_TIMING1,	(           				 0x20 
-						 | ((md->FLG & MDF_LACE)  / MDF_LACE   * 0x10) 
-						 | ((md->HT  & 0x100) / 0x100          * 0x01) 
-						 | (((HDE-1) & 0x100) / 0x100 	       * 0x02) 
-						 | ((md->HBS & 0x100) / 0x100 	       * 0x04) 
-						 | ((md->HSS & 0x100) / 0x100 	       * 0x08)));
-	             
+	WCrt (ba, CRT_ID_EXT_HOR_TIMING1, ( 					 0x20 
+					 | ((md->FLG & MDF_LACE)  / MDF_LACE   * 0x10) 
+					 | ((md->HT  & 0x100) / 0x100          * 0x01) 
+					 | (((HDE-1) & 0x100) / 0x100 	       * 0x02) 
+					 | ((md->HBS & 0x100) / 0x100 	       * 0x04) 
+					 | ((md->HSS & 0x100) / 0x100 	       * 0x08)));
+
 	if (md->DEP == 4)
-		WCrt (ba, CRT_ID_EXT_START_ADDR,	(((HDE / 2) & 0x100)/0x100 * 16)); 
+		WCrt (ba, CRT_ID_EXT_START_ADDR, (((HDE / 2) & 0x100)/0x100 * 16)); 
 	else
-		WCrt (ba, CRT_ID_EXT_START_ADDR,	(((md->TX / 8) & 0x100)/0x100 * 16)); 
+		WCrt (ba, CRT_ID_EXT_START_ADDR, (((md->TX / 8) & 0x100)/0x100 * 16)); 
 	
-	WCrt (ba, CRT_ID_EXT_HOR_TIMING2, 	(  ((md->HT  & 0x200)/ 0x200  	       * 0x01) 
-						 | (((HDE-1) & 0x200)/ 0x200 	       * 0x02) 
-						 | ((md->HBS & 0x200)/ 0x200 	       * 0x04)
-						 | ((md->HSS & 0x200)/ 0x200 	       * 0x08) 
-						 | ((md->HBE & 0xc0) / 0x40  	       * 0x10)
-						 | ((md->HSE & 0x60) / 0x20  	       * 0x40)));
-	             
-	WCrt (ba, CRT_ID_EXT_VER_TIMING,	(  ((md->VSE & 0x10) / 0x10  	       * 0x80) 
-						 | ((md->VBE & 0x300)/ 0x100 	       * 0x20) 
-						 |				         0x10 
-						 | ((md->VSS & 0x400)/ 0x400 	       * 0x08) 
-						 | ((md->VBS & 0x400)/ 0x400 	       * 0x04) 
-						 | ((VDE     & 0x400)/ 0x400 	       * 0x02) 
-						 | ((md->VT  & 0x400)/ 0x400           * 0x01)));
-	 
-	WGfx (ba, GCT_ID_SET_RESET,		0x00); 
-	WGfx (ba, GCT_ID_ENABLE_SET_RESET,	0x00); 
-	WGfx (ba, GCT_ID_COLOR_COMPARE,		0x00); 
-	WGfx (ba, GCT_ID_DATA_ROTATE,		0x00); 
-	WGfx (ba, GCT_ID_READ_MAP_SELECT,	0x00); 
-	WGfx (ba, GCT_ID_GRAPHICS_MODE,		0x00);
+	WCrt (ba, CRT_ID_EXT_HOR_TIMING2,  ( ((md->HT  & 0x200)/ 0x200	* 0x01) 
+					 | (((HDE-1) & 0x200)/ 0x200	* 0x02) 
+					 | ((md->HBS & 0x200)/ 0x200	* 0x04)
+					 | ((md->HSS & 0x200)/ 0x200	* 0x08) 
+					 | ((md->HBE & 0xc0) / 0x40	* 0x10)
+					 | ((md->HSE & 0x60) / 0x20	* 0x40)));
+
+	WCrt (ba, CRT_ID_EXT_VER_TIMING, ( ((md->VSE & 0x10) / 0x10	* 0x80) 
+					 | ((md->VBE & 0x300)/ 0x100	* 0x20) 
+					 |				0x10 
+					 | ((md->VSS & 0x400)/ 0x400	* 0x08) 
+					 | ((md->VBS & 0x400)/ 0x400	* 0x04) 
+					 | ((VDE     & 0x400)/ 0x400	* 0x02) 
+					 | ((md->VT  & 0x400)/ 0x400	* 0x01)));
+
+	WGfx (ba, GCT_ID_SET_RESET, 0x00); 
+	WGfx (ba, GCT_ID_ENABLE_SET_RESET, 0x00); 
+	WGfx (ba, GCT_ID_COLOR_COMPARE, 0x00); 
+	WGfx (ba, GCT_ID_DATA_ROTATE, 0x00); 
+	WGfx (ba, GCT_ID_READ_MAP_SELECT, 0x00); 
+	WGfx (ba, GCT_ID_GRAPHICS_MODE, 0x00);
 	if (md->DEP == 4)
-		WGfx (ba, GCT_ID_MISC,			0x04);
+		WGfx (ba, GCT_ID_MISC, 0x04);
 	else
-		WGfx (ba, GCT_ID_MISC,			0x05);
-	WGfx (ba, GCT_ID_COLOR_XCARE,		0xff); 
-	WGfx (ba, GCT_ID_BITMASK,		0xff); 
+		WGfx (ba, GCT_ID_MISC, 0x05);
+	WGfx (ba, GCT_ID_COLOR_XCARE, 0xff); 
+	WGfx (ba, GCT_ID_BITMASK, 0xff); 
 	
 	/* reset the Attribute Controller flipflop */
 	vgar (ba, GREG_STATUS1_R);
-	WAttr (ba, ACT_ID_PALETTE0,		0x00);     
-	WAttr (ba, ACT_ID_PALETTE1,		0x01);  
-	WAttr (ba, ACT_ID_PALETTE2,		0x02);  
-	WAttr (ba, ACT_ID_PALETTE3,		0x03);  
-	WAttr (ba, ACT_ID_PALETTE4,		0x04);  
-	WAttr (ba, ACT_ID_PALETTE5,		0x05);  
-	WAttr (ba, ACT_ID_PALETTE6,		0x06);  
-	WAttr (ba, ACT_ID_PALETTE7,		0x07);  
-	WAttr (ba, ACT_ID_PALETTE8,		0x08);  
-	WAttr (ba, ACT_ID_PALETTE9,		0x09);  
-	WAttr (ba, ACT_ID_PALETTE10,		0x0a);  
-	WAttr (ba, ACT_ID_PALETTE11,		0x0b);  
-	WAttr (ba, ACT_ID_PALETTE12,		0x0c);  
-	WAttr (ba, ACT_ID_PALETTE13,		0x0d);  
-	WAttr (ba, ACT_ID_PALETTE14,		0x0e);  
-	WAttr (ba, ACT_ID_PALETTE15,		0x0f);  
+	WAttr (ba, ACT_ID_PALETTE0, 0x00);     
+	WAttr (ba, ACT_ID_PALETTE1, 0x01);  
+	WAttr (ba, ACT_ID_PALETTE2, 0x02);  
+	WAttr (ba, ACT_ID_PALETTE3, 0x03);  
+	WAttr (ba, ACT_ID_PALETTE4, 0x04);  
+	WAttr (ba, ACT_ID_PALETTE5, 0x05);  
+	WAttr (ba, ACT_ID_PALETTE6, 0x06);  
+	WAttr (ba, ACT_ID_PALETTE7, 0x07);  
+	WAttr (ba, ACT_ID_PALETTE8, 0x08);  
+	WAttr (ba, ACT_ID_PALETTE9, 0x09);  
+	WAttr (ba, ACT_ID_PALETTE10, 0x0a);  
+	WAttr (ba, ACT_ID_PALETTE11, 0x0b);  
+	WAttr (ba, ACT_ID_PALETTE12, 0x0c);  
+	WAttr (ba, ACT_ID_PALETTE13, 0x0d);  
+	WAttr (ba, ACT_ID_PALETTE14, 0x0e);  
+	WAttr (ba, ACT_ID_PALETTE15, 0x0f);  
 	
 	vgar (ba, GREG_STATUS1_R);
 	if (md->DEP == 4)
-		WAttr (ba, ACT_ID_ATTR_MODE_CNTL,	0x08);  
+		WAttr (ba, ACT_ID_ATTR_MODE_CNTL, 0x08);  
 	else
-		WAttr (ba, ACT_ID_ATTR_MODE_CNTL,	0x09);
+		WAttr (ba, ACT_ID_ATTR_MODE_CNTL, 0x09);
 	
-	WAttr (ba, ACT_ID_OVERSCAN_COLOR,	0x00);  
-	WAttr (ba, ACT_ID_COLOR_PLANE_ENA,	0x0f);  
-	WAttr (ba, ACT_ID_HOR_PEL_PANNING,	0x00);  
+	WAttr (ba, ACT_ID_OVERSCAN_COLOR, 0x00);  
+	WAttr (ba, ACT_ID_COLOR_PLANE_ENA, 0x0f);  
+	WAttr (ba, ACT_ID_HOR_PEL_PANNING, 0x00);  
 	WAttr (ba, ACT_ID_COLOR_SELECT,	0x00);  
 	
 	vgar (ba, GREG_STATUS1_R);
@@ -588,9 +588,9 @@ rt_load_mon(gp, md)
 		   registers, thus it works similar to the WD33C93 
 		   select/data mechanism */
 	vgaw (ba, VDAC_REG_SELECT, 0x00);
-	
+
 	{ 
-		
+
 		short x = 15;
 		const unsigned char * col = md->PAL;
 		do {
@@ -779,6 +779,7 @@ int rt_getspritemax __P((struct grf_softc *, struct grf_position *));
 int rt_getcmap __P((struct grf_softc *, struct grf_colormap *));
 int rt_putcmap __P((struct grf_softc *, struct grf_colormap *));
 int rt_bitblt __P((struct grf_softc *, struct grf_bitblt *));
+int rt_blank __P((struct grf_softc *, int *));
 
 struct cfattach grfrt_ca = {
 	sizeof(struct grf_softc), grfrtmatch, grfrtattach
@@ -901,82 +902,82 @@ grfrtprint(auxp, pnp)
 
 static int 
 rt_getvmode (gp, vm)
-     struct grf_softc *gp;
-     struct grfvideo_mode *vm;
+	struct grf_softc *gp;
+	struct grfvideo_mode *vm;
 {
-  struct MonDef *md;
+	struct MonDef *md;
 
-  if (vm->mode_num && vm->mode_num > retina_mon_max)
-    return EINVAL;
+	if (vm->mode_num && vm->mode_num > retina_mon_max)
+		return (EINVAL);
+
+	if (! vm->mode_num)
+		vm->mode_num = (current_mon - monitor_defs) + 1;
+
+	md = monitor_defs + (vm->mode_num - 1);
+	strncpy (vm->mode_descr, monitor_descr[vm->mode_num - 1], 
+	    sizeof (vm->mode_descr));
+	vm->pixel_clock  = md->FQ;
+	vm->disp_width   = md->MW;
+	vm->disp_height  = md->MH;
+	vm->depth        = md->DEP;
+
+	/*
+	 * From observation of the monitor definition table above, I guess that
+	 * the horizontal timings are in units of longwords. Hence, I get the
+	 * pixels by multiplication with 32 and division by the depth.
+	 * The text modes, apparently marked by depth == 4, are even more wierd.
+	 * According to a comment above, they are computed from a depth==8 mode
+	 * (thats for us: * 32 / 8) by applying another factor of 4 / font width.
+	 * Reverse applying the latter formula most of the constants cancel
+	 * themselves and we are left with a nice (* font width).
+	 * That is, internal timings are in units of longwords for graphics  
+	 * modes, or in units of characters widths for text modes.
+	 * We better don't WRITE modes until this has been real live checked.
+	 * 			- Ignatios Souvatzis
+	 */
 
-  if (! vm->mode_num)
-    vm->mode_num = (current_mon - monitor_defs) + 1;
-
-  md = monitor_defs + (vm->mode_num - 1);
-  strncpy (vm->mode_descr, monitor_descr[vm->mode_num - 1], 
-	   sizeof (vm->mode_descr));
-  vm->pixel_clock  = md->FQ;
-  vm->disp_width   = md->MW;
-  vm->disp_height  = md->MH;
-  vm->depth        = md->DEP;
-
-  /*
-   * From observation of the monitor definition table above, I guess that
-   * the horizontal timings are in units of longwords. Hence, I get the
-   * pixels by multiplication with 32 and division by the depth.
-   * The text modes, apparently marked by depth == 4, are even more wierd.
-   * According to a comment above, they are computed from a depth==8 mode
-   * (thats for us: * 32 / 8) by applying another factor of 4 / font width.
-   * Reverse applying the latter formula most of the constants cancel
-   * themselves and we are left with a nice (* font width).
-   * That is, internal timings are in units of longwords for graphics  
-   * modes, or in units of characters widths for text modes.
-   * We better don't WRITE modes until this has been real live checked.
-   * 			- Ignatios Souvatzis
-   */
-
-  if (md->DEP == 4) {
-	vm->hblank_start = md->HBS * 32 / md->DEP;
-	vm->hblank_stop  = md->HBE * 32 / md->DEP;
-	vm->hsync_start  = md->HSS * 32 / md->DEP;
-	vm->hsync_stop   = md->HSE * 32 / md->DEP;
-	vm->htotal       = md->HT * 32 / md->DEP;
-  } else {
-	vm->hblank_start = md->HBS * md->FX;
-	vm->hblank_stop  = md->HBE * md->FX;
-	vm->hsync_start  = md->HSS * md->FX;
-	vm->hsync_stop   = md->HSE * md->FX;
-	vm->htotal       = md->HT * md->FX;
-  }
-  vm->vblank_start = md->VBS;
-  vm->vblank_stop  = md->VBE;
-  vm->vsync_start  = md->VSS;
-  vm->vsync_stop   = md->VSE;
-  vm->vtotal       = md->VT;
-
-  return 0;
+	if (md->DEP == 4) {
+		vm->hblank_start = md->HBS * 32 / md->DEP;
+		vm->hblank_stop  = md->HBE * 32 / md->DEP;
+		vm->hsync_start  = md->HSS * 32 / md->DEP;
+		vm->hsync_stop   = md->HSE * 32 / md->DEP;
+		vm->htotal       = md->HT * 32 / md->DEP;
+	} else {
+		vm->hblank_start = md->HBS * md->FX;
+		vm->hblank_stop  = md->HBE * md->FX;
+		vm->hsync_start  = md->HSS * md->FX;
+		vm->hsync_stop   = md->HSE * md->FX;
+		vm->htotal       = md->HT * md->FX;
+	}
+	vm->vblank_start = md->VBS;
+	vm->vblank_stop  = md->VBE;
+	vm->vsync_start  = md->VSS;
+	vm->vsync_stop   = md->VSE;
+	vm->vtotal       = md->VT;
+
+	return (0);
 }
 
 
 static int 
 rt_setvmode (gp, mode, txtonly)
-     struct grf_softc *gp;
-     unsigned mode;
-     int txtonly;
+	struct grf_softc *gp;
+	unsigned mode;
+	int txtonly;
 {
-  int error;
+	int error;
 
-  if (!mode || mode > retina_mon_max)
-    return EINVAL;
+	if (!mode || mode > retina_mon_max)
+		return (EINVAL);
 
-  if (txtonly && monitor_defs[mode-1].DEP == 8)
-    return EINVAL;
+	if (txtonly && monitor_defs[mode-1].DEP == 8)
+		return (EINVAL);
 
-  current_mon = monitor_defs + (mode - 1);
+	current_mon = monitor_defs + (mode - 1);
 
-  error = rt_load_mon (gp, current_mon) ? 0 : EINVAL;
+	error = rt_load_mon (gp, current_mon) ? 0 : EINVAL;
 
-  return error;
+	return (error);
 }
 
 
@@ -992,51 +993,50 @@ rt_mode(gp, cmd, arg, a2, a3)
 	u_long a2;
 	int a3;
 {
-  /* implement these later... */
+	/* implement these later... */
 
-  switch (cmd)
-    {
-    case GM_GRFON:
-      rt_setvmode (gp, retina_default_gfx + 1, 0);
-      return 0;
+	switch (cmd) {
+	    case GM_GRFON:
+		rt_setvmode (gp, retina_default_gfx + 1, 0);
+		return (0);
       
-    case GM_GRFOFF:
-      rt_setvmode (gp, retina_default_mon + 1, 0);
-      return 0;
+	    case GM_GRFOFF:
+		rt_setvmode (gp, retina_default_mon + 1, 0);
+		return (0);
       
-    case GM_GRFCONFIG:
-      return 0;
+	    case GM_GRFCONFIG:
+		return (0);
 
-    case GM_GRFGETVMODE:
-      return rt_getvmode (gp, (struct grfvideo_mode *) arg);
+	    case GM_GRFGETVMODE:
+		return (rt_getvmode (gp, (struct grfvideo_mode *) arg));
 
-    case GM_GRFSETVMODE:
-      return rt_setvmode (gp, *(unsigned *) arg, 1);
+	    case GM_GRFSETVMODE:
+		return (rt_setvmode (gp, *(unsigned *) arg, 1));
 
-    case GM_GRFGETNUMVM:
-      *(int *)arg = retina_mon_max;
-      return 0;
+	    case GM_GRFGETNUMVM:
+		*(int *)arg = retina_mon_max;
+		return (0);
 
 #ifdef BANKEDDEVPAGER
-    case GM_GRFGETBANK:
-      *(int *)arg = rt_getbank (gp, a2, a3);
-      return 0;
+	    case GM_GRFGETBANK:
+		*(int *)arg = rt_getbank (gp, a2, a3);
+		return (0);
 
-    case GM_GRFGETCURBANK:
-      *(int *)arg = rt_getcurbank (gp);
-      return 0;
+	    case GM_GRFGETCURBANK:
+		*(int *)arg = rt_getcurbank (gp);
+		return (0);
 
-    case GM_GRFSETBANK:
-      return rt_setbank (gp, arg);
+	    case GM_GRFSETBANK:
+		return (rt_setbank (gp, arg));
 #endif
-    case GM_GRFIOCTL:
-      return rt_ioctl (gp, a2, arg);
+	    case GM_GRFIOCTL:
+		return (rt_ioctl (gp, a2, arg));
 
-    default:
-      break;
-    }
-    
-  return EINVAL;
+	    default:
+		break;
+	}
+
+	return (EINVAL);
 }
 
 int
@@ -1045,34 +1045,36 @@ rt_ioctl (gp, cmd, data)
 	u_long cmd;
 	void *data;
 {
-  switch (cmd)
-    {
-    case GRFIOCGSPRITEPOS:
-      return rt_getspritepos (gp, (struct grf_position *) data);
+	switch (cmd) {
+	    case GRFIOCGSPRITEPOS:
+		return (rt_getspritepos (gp, (struct grf_position *) data));
 
-    case GRFIOCSSPRITEPOS:
-      return rt_setspritepos (gp, (struct grf_position *) data);
+	    case GRFIOCSSPRITEPOS:
+		return (rt_setspritepos (gp, (struct grf_position *) data));
 
-    case GRFIOCSSPRITEINF:
-      return rt_setspriteinfo (gp, (struct grf_spriteinfo *) data);
+	    case GRFIOCSSPRITEINF:
+		return (rt_setspriteinfo (gp, (struct grf_spriteinfo *) data));
 
-    case GRFIOCGSPRITEINF:
-      return rt_getspriteinfo (gp, (struct grf_spriteinfo *) data);
+	    case GRFIOCGSPRITEINF:
+		return (rt_getspriteinfo (gp, (struct grf_spriteinfo *) data));
 
-    case GRFIOCGSPRITEMAX:
-      return rt_getspritemax (gp, (struct grf_position *) data);
+	    case GRFIOCGSPRITEMAX:
+		return (rt_getspritemax (gp, (struct grf_position *) data));
 
-    case GRFIOCGETCMAP:
-      return rt_getcmap (gp, (struct grf_colormap *) data);
+	    case GRFIOCGETCMAP:
+		return (rt_getcmap (gp, (struct grf_colormap *) data));
 
-    case GRFIOCPUTCMAP:
-      return rt_putcmap (gp, (struct grf_colormap *) data);
+	    case GRFIOCPUTCMAP:
+		return (rt_putcmap (gp, (struct grf_colormap *) data));
 
-    case GRFIOCBITBLT:
-      return rt_bitblt (gp, (struct grf_bitblt *) data);
-    }
+	    case GRFIOCBITBLT:
+		return (rt_bitblt (gp, (struct grf_bitblt *) data));
+
+	    case GRFIOCBLANK:
+		return (rt_blank(gp, (int *)data));
+	}
 
-  return EINVAL;
+	return (EINVAL);
 }     
 
 #ifdef BANKEDDEVPAGER
@@ -1082,293 +1084,293 @@ rt_ioctl (gp, cmd, data)
 
 int
 rt_getbank (gp, offs, prot)
-     struct grf_softc *gp;
-     u_long offs;
-     int prot;
+	struct grf_softc *gp;
+	u_long offs;
+	int prot;
 {
-  /* XXX */
-  if (offs <  0 || offs >= 4*1024*1024)
-    return -1;
-  else
-    return offs >> 16;
+	/* XXX */
+	if (offs <  0 || offs >= 4*1024*1024)
+		return (-1);
+	else
+		return (offs >> 16);
 }
 
+
 int
 rt_getcurbank (gp)
-     struct grf_softc *gp;
+	struct grf_softc *gp;
 {
-  struct grfinfo *gi = &gp->g_display;
-  volatile unsigned char *ba;
-  int bank;
+	struct grfinfo *gi = &gp->g_display;
+	volatile unsigned char *ba;
+	int bank;
 
-  ba = gp->g_regkva;
-  bank = RSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO) | (RSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI) << 8);
+	ba = gp->g_regkva;
+	bank = RSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO) |
+			(RSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI) << 8);
 
-  /* bank register is multiple of 64 byte, make this multiple of 64k */
-  bank >>= 10;
-  return bank;
+	/* bank register is multiple of 64 byte, make this multiple of 64k */
+	bank >>= 10;
+	return (bank);
 }
 
+
 int
 rt_setbank (gp, bank)
-     struct grf_softc *gp;
-     int bank;
+	struct grf_softc *gp;
+	int bank;
 {
-  volatile unsigned char *ba;
+	volatile unsigned char *ba;
 
-  ba = gp->g_regkva;
-  /* bank register is multiple of 64 byte, make this multiple of 64k */
-  bank <<= 10;
-  WSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO, (unsigned char) bank);
-  bank >>= 8;
-  WSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI, (unsigned char) bank);
+	ba = gp->g_regkva;
+	/* bank register is multiple of 64 byte, make this multiple of 64k */
+	bank <<= 10;
+	WSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO, (unsigned char) bank);
+	bank >>= 8;
+	WSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI, (unsigned char) bank);
 
-  return 0;
+	return (0);
 }
 
-#endif
+#endif	/* BANKEDDEVPAGER */
+
 
 int
 rt_getcmap (gfp, cmap)
-     struct grf_softc *gfp;
-     struct grf_colormap *cmap;
+	struct grf_softc *gfp;
+	struct grf_colormap *cmap;
 {
-  volatile unsigned char *ba;
-  u_char red[256], green[256], blue[256], *rp, *gp, *bp;
-  short x;
-  int error;
-
-  if (cmap->count == 0 || cmap->index >= 256)
-    return 0;
-
-  if (cmap->index + cmap->count > 256)
-    cmap->count = 256 - cmap->index;
-
-  ba = gfp->g_regkva;
-  /* first read colors out of the chip, then copyout to userspace */
-  vgaw (ba, VDAC_REG_SELECT, cmap->index);
-  x = cmap->count - 1;
-  rp = red + cmap->index; 
-  gp = green + cmap->index; 
-  bp = blue + cmap->index;
-  do
-    {
-      *rp++ = vgar (ba, VDAC_REG_DATA);
-      *gp++ = vgar (ba, VDAC_REG_DATA);
-      *bp++ = vgar (ba, VDAC_REG_DATA);
-    }
-  while (x--);
+	volatile unsigned char *ba;
+	u_char red[256], green[256], blue[256], *rp, *gp, *bp;
+	short x;
+	int error;
+
+	if (cmap->count == 0 || cmap->index >= 256)
+		return (0);
+
+	if (cmap->index + cmap->count > 256)
+		cmap->count = 256 - cmap->index;
+
+	ba = gfp->g_regkva;
+	/* first read colors out of the chip, then copyout to userspace */
+	vgaw (ba, VDAC_REG_SELECT, cmap->index);
+	x = cmap->count - 1;
+	rp = red + cmap->index; 
+	gp = green + cmap->index; 
+	bp = blue + cmap->index;
+	do {
+		*rp++ = vgar (ba, VDAC_REG_DATA);
+		*gp++ = vgar (ba, VDAC_REG_DATA);
+		*bp++ = vgar (ba, VDAC_REG_DATA);
+	}
+	while (x--);
 
-  if (!(error = copyout (red + cmap->index, cmap->red, cmap->count))
-      && !(error = copyout (green + cmap->index, cmap->green, cmap->count))
-      && !(error = copyout (blue + cmap->index, cmap->blue, cmap->count)))
-    return 0;
+	if (!(error = copyout (red + cmap->index, cmap->red, cmap->count))
+	    && !(error = copyout (green + cmap->index, cmap->green, cmap->count))
+	    && !(error = copyout (blue + cmap->index, cmap->blue, cmap->count)))
+		return (0);
 
-  return error;
+	return (error);
 }
 
 int
 rt_putcmap (gfp, cmap)
-     struct grf_softc *gfp;
-     struct grf_colormap *cmap;
+	struct grf_softc *gfp;
+	struct grf_colormap *cmap;
 {
-  volatile unsigned char *ba;
-  u_char red[256], green[256], blue[256], *rp, *gp, *bp;
-  short x;
-  int error;
+	volatile unsigned char *ba;
+	u_char red[256], green[256], blue[256], *rp, *gp, *bp;
+	short x;
+	int error;
 
-  if (cmap->count == 0 || cmap->index >= 256)
-    return 0;
+	if (cmap->count == 0 || cmap->index >= 256)
+		return 0;
 
-  if (cmap->index + cmap->count > 256)
-    cmap->count = 256 - cmap->index;
+	if (cmap->index + cmap->count > 256)
+		cmap->count = 256 - cmap->index;
 
-  /* first copy the colors into kernelspace */
-  if (!(error = copyin (cmap->red, red + cmap->index, cmap->count))
-      && !(error = copyin (cmap->green, green + cmap->index, cmap->count))
-      && !(error = copyin (cmap->blue, blue + cmap->index, cmap->count)))
-    {
-      ba = gfp->g_regkva;
-      vgaw (ba, VDAC_REG_SELECT, cmap->index);
-      x = cmap->count - 1;
-      rp = red + cmap->index; 
-      gp = green + cmap->index; 
-      bp = blue + cmap->index;
-      do
+	/* first copy the colors into kernelspace */
+	if (!(error = copyin (cmap->red, red + cmap->index, cmap->count))
+	    && !(error = copyin (cmap->green, green + cmap->index, cmap->count))
+	    && !(error = copyin (cmap->blue, blue + cmap->index, cmap->count)))
 	{
-	  vgaw (ba, VDAC_REG_DATA, *rp++);
-	  vgaw (ba, VDAC_REG_DATA, *gp++);
-	  vgaw (ba, VDAC_REG_DATA, *bp++);
-	}
-      while (x--);
-      return 0;
-    }
-  else
-    return error;
+		ba = gfp->g_regkva;
+		vgaw (ba, VDAC_REG_SELECT, cmap->index);
+		x = cmap->count - 1;
+		rp = red + cmap->index; 
+		gp = green + cmap->index; 
+		bp = blue + cmap->index;
+		do {
+			vgaw (ba, VDAC_REG_DATA, *rp++);
+			vgaw (ba, VDAC_REG_DATA, *gp++);
+			vgaw (ba, VDAC_REG_DATA, *bp++);
+		}
+		while (x--);
+		return (0);
+	} else
+		return (error);
 }
 
+
 int
 rt_getspritepos (gp, pos)
-     struct grf_softc *gp;
-     struct grf_position *pos;
+	struct grf_softc *gp;
+	struct grf_position *pos;
 {
-  volatile unsigned char *ba;
-
-  ba = gp->g_regkva;
-  pos->x = vgar (ba, SEQ_ID_CURSOR_X_LOC_LO) | (vgar (ba, SEQ_ID_CURSOR_X_LOC_HI) << 8);
-  pos->y = vgar (ba, SEQ_ID_CURSOR_Y_LOC_LO) | (vgar (ba, SEQ_ID_CURSOR_Y_LOC_HI) << 8);
-  return 0;
+	volatile unsigned char *ba;
+
+	ba = gp->g_regkva;
+	pos->x = vgar (ba, SEQ_ID_CURSOR_X_LOC_LO) |
+			(vgar (ba, SEQ_ID_CURSOR_X_LOC_HI) << 8);
+	pos->y = vgar (ba, SEQ_ID_CURSOR_Y_LOC_LO) |
+			(vgar (ba, SEQ_ID_CURSOR_Y_LOC_HI) << 8);
+	return (0);
 }
 
 int
 rt_setspritepos (gp, pos)
-     struct grf_softc *gp;
-     struct grf_position *pos;
+	struct grf_softc *gp;
+	struct grf_position *pos;
 {
-  volatile unsigned char *ba;
-
-  ba = gp->g_regkva;
-  vgaw (ba, SEQ_ID_CURSOR_X_LOC_LO, pos->x & 0xff);
-  vgaw (ba, SEQ_ID_CURSOR_X_LOC_HI, (pos->x >> 8) & 0x07);
-  vgaw (ba, SEQ_ID_CURSOR_Y_LOC_LO, pos->y & 0xff);
-  vgaw (ba, SEQ_ID_CURSOR_Y_LOC_HI, (pos->y >> 8) & 0x07);
-  return 0;
+	volatile unsigned char *ba;
+
+	ba = gp->g_regkva;
+	vgaw (ba, SEQ_ID_CURSOR_X_LOC_LO, pos->x & 0xff);
+	vgaw (ba, SEQ_ID_CURSOR_X_LOC_HI, (pos->x >> 8) & 0x07);
+	vgaw (ba, SEQ_ID_CURSOR_Y_LOC_LO, pos->y & 0xff);
+	vgaw (ba, SEQ_ID_CURSOR_Y_LOC_HI, (pos->y >> 8) & 0x07);
+	return (0);
 }
 
 /* assume an at least 2M retina (XXX), sprite is last in memory.
-   According to the bogus docs, the cursor can be at most 128 lines
-   in height, and the x-hostspot can be placed at most at pos 31,
-   this gives width of a long */
+ * According to the bogus docs, the cursor can be at most 128 lines
+ * in height, and the x-hostspot can be placed at most at pos 31,
+ * this gives width of a long
+ */
 #define SPRITE_ADDR (2*1024*1024 - 128*4)
 
 int
 rt_getspriteinfo (gp, info)
-     struct grf_softc *gp;
-     struct grf_spriteinfo *info;
+	struct grf_softc *gp;
+	struct grf_spriteinfo *info;
 {
-  volatile caddr_t ba, fb;
+	volatile caddr_t ba, fb;
 
-  ba = gp->g_regkva;
-  fb = gp->g_fbkva;
-  if (info->set & GRFSPRSET_ENABLE)
-    info->enable = vgar (ba, SEQ_ID_CURSOR_CONTROL) & 0x01;
-  if (info->set & GRFSPRSET_POS)
-    rt_getspritepos (gp, &info->pos);
-  if (info->set & GRFSPRSET_HOT)
-    {
-      info->hot.x = vgar (ba, SEQ_ID_CURSOR_X_INDEX) & 0x1f;
-      info->hot.y = vgar (ba, SEQ_ID_CURSOR_Y_INDEX) & 0x7f;
-    }
-  if (info->set & GRFSPRSET_CMAP)
-    {
-      struct grf_colormap cmap;
-      int index;
-      cmap.index = 0;
-      cmap.count = 256;
-      rt_getcmap (gp, &cmap);
-      index = vgar (ba, SEQ_ID_CURSOR_COLOR0);
-      info->cmap.red[0] = cmap.red[index];
-      info->cmap.green[0] = cmap.green[index];
-      info->cmap.blue[0] = cmap.blue[index];
-      index = vgar (ba, SEQ_ID_CURSOR_COLOR1);
-      info->cmap.red[1] = cmap.red[index];
-      info->cmap.green[1] = cmap.green[index];
-      info->cmap.blue[1] = cmap.blue[index];
-    }
-  if (info->set & GRFSPRSET_SHAPE)
-    {
-      int saved_bank_lo = RSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO);
-      int saved_bank_hi = RSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI);
-      int last_bank = SPRITE_ADDR >> 6;
-      int last_bank_lo = last_bank & 0xff;
-      int last_bank_hi = last_bank >> 8;
-      u_char mask;
-      WSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO, last_bank_lo);
-      WSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI, last_bank_hi);
-      copyout (fb, info->image, 128*4);
-      mask = RSeq (ba, SEQ_ID_CURSOR_PIXELMASK);
-      WSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO, saved_bank_lo);
-      WSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI, saved_bank_hi);
-      copyout (&mask, info->mask, 1);
-      info->size.x = 32; /* ??? */
-      info->size.y = (RSeq (ba, SEQ_ID_CURSOR_CONTROL) & 6) << 4;
-    }
+	ba = gp->g_regkva;
+	fb = gp->g_fbkva;
+	if (info->set & GRFSPRSET_ENABLE)
+		info->enable = vgar (ba, SEQ_ID_CURSOR_CONTROL) & 0x01;
+	if (info->set & GRFSPRSET_POS)
+		rt_getspritepos (gp, &info->pos);
+	if (info->set & GRFSPRSET_HOT) {
+		info->hot.x = vgar (ba, SEQ_ID_CURSOR_X_INDEX) & 0x1f;
+		info->hot.y = vgar (ba, SEQ_ID_CURSOR_Y_INDEX) & 0x7f;
+	}
+	if (info->set & GRFSPRSET_CMAP) {
+		struct grf_colormap cmap;
+		int index;
+		cmap.index = 0;
+		cmap.count = 256;
+		rt_getcmap (gp, &cmap);
+		index = vgar (ba, SEQ_ID_CURSOR_COLOR0);
+		info->cmap.red[0] = cmap.red[index];
+		info->cmap.green[0] = cmap.green[index];
+		info->cmap.blue[0] = cmap.blue[index];
+		index = vgar (ba, SEQ_ID_CURSOR_COLOR1);
+		info->cmap.red[1] = cmap.red[index];
+		info->cmap.green[1] = cmap.green[index];
+		info->cmap.blue[1] = cmap.blue[index];
+	}
+	if (info->set & GRFSPRSET_SHAPE) {
+		int saved_bank_lo = RSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO);
+		int saved_bank_hi = RSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI);
+		int last_bank = SPRITE_ADDR >> 6;
+		int last_bank_lo = last_bank & 0xff;
+		int last_bank_hi = last_bank >> 8;
+		u_char mask;
+		WSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO, last_bank_lo);
+		WSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI, last_bank_hi);
+		copyout (fb, info->image, 128*4);
+		mask = RSeq (ba, SEQ_ID_CURSOR_PIXELMASK);
+		WSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO, saved_bank_lo);
+		WSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI, saved_bank_hi);
+		copyout (&mask, info->mask, 1);
+		info->size.x = 32; /* ??? */
+		info->size.y = (RSeq (ba, SEQ_ID_CURSOR_CONTROL) & 6) << 4;
+	}
 
-  return 0;
+	return (0);
 }
 
+
 int
 rt_setspriteinfo (gp, info)
-     struct grf_softc *gp;
-     struct grf_spriteinfo *info;
+	struct grf_softc *gp;
+	struct grf_spriteinfo *info;
 {
-  volatile caddr_t ba, fb;
-  u_char control;
+	volatile caddr_t ba, fb;
+	u_char control;
 
-  ba = gp->g_regkva;
-  fb = gp->g_fbkva;
-  control = vgar (ba, SEQ_ID_CURSOR_CONTROL);
-  if (info->set & GRFSPRSET_ENABLE)
-    {
-      if (info->enable)
-	control |= 1;
-      else
-	control &= ~1;
-      vgaw (ba, SEQ_ID_CURSOR_CONTROL, control);
-    }
-  if (info->set & GRFSPRSET_POS)
-    rt_setspritepos (gp, &info->pos);
-  if (info->set & GRFSPRSET_HOT)
-    {
-      vgaw (ba, SEQ_ID_CURSOR_X_INDEX, info->hot.x & 0x1f);
-      vgaw (ba, SEQ_ID_CURSOR_Y_INDEX, info->hot.y & 0x7f);
-    }
-  if (info->set & GRFSPRSET_CMAP)
-    {
-      /* hey cheat a bit here.. XXX */
-      vgaw (ba, SEQ_ID_CURSOR_COLOR0, 0);
-      vgaw (ba, SEQ_ID_CURSOR_COLOR1, 1);
-    }
-  if (info->set & GRFSPRSET_SHAPE)
-    {
-      int saved_bank_lo = RSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO);
-      int saved_bank_hi = RSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI);
-      int last_bank = SPRITE_ADDR >> 6;
-      int last_bank_lo = last_bank & 0xff;
-      int last_bank_hi = last_bank >> 8;
-      u_char mask;
-      WSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO, last_bank_lo);
-      WSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI, last_bank_hi);
-      copyin (info->image, fb, 128*4);
-      WSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO, saved_bank_lo);
-      WSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI, saved_bank_hi);
-      copyin (info->mask, &mask, 1);
-      WSeq (ba, SEQ_ID_CURSOR_PIXELMASK, mask);
-      /* info->size.x = 32; *//* ??? */
-
-      info->size.y = (RSeq (ba, SEQ_ID_CURSOR_CONTROL) & 6) << 4;
-      control = (control & ~6) | ((info->size.y >> 4) & 6);
-      vgaw (ba, SEQ_ID_CURSOR_CONTROL, control);
-
-      /* sick intel bull-addressing.. */
-      WSeq (ba, SEQ_ID_CURSOR_STORE_LO, SPRITE_ADDR & 0x0f);
-      WSeq (ba, SEQ_ID_CURSOR_STORE_HI, 0);
-      WSeq (ba, SEQ_ID_CURSOR_ST_OFF_LO, (SPRITE_ADDR >> 4) & 0xff);
-      WSeq (ba, SEQ_ID_CURSOR_ST_OFF_HI, ((SPRITE_ADDR >> 4) >> 8) & 0xff);
-    }
+	ba = gp->g_regkva;
+	fb = gp->g_fbkva;
+	control = vgar (ba, SEQ_ID_CURSOR_CONTROL);
+	if (info->set & GRFSPRSET_ENABLE) {
+		if (info->enable)
+			control |= 1;
+		else
+			control &= ~1;
+	vgaw (ba, SEQ_ID_CURSOR_CONTROL, control);
+	}
+	if (info->set & GRFSPRSET_POS)
+		rt_setspritepos (gp, &info->pos);
+	if (info->set & GRFSPRSET_HOT) {
+		vgaw (ba, SEQ_ID_CURSOR_X_INDEX, info->hot.x & 0x1f);
+		vgaw (ba, SEQ_ID_CURSOR_Y_INDEX, info->hot.y & 0x7f);
+	}
+	if (info->set & GRFSPRSET_CMAP) {
+		/* hey cheat a bit here.. XXX */
+		vgaw (ba, SEQ_ID_CURSOR_COLOR0, 0);
+		vgaw (ba, SEQ_ID_CURSOR_COLOR1, 1);
+	}
+	if (info->set & GRFSPRSET_SHAPE) {
+		int saved_bank_lo = RSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO);
+		int saved_bank_hi = RSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI);
+		int last_bank = SPRITE_ADDR >> 6;
+		int last_bank_lo = last_bank & 0xff;
+		int last_bank_hi = last_bank >> 8;
+		u_char mask;
+		WSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO, last_bank_lo);
+		WSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI, last_bank_hi);
+		copyin (info->image, fb, 128*4);
+		WSeq (ba, SEQ_ID_PRIM_HOST_OFF_LO, saved_bank_lo);
+		WSeq (ba, SEQ_ID_PRIM_HOST_OFF_HI, saved_bank_hi);
+		copyin (info->mask, &mask, 1);
+		WSeq (ba, SEQ_ID_CURSOR_PIXELMASK, mask);
+		/* info->size.x = 32; *//* ??? */
+
+		info->size.y = (RSeq (ba, SEQ_ID_CURSOR_CONTROL) & 6) << 4;
+		control = (control & ~6) | ((info->size.y >> 4) & 6);
+		vgaw (ba, SEQ_ID_CURSOR_CONTROL, control);
+
+		/* sick intel bull-addressing.. */
+		WSeq (ba, SEQ_ID_CURSOR_STORE_LO, SPRITE_ADDR & 0x0f);
+		WSeq (ba, SEQ_ID_CURSOR_STORE_HI, 0);
+		WSeq (ba, SEQ_ID_CURSOR_ST_OFF_LO, (SPRITE_ADDR >> 4) & 0xff);
+		WSeq (ba, SEQ_ID_CURSOR_ST_OFF_HI, ((SPRITE_ADDR >> 4) >> 8) & 0xff);
+	}
   
-  return 0;
+	return (0);
 }
 
+
 int
 rt_getspritemax (gp, pos)
-     struct grf_softc *gp;
-     struct grf_position *pos;
+	struct grf_softc *gp;
+	struct grf_position *pos;
 {
-  pos->x = 32;
-  pos->y = 128;
+	pos->x = 32;
+	pos->y = 128;
 
-  return 0;
+	return (0);
 }
 
 
@@ -1378,11 +1380,10 @@ rt_getspritemax (gp, pos)
 
 int
 rt_bitblt (gp, bb)
-     struct grf_softc *gp;
-     struct grf_bitblt *bb;
+	struct grf_softc *gp;
+	struct grf_bitblt *bb;
 {
-  return EINVAL;
-
+	return (EINVAL);
 
 #if 0
   volatile caddr_t ba, fb;
@@ -1454,4 +1455,19 @@ rt_bitblt (gp, bb)
 }
 
 
+int
+rt_blank(gp, on)
+	struct grf_softc *gp;
+	int *on;
+{
+	int r;
+
+	r = RSeq(gp->g_regkva, SEQ_ID_CLOCKING_MODE);
+	r &= 0xdf;	/* set Bit 5 to 0 */
+
+	WSeq(gp->g_regkva, SEQ_ID_CLOCKING_MODE, r | (*on ? 0x00 : 0x20));
+
+	return(0);
+}       
+
 #endif	/* NGRF */
diff --git a/sys/arch/amiga/dev/grf_ul.c b/sys/arch/amiga/dev/grf_ul.c
index c67a9c9c428..ba6b06d66e2 100644
--- a/sys/arch/amiga/dev/grf_ul.c
+++ b/sys/arch/amiga/dev/grf_ul.c
@@ -1,5 +1,5 @@
-/*	$OpenBSD: grf_ul.c,v 1.8 1996/05/04 13:54:31 niklas Exp $	*/
-/*	$NetBSD: grf_ul.c,v 1.16 1996/05/01 09:59:29 veego Exp $	*/
+/*	$OpenBSD: grf_ul.c,v 1.9 1996/05/29 10:15:17 niklas Exp $	*/
+/*	$NetBSD: grf_ul.c,v 1.17 1996/05/09 20:31:25 is Exp $	*/
 
 #define UL_DEBUG
 
@@ -907,6 +907,7 @@ ul_blank(gp, onoff, dev)
 	dev_t dev;
 {
 	struct gspregs *gsp;
+
 	gsp = (struct gspregs *)gp->g_regkva;
 	gsp->ctrl = (gsp->ctrl & ~(INCR | INCW)) | LBL;
 	gsp->hstadrh = 0xC000;
diff --git a/sys/arch/amiga/dev/grfabs_cc.c b/sys/arch/amiga/dev/grfabs_cc.c
index 9a097ee7cd4..0a74231f536 100644
--- a/sys/arch/amiga/dev/grfabs_cc.c
+++ b/sys/arch/amiga/dev/grfabs_cc.c
@@ -1,5 +1,5 @@
-/*	$OpenBSD: grfabs_cc.c,v 1.2 1996/05/02 06:43:55 niklas Exp $	*/
-/*	$NetBSD: grfabs_cc.c,v 1.11 1996/04/21 21:11:28 veego Exp $	*/
+/*	$OpenBSD: grfabs_cc.c,v 1.3 1996/05/29 10:15:20 niklas Exp $	*/
+/*	$NetBSD: grfabs_cc.c,v 1.12 1996/05/19 21:05:50 veego Exp $	*/
 
 /*
  * Copyright (c) 1994 Christian E. Hopps
@@ -1843,7 +1843,7 @@ cc_init_ntsc_aga()
 		aga_this_data->bplcon0 = 0x0240 | USE_CON3;	/* color composite
 								 * enable,
 								 * shres. */
-		aga_this_data->std_start_x = 0x4f /*STANDARD_VIEW_X*/;
+		aga_this_data->std_start_x = 0x40 /*STANDARD_VIEW_X*/;
 		aga_this_data->std_start_y = 0x2b /*STANDARD_VIEW_Y*/;
 		aga_this_data->vbl_handler = (vbl_handler_func *) cc_mode_vbl_handler;
 		aga_this_data->beamcon0 = SPECIAL_BEAMCON ^ VSYNCTRUE;
@@ -1856,12 +1856,12 @@ cc_init_ntsc_aga()
 
 /* static, so I can patch and play */
 
-int	AGA_htotal = 0x79;
-int	AGA_hsstrt = 0xe;
-int	AGA_hsstop = 0x1c;
-int	AGA_hbstrt = 0x8;
+int	AGA_htotal = 0x71;
+int	AGA_hsstrt = 0xc;
+int	AGA_hsstop = 0x16;
+int	AGA_hbstrt = 0x5;
 int	AGA_hbstop = 0x1e;
-int	AGA_vtotal = 0x1ec;
+int	AGA_vtotal = 0x1c1;
 int	AGA_vsstrt = 0x3;
 int	AGA_vsstop = 0x6;
 int	AGA_vbstrt = 0x0;
diff --git a/sys/arch/amiga/dev/grfvar.h b/sys/arch/amiga/dev/grfvar.h
index 14c30895992..1214823a31e 100644
--- a/sys/arch/amiga/dev/grfvar.h
+++ b/sys/arch/amiga/dev/grfvar.h
@@ -1,5 +1,5 @@
-/*	$OpenBSD: grfvar.h,v 1.2 1996/05/02 06:43:59 niklas Exp $	*/
-/*	$NetBSD: grfvar.h,v 1.13 1996/04/21 21:11:33 veego Exp $	*/
+/*	$OpenBSD: grfvar.h,v 1.3 1996/05/29 10:15:23 niklas Exp $	*/
+/*	$NetBSD: grfvar.h,v 1.14 1996/05/19 21:05:54 veego Exp $	*/
 
 /*
  * Copyright (c) 1988 University of Utah.
@@ -109,5 +109,6 @@ enum grfunits {
 	GRF_RETINAIII_UNIT,
 	GRF_CL5426_UNIT,
 	GRF_ULOWELL_UNIT,
-	GRF_CV64_UNIT
+	GRF_CV64_UNIT,
+	GRF_ET4000_UNIT
 };
diff --git a/sys/arch/amiga/dev/idesc.c b/sys/arch/amiga/dev/idesc.c
index 77d9e5598ea..abfb8e53299 100644
--- a/sys/arch/amiga/dev/idesc.c
+++ b/sys/arch/amiga/dev/idesc.c
@@ -1,5 +1,5 @@
-/*	$OpenBSD: idesc.c,v 1.4 1996/05/02 06:44:01 niklas Exp $	*/
-/*	$NetBSD: idesc.c,v 1.20 1996/04/28 06:36:16 mhitch Exp $	*/
+/*	$OpenBSD: idesc.c,v 1.5 1996/05/29 10:15:24 niklas Exp $	*/
+/*	$NetBSD: idesc.c,v 1.21 1996/05/12 02:26:03 mhitch Exp $	*/
 
 /*
  * Copyright (c) 1994 Michael L. Hitch
@@ -536,15 +536,6 @@ ide_scsidone(dev, stat)
 	if (xs == NULL)
 		panic("ide_scsidone");
 #endif
-#if 1
-	/*
-	 * XXX Support old-style instrumentation for now.
-	 * IS THIS REALLY THE RIGHT PLACE FOR THIS?  --thorpej
-	 */
-	if (xs->sc_link && xs->sc_link->device_softc &&
-	    ((struct device *)(xs->sc_link->device_softc))->dv_unit < dk_ndrive)
-		++dk_xfer[((struct device *)(xs->sc_link->device_softc))->dv_unit];
-#endif
 	/*
 	 * is this right?
 	 */
diff --git a/sys/arch/amiga/dev/ite.c b/sys/arch/amiga/dev/ite.c
index 177e93306d3..abc4eda5ce4 100644
--- a/sys/arch/amiga/dev/ite.c
+++ b/sys/arch/amiga/dev/ite.c
@@ -1,5 +1,5 @@
-/*	$OpenBSD: ite.c,v 1.6 1996/05/02 06:44:09 niklas Exp $  */
-/*	$NetBSD: ite.c,v 1.39 1996/04/21 21:11:52 veego Exp $	*/
+/*	$OpenBSD: ite.c,v 1.7 1996/05/29 10:15:27 niklas Exp $  */
+/*	$NetBSD: ite.c,v 1.41 1996/05/19 19:03:06 is Exp $	*/
 
 /*
  * Copyright (c) 1988 University of Utah.
@@ -61,6 +61,7 @@
 #include <amiga/amiga/cc.h>
 #include <amiga/amiga/kdassert.h>
 #include <amiga/amiga/color.h>	/* DEBUG */
+#include <amiga/amiga/custom.h>	/* DEBUG */
 #include <amiga/amiga/device.h>
 #include <amiga/amiga/isr.h>
 #include <amiga/dev/iteioctl.h>
@@ -69,6 +70,8 @@
 #include <amiga/dev/grfioctl.h>
 #include <amiga/dev/grfvar.h>
 
+#include <machine/cpu.h>	/* for is_draco() */
+
 #include <sys/conf.h>
 #include <machine/conf.h>
 
@@ -322,6 +325,9 @@ itecninit(cd)
 	iteinit(cd->cn_dev);
 	ip->flags |= ITE_ACTIVE | ITE_ISCONS;
 
+#ifdef DRACO
+	if (!is_draco())
+#endif
 	init_bell();
 }
 
@@ -2181,7 +2187,11 @@ iteputchar(c, ip)
 		}
 		break;
 	case BEL:
-		if (kbd_tty && kbd_ite && kbd_ite->tp == kbd_tty)
+		if (kbd_tty && kbd_ite && kbd_ite->tp == kbd_tty 
+#ifdef DRACO
+		    && !is_draco()	
+#endif
+		    )
 			ite_bell();
 		break;
 	case SO:
diff --git a/sys/arch/amiga/dev/ite_cv.c b/sys/arch/amiga/dev/ite_cv.c
index 8157fc796e7..0edbb26a527 100644
--- a/sys/arch/amiga/dev/ite_cv.c
+++ b/sys/arch/amiga/dev/ite_cv.c
@@ -1,5 +1,5 @@
-/*	$OpenBSD: ite_cv.c,v 1.2 1996/05/02 06:44:12 niklas Exp $	*/
-/*	$NetBSD: ite_cv.c,v 1.2 1996/04/21 21:11:59 veego Exp $	*/
+/*	$OpenBSD: ite_cv.c,v 1.3 1996/05/29 10:15:28 niklas Exp $	*/
+/*	$NetBSD: ite_cv.c,v 1.3 1996/05/19 21:05:58 veego Exp $	*/
 
 /*
  * Copyright (c) 1995 Michael Teske
@@ -34,9 +34,8 @@
  */
 
 /*
- * The text console is based on ite_cl.c and ite_rh.c by
+ * This code is based on ite_cl.c and ite_rh.c by
  * Ezra Story, Kari Mettinen, Markus Wild, Lutz Vieweg.
- * The gfx console is based on ite_cc.c from Christian E. Hopps.
  */
 
 #include "grfcv.h"
@@ -68,20 +67,6 @@ static void cv_putc __P((struct ite_softc *, int, int, int, int));
 static void cv_clear __P((struct ite_softc *, int, int, int, int));
 static void cv_scroll __P((struct ite_softc *, int, int, int, int));
 
-#define MAXROWS 200
-#define MAXCOLS 200
-static unsigned short cv_rowc[MAXROWS];
-
-#ifndef CV_DONT_USE_CONBUFFER
-
-/*
- * Console buffer to avoid the slow reading from gfx mem.
- * this takes up 40k but it makes scrolling 3 times faster.
- * I'd like to alocate it dynamically.
- */
-static unsigned short console_buffer[MAXCOLS*MAXROWS];
-#endif
-
 /*
  * called from grf_cv to return console priority
  */
@@ -133,27 +118,61 @@ cv_ite_deinit(ip)
 }
 
 
+static unsigned short cv_rowc[MAXCOLS*(MAXROWS+1)];
+
+/*
+ * Console buffer to avoid the slow reading from gfx mem.
+ */
+
+static unsigned short *console_buffer;
+
 void
 cv_ite_init(ip)
 	register struct ite_softc *ip;
 {
 	struct grfcvtext_mode *md;
 	int i;
+	static char first = 1;
+	volatile unsigned short *fb = (volatile unsigned short *)ip->grf->g_fbkva;
+	unsigned short *buffer;
+
 
 	ip->priv = ip->grf->g_data;
 	md = (struct grfcvtext_mode *) ip->grf->g_data;
 
 	ip->cols = md->cols;
 	ip->rows = md->rows;
-	if (ip->rows > MAXROWS)
-		panic ("ite_cv.c: Too many rows!");
+
+	/* alloc buffers */
+
+#if 0  /* XXX malloc seems not to work in early init :( */
+	if (cv_rowc)
+		free(cv_rowc, M_DEVBUF);
+ 
+	/* alloc all in one */
+	cv_rowc = malloc(sizeof(short) * (ip->rows + 1) * (ip->cols + 2),
+		M_DEVBUF, M_WAITOK);
+	if (!cv_rowc)
+		panic("No buffers for ite_cv!");
+#endif
+ 
+	console_buffer = cv_rowc + ip->rows + 1;
+
 
 	for (i = 0; i < ip->rows; i++)
 		cv_rowc[i] = i * ip->cols;
-#ifndef CV_DONT_USE_CONBUFFER
-	for (i = 0; i < MAXCOLS*MAXROWS; i++)
-		console_buffer[i] = 0x2007;
-#endif
+
+	if (first) {
+		for (i = 0; i < ip->rows * ip->cols; i++)
+			console_buffer[i] = 0x2007;
+		first = 0;
+	} else { /* restore console */
+		buffer = console_buffer;
+		for (i = 0; i < ip->rows * ip->cols; i++) {
+			*fb++ = *buffer++;
+			*fb++;
+		}
+	}
 }
 
 
@@ -204,11 +223,10 @@ cv_putc(ip, c, dy, dx, mode)
 	cp = fb + ((cv_rowc[dy] + dx) << 2); /* *4 */
 	*cp++ = (unsigned char) c;
 	*cp = (unsigned char) attr;
-#ifndef CV_DONT_USE_CONBUFFER
+
 	cp = (unsigned char *) &console_buffer[cv_rowc[dy]+dx];
 	*cp++ = (unsigned char) c;
 	*cp = (unsigned char) attr;
-#endif
 }
 
 
@@ -229,17 +247,15 @@ cv_clear(ip, sy, sx, h, w)
 
 	dst = (unsigned short *) (ip->grf->g_fbkva + (((sy * ip->cols) + sx) << 2));
 
-	for (len = w*h; len > 0 ; len--) {
+	for (len = w * h; len > 0 ; len--) {
 		*dst = 0x2007;
 		dst +=2;
 	}
 
-#ifndef CV_DONT_USE_CONBUFFER
 	dst = &console_buffer[(sy * ip->cols) + sx];
-	for (len = w*h; len > 0 ; len--) {
+	for (len = w * h; len > 0 ; len--) {
 		*dst++ = 0x2007;
 	}
-#endif
 }
 
 void
@@ -254,100 +270,70 @@ cv_scroll(ip, sy, sx, count, dir)
 	int i;
 	int len;
 
-	src = (unsigned short *)(ip->grf->g_fbkva + ((sy * ip->cols) << 2));
+	src = (unsigned short *)(ip->grf->g_fbkva + (cv_rowc[sy] << 2));
 
 	switch (dir) {
 	    case SCROLL_UP:
-		dst = src - ((count * ip->cols)<<1);
-#ifdef CV_DONT_USE_CONBUFFER
-		for (i = 0; i < (ip->bottom_margin + 1 - sy) * ip->cols; i++) {
-			*dst++ = *src++; /* copy only plane 0 and 1 */
-			dst++; src++;
-		}
-#else
-		len = (ip->bottom_margin + 1 - sy) * ip->cols;
-		src = &console_buffer[sy*ip->cols];
-#if 0
+		dst = src - ((cv_rowc[count])<<1);
+
+		len = cv_rowc[(ip->bottom_margin + 1 - sy)];
+		src = &console_buffer[cv_rowc[sy]];
+
 		if (count > sy) { /* boundary checks */
 			dst2 = console_buffer;
-			len -= (count - sy) * ip->cols;
-			src += (count - sy) * ip->cols;
-		} else 
-#endif
-			dst2 = &console_buffer[(sy-count)*ip->cols];
+			dst = (unsigned short *)(ip->grf->g_fbkva);
+			len -= cv_rowc[(count - sy)];
+			src += cv_rowc[(count - sy)];
+		} else
+			dst2 = &console_buffer[cv_rowc[(sy-count)]];
+
 		bcopy (src, dst2, len << 1);
 
 		for (i = 0; i < len; i++) {
 			*dst++ = *dst2++;
 			dst++;
 		}
-#endif
 		break;
 	    case SCROLL_DOWN:
-		dst = src + ((count * ip->cols)<<1);
-#ifdef CV_DONT_USE_CONBUFFER
-		len= (ip->bottom_margin + 1 - (sy + count)) * ip->cols;
-		dst += len << 1;
-		src += len << 1;
-		for (i = 0; i < len; i++) {
-			*dst-- = *src--;
-			dst--; src--;
-		}
-#else
-		len = (ip->bottom_margin + 1 - (sy + count)) * ip->cols;
-		src = &console_buffer[sy*ip->cols];
-		dst2 = &console_buffer[(sy+count)*ip->cols];
+		dst = src + ((cv_rowc[count]) << 1);
+
+		len = cv_rowc[(ip->bottom_margin + 1 - (sy + count))];
+		src = &console_buffer[cv_rowc[sy]];
+		dst2 = &console_buffer[cv_rowc[(sy + count)]];
+
+		if (len < 0)
+			return;  /* do some boundary check */
+
 		bcopy (src, dst2, len << 1);
 
 		for (i = 0; i < len; i++) {
 			*dst++ = *dst2++;
 			dst++;
 		}
-#endif
 		break;
 	    case SCROLL_RIGHT:
 		dst = src + ((sx+count)<<1);
-#ifdef CV_DONT_USE_CONBUFFER
-		src += sx << 1;
-		len = (ip->cols - (sx + count));
-		dst += (len-1) << 1;
-		src += (len-1) << 1;
-
-		for (i = 0; i < len ; i++) {
-			*dst-- = *src--;
-			dst--; src--;
-		}
-#else
-		src = &console_buffer[sy*ip->cols + sx];
+		src = &console_buffer[cv_rowc[sy] + sx];
 		len = ip->cols - (sx + count);
-		dst2 = &console_buffer[sy*ip->cols + sx + count];
+		dst2 = &console_buffer[cv_rowc[sy] + sx + count];
 		bcopy (src, dst2, len << 1);
 
 		for (i = 0; i < len; i++) {
 			*dst++ = *dst2++;
 			dst++;
 		}
-#endif
 		break;
 	    case SCROLL_LEFT:
 		dst = src + ((sx - count)<<1);
-#ifdef CV_DONT_USE_CONBUFFER
-		src += sx << 1;
-		for (i = 0; i < (ip->cols - sx) ; i++) {
-			*dst++ = *src++;
-			dst++; src++;
-		}
-#else
-		src = &console_buffer[sy*ip->cols + sx];
+		src = &console_buffer[cv_rowc[sy] + sx];
 		len = ip->cols - sx;
-		dst2 = &console_buffer[sy*ip->cols + sx - count];
+		dst2 = &console_buffer[cv_rowc[sy] + sx - count];
 		bcopy (src, dst2, len << 1);
 
 		for (i = 0; i < len; i++) {
 			*dst++ = *dst2++;
 			dst++;
 		}
-#endif
 	}
 }
 
diff --git a/sys/arch/amiga/dev/ite_et.c b/sys/arch/amiga/dev/ite_et.c
new file mode 100644
index 00000000000..d2e275b55e1
--- /dev/null
+++ b/sys/arch/amiga/dev/ite_et.c
@@ -0,0 +1,257 @@
+/*	$NetBSD: ite_et.c,v 1.1 1996/05/19 21:06:00 veego Exp $	*/
+
+/*
+ * Copyright (c) 1995 Ezra Story
+ * Copyright (c) 1995 Kari Mettinen
+ * Copyright (c) 1994 Markus Wild
+ * Copyright (c) 1994 Lutz Vieweg
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *      This product includes software developed by Lutz Vieweg.
+ * 4. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.   
+ */
+
+#include "grfet.h"
+#if NGRFET > 0
+
+#include <sys/param.h>
+#include <sys/conf.h>
+#include <sys/proc.h>
+#include <sys/device.h>
+#include <sys/ioctl.h>
+#include <sys/tty.h>
+#include <sys/systm.h>
+#include <dev/cons.h>
+#include <machine/cpu.h>
+#include <amiga/amiga/device.h>
+#include <amiga/dev/grfioctl.h>
+#include <amiga/dev/grfvar.h>
+#include <amiga/dev/grf_etreg.h>
+#include <amiga/dev/itevar.h>
+
+#ifdef TSENGCONSOLE
+int et_console = 1;
+#else
+int et_console = 0;
+#endif
+
+void et_init __P((struct ite_softc *ip));
+void et_cursor __P((struct ite_softc *ip, int flag));
+void et_deinit __P((struct ite_softc *ip));
+void et_putc __P((struct ite_softc *ip, int c, int dy, int dx, int mode));
+void et_clear __P((struct ite_softc *ip, int sy, int sx, int h, int w));
+void et_scroll __P((struct ite_softc *ip, int sy, int sx, int count,
+    int dir));
+
+
+/*
+ * Called to determine ite status.  Because the connection between the
+ * console & ite in this driver is rather intimate, we return CN_DEAD
+ * if the cl_console is not active.
+ */
+int
+grfet_cnprobe(void)
+{
+	static int done;
+	int rv;
+
+	if (et_console && (done == 0))
+		rv = CN_INTERNAL;
+	else
+		rv = CN_DEAD;
+
+	done = 1;
+	return(rv);
+}
+
+
+void
+grfet_iteinit(gp)
+	struct grf_softc *gp;
+{
+	gp->g_iteinit = et_init;
+	gp->g_itedeinit = et_deinit;
+	gp->g_iteclear = et_clear;
+	gp->g_iteputc = et_putc;
+	gp->g_itescroll = et_scroll;
+	gp->g_itecursor = et_cursor;
+}
+
+
+void
+et_init(ip)
+	struct ite_softc *ip;
+{
+	struct grfettext_mode *md;
+
+	ip->priv = ip->grf->g_data;
+	md = (struct grfettext_mode *) ip->priv;
+
+	ip->cols = md->cols;
+	ip->rows = md->rows;
+}
+
+
+void
+et_cursor(ip, flag)
+	struct ite_softc *ip;
+	int flag;
+{
+	volatile u_char *ba = ip->grf->g_regkva;
+
+	switch (flag) {
+ 	    case DRAW_CURSOR:
+		/*WCrt(ba, CRT_ID_CURSOR_START, & ~0x20); */
+	    case MOVE_CURSOR:
+		flag = ip->curx + ip->cury * ip->cols;
+		WCrt(ba, CRT_ID_CURSOR_LOC_LOW, flag & 0xff);
+		WCrt(ba, CRT_ID_CURSOR_LOC_HIGH, (flag >> 8) & 0xff);
+		WCrt(ba, CTR_ID_EXT_START, (flag >> (16-2)) & 0x0c);
+
+		ip->cursorx = ip->curx;
+		ip->cursory = ip->cury;
+		break;
+	    case ERASE_CURSOR:
+		/*WCrt(ba, CRT_ID_CURSOR_START, | 0x20); */
+	    case START_CURSOROPT:
+	    case END_CURSOROPT:
+	    default:
+		break;
+    	}
+}
+
+
+void
+et_deinit(ip)
+	struct ite_softc *ip;
+{
+	ip->flags &= ~ITE_INITED;
+}
+
+
+void
+et_putc(ip, c, dy, dx, mode)
+	struct ite_softc *ip;
+	int c;
+	int dy;
+	int dx;
+	int mode;
+{
+	volatile unsigned char *ba = ip->grf->g_regkva;
+	unsigned char *fb = ip->grf->g_fbkva;
+	unsigned char attr;
+	unsigned char *cp;
+
+	attr =(unsigned char) ((mode & ATTR_INV) ? (0x70) : (0x07));
+	if (mode & ATTR_UL)     attr  = 0x01;	/* ???????? */
+	if (mode & ATTR_BOLD)   attr |= 0x08;
+	if (mode & ATTR_BLINK)  attr |= 0x80;
+
+	cp = fb + ((dy * ip->cols) + dx);
+	SetTextPlane(ba,0x00);
+	*cp = (unsigned char) c;
+	SetTextPlane(ba,0x01);
+	*cp = (unsigned char) attr;
+}
+
+
+void
+et_clear(ip, sy, sx, h, w)
+	struct ite_softc *ip;
+	int sy;
+	int sx;
+	int h;
+	int w;
+{
+	/* cl_clear and cl_scroll both rely on ite passing arguments
+	 * which describe continuous regions.  For a VT200 terminal,
+	 * this is safe behavior.
+	 */
+	unsigned char *src, *dst;
+	volatile unsigned char *ba = ip->grf->g_regkva;
+	int len;
+
+	dst = ip->grf->g_fbkva + (sy * ip->cols) + sx;
+	src = dst + (ip->rows*ip->cols); 
+	len = w*h;
+
+	SetTextPlane(ba, 0x00);
+	bcopy(src, dst, len);
+	SetTextPlane(ba, 0x01);
+	bcopy(src, dst, len);
+}
+
+
+void
+et_scroll(ip, sy, sx, count, dir)
+	struct ite_softc *ip;
+	int sy;
+	int sx;
+	int count;
+	int dir;
+{
+	unsigned char *fb;
+	volatile unsigned char *ba = ip->grf->g_regkva;
+
+	fb = ip->grf->g_fbkva + sy * ip->cols;
+	SetTextPlane(ba, 0x00);
+
+	switch (dir) {
+	    case SCROLL_UP:
+		bcopy(fb, fb - (count * ip->cols), 
+		    (ip->bottom_margin + 1 - sy) * ip->cols);
+		break;
+	    case SCROLL_DOWN:
+		bcopy(fb, fb + (count * ip->cols),
+		    (ip->bottom_margin + 1 - (sy + count)) * ip->cols);
+		break;
+	    case SCROLL_RIGHT:
+		bcopy(fb+sx, fb+sx+count, ip->cols - (sx + count));
+		break;
+	    case SCROLL_LEFT:
+		bcopy(fb+sx, fb+sx-count, ip->cols - sx);
+		break;
+	}
+
+	SetTextPlane(ba, 0x01);
+
+	switch (dir) {
+	    case SCROLL_UP:
+		bcopy(fb, fb - (count * ip->cols), 
+		    (ip->bottom_margin + 1 - sy) * ip->cols);
+		break;
+	    case SCROLL_DOWN:
+		bcopy(fb, fb + (count * ip->cols),
+		    (ip->bottom_margin + 1 - (sy + count)) * ip->cols);
+		break;
+	    case SCROLL_RIGHT:
+		bcopy(fb+sx, fb+sx+count, ip->cols - (sx + count));
+		break;
+	    case SCROLL_LEFT:
+		bcopy(fb+sx, fb+sx-count, ip->cols - sx);
+		break;
+	}
+}
+#endif /* NGRFET */
diff --git a/sys/arch/amiga/dev/ite_ul.c b/sys/arch/amiga/dev/ite_ul.c
index 1bfd57a1825..b9bc4aa9995 100644
--- a/sys/arch/amiga/dev/ite_ul.c
+++ b/sys/arch/amiga/dev/ite_ul.c
@@ -1,4 +1,4 @@
-/*	$NetBSD: ite_ul.c,v 1.2 1995/12/27 08:09:51 chopps Exp $	*/
+/*	$NetBSD: ite_ul.c,v 1.4 1996/05/10 13:02:35 is Exp $	*/
 
 /*
  * Copyright (c) 1995 Ignatios Souvatzis
diff --git a/sys/arch/amiga/dev/kbd.c b/sys/arch/amiga/dev/kbd.c
index fc6fa59d678..14a18256161 100644
--- a/sys/arch/amiga/dev/kbd.c
+++ b/sys/arch/amiga/dev/kbd.c
@@ -1,5 +1,5 @@
-/*	$OpenBSD: kbd.c,v 1.3 1996/05/02 06:44:16 niklas Exp $	*/
-/*	$NetBSD: kbd.c,v 1.18 1996/04/21 21:12:05 veego Exp $	*/
+/*	$OpenBSD: kbd.c,v 1.4 1996/05/29 10:15:33 niklas Exp $	*/
+/*	$NetBSD: kbd.c,v 1.22 1996/05/16 20:18:01 is Exp $	*/
 
 /*
  * Copyright (c) 1982, 1986, 1990 The Regents of the University of California.
@@ -49,6 +49,9 @@
 #include <machine/cpu.h>
 #include <amiga/amiga/device.h>
 #include <amiga/amiga/custom.h>
+#ifdef DRACO
+#include <amiga/amiga/drcustom.h>
+#endif
 #include <amiga/amiga/cia.h>
 #include <amiga/dev/itevar.h>
 #include <amiga/dev/kbdreg.h>
@@ -63,12 +66,16 @@
 struct kbd_softc {
 	int k_event_mode;	/* if true, collect events, else pass to ite */
 	struct evvar k_events;	/* event queue state */
+#ifdef DRACO
+	u_char k_rlprfx;	/* MF-II rel. prefix has been seen */
+#endif
 };
 struct kbd_softc kbd_softc;
 
 int kbdmatch __P((struct device *, void *, void *));
 void kbdattach __P((struct device *, struct device *, void *));
 void kbdintr __P((int));
+void kbdstuffchar __P((u_char));
 
 struct cfattach kbd_ca = {
 	sizeof(struct device), kbdmatch, kbdattach
@@ -96,7 +103,28 @@ kbdattach(pdp, dp, auxp)
 	struct device *pdp, *dp;
 	void *auxp;
 {
-	printf("\n");
+#ifdef DRACO
+	/* 
+	 * XXX Must be kept in sync with kbdenable() switch.
+	 * XXX This should be probed, but this way we dont need to initialize
+	 * the keyboards.
+	 */
+	switch (is_draco()) {
+		case 0: 
+		case 1: 
+		case 2: 
+			printf(": CIA A type Amiga\n");
+			break;
+		case 3:
+		case 4:
+		default:
+			printf(": QuickLogic type MF-II\n");
+			break;
+	}
+#else
+	printf(": CIA A type Amiga\n");
+#endif
+
 }
 
 /* definitions for amiga keyboard encoding. */
@@ -108,14 +136,57 @@ kbdenable()
 {
 	int s;
 
+#ifdef DRACO
+	u_char c;
+#endif
 	/*
 	 * collides with external ints from SCSI, watch out for this when
 	 * enabling/disabling interrupts there !!
 	 */
 	s = spltty();
+#ifdef DRACO
+	switch (is_draco()) {
+		case 0:
+			custom.intena = INTF_SETCLR | INTF_PORTS;
+
+			ciaa.icr = CIA_ICR_IR_SC | CIA_ICR_SP;
+						/* SP interrupt enable */
+			ciaa.cra &= ~(1<<6);	/* serial line == input */
+			printf("ok.\n");
+			break;
+		case 1:
+		case 2:
+			/* XXX: tobedone: conditionally enable that one */
+			/* XXX: for now, just enable DraCo ports and CIA */
+			*draco_intena |= DRIRQ_INT2;
+			ciaa.icr = CIA_ICR_IR_SC | CIA_ICR_SP;
+						/* SP interrupt enable */
+			ciaa.cra &= ~(1<<6);	/* serial line == input */
+			break;
+
+		case 3:
+			ciaa.icr = CIA_ICR_SP;  /* CIA SP interrupt disable */
+			ciaa.cra &= ~(1<<6);	/* serial line == input */
+			/* FALLTHROUGH */
+		case 4:
+		default:
+			/* XXX: for now: always enable own keyboard */
+
+			while (draco_ioct->io_status & DRSTAT_KBDRECV) {
+				c = draco_ioct->io_kbddata;
+				draco_ioct->io_kbdrst = 0;
+				printf(".");
+				DELAY(2000);
+			}
+
+			draco_ioct->io_control &= ~DRCNTRL_KBDINTENA;
+			break;
+	}
+#else
 	custom.intena = INTF_SETCLR | INTF_PORTS;
 	ciaa.icr = CIA_ICR_IR_SC | CIA_ICR_SP;  /* SP interrupt enable */
 	ciaa.cra &= ~(1<<6);		/* serial line == input */
+#endif
 	kbd_softc.k_event_mode = 0;
 	kbd_softc.k_events.ev_io = 0;
 	splx(s);
@@ -220,14 +291,12 @@ kbdintr(mask)
 	int mask;
 {
 	u_char c;
-	struct kbd_softc *k = &kbd_softc;
-	struct firm_event *fe;
-	int put;
 #ifdef KBDRESET
 	static int reset_warn;
 #endif
  
-	/* now only invoked from generic CIA interrupt handler if there *is*
+	/* 
+	 * now only invoked from generic CIA interrupt handler if there *is*
 	 * a keyboard interrupt pending
 	 */
     
@@ -260,48 +329,85 @@ kbdintr(mask)
 		return;
 	}
 #endif
-	/* if not in event mode, deliver straight to ite to process key stroke */
-	if (! k->k_event_mode) {
-		ite_filter (c, ITEFILT_TTY);
-		return;
-	}
-
-	/* Keyboard is generating events.  Turn this keystroke into an
-	 * event and put it in the queue.  If the queue is full, the
-	 * keystroke is lost (sorry!).
-	 */
- 
-	put = k->k_events.ev_put;
-	fe = &k->k_events.ev_q[put];
-	put = (put + 1) % EV_QSIZE;
-	if (put == k->k_events.ev_get) {
-		log(LOG_WARNING, "keyboard event queue overflow\n"); /* ??? */
-		return;
-	}
-	fe->id = KEY_CODE(c);
-	fe->value = KEY_UP(c) ? VKEY_UP : VKEY_DOWN;
-	fe->time = time;
-	k->k_events.ev_put = put;
-	EV_WAKEUP(&k->k_events);
+	kbdstuffchar(c);
 }
+  
+#ifdef DRACO
+/* maps MF-II keycodes to Amiga keycodes */
+
+u_char drkbdtab[] = {
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x50,
+	0x45, 0xff, 0xff, 0xff, 0xff, 0x42, 0x00, 0x51,
+
+	0xff, 0x64, 0x60, 0x30, 0x63, 0x10, 0x01, 0x52,
+	0xff, 0x66, 0x31, 0x21, 0x20, 0x11, 0x02, 0x53,
+
+	0xff, 0x33, 0x32, 0x22, 0x12, 0x04, 0x03, 0x54,
+	0xff, 0x40, 0x34, 0x23, 0x14, 0x13, 0x05, 0x55,
+
+	0xff, 0x36, 0x35, 0x25, 0x24, 0x15, 0x06, 0x56,
+	0xff, 0x67, 0x37, 0x26, 0x16, 0x07, 0x08, 0x57,
+	/* --- */
+	0xff, 0x38, 0x27, 0x17, 0x18, 0x0a, 0x09, 0x58,
+	0xff, 0x39, 0x3a, 0x28, 0x29, 0x19, 0x0b, 0x59,
+
+	0xff, 0xff, 0x2a, 0x2b, 0x1a, 0x0c, 0x4b, 0xff,
+	0x65, 0x61, 0x44, 0x1b, 0xff, 0xff, 0x6f, 0xff,
+
+	0x4d, 0x4f, 0xff, 0x4c, 0x0d, 0xff, 0x41, 0x46,
+	0xff, 0x1d, 0x4e, 0x2d, 0x3d, 0x4a, 0x5f, 0x62,
+
+	0x0f, 0x3c, 0x1e, 0x2e, 0x2f, 0x3e, 0x5a, 0x5b,
+	0xff, 0x43, 0x1f, 0xff, 0x5e, 0x3f, 0x5c, 0xff,
+	/* --- */
+	0xff, 0xff, 0xff, 0xff, 0x5d
+};
+#endif
 
 
 int
-kbdgetcn()
+kbdgetcn ()
 {
-	int s = spltty ();
+	int s;
 	u_char ints, mask, c, in;
 
-	for (ints = 0; ! ((mask = ciaa.icr) & CIA_ICR_SP); ints |= mask) ;
+#ifdef DRACO
+	/*
+	 * XXX todo: if CIA DraCo, get from cia if cia kbd 
+	 * installed.
+	 */
+	if (is_draco()) {
+		c = 0;
+		s = spltty ();
+		while ((draco_ioct->io_status & DRSTAT_KBDRECV) == 0);
+		in = draco_ioct->io_kbddata;
+		draco_ioct->io_kbdrst = 0;
+		if (in == 0xF0) { /* release prefix */
+			c = 0x80;
+			while ((draco_ioct->io_status & DRSTAT_KBDRECV) == 0);
+			in = draco_ioct->io_kbddata;
+			draco_ioct->io_kbdrst = 0;
+		}
+		splx(s);
+#ifdef DRACORAWKEYDEBUG
+		printf("<%02x>", in);
+#endif
+		return (in>=sizeof(drkbdtab) ? 0xff : drkbdtab[in]|c);
+	}
+#endif
+	s = spltty();
+	for (ints = 0; ! ((mask = ciaa.icr) & CIA_ICR_SP); 
+	    ints |= mask) ;
 
 	in = ciaa.sdr;
 	c = ~in;
-
+  
 	/* ack */
 	ciaa.cra |= (1 << 6);	/* serial line output */
-	ciaa.sdr = 0xff;		/* ack */
+	ciaa.sdr = 0xff;	/* ack */
 	/* wait 200 microseconds */
-	DELAY(2000);    /* XXXX only works as long as DELAY doesn't use a timer and waits.. */
+	DELAY(2000);	/* XXXX only works as long as DELAY doesn't 
+			 * use a timer and waits.. */
 	ciaa.cra &= ~(1 << 6);
 	ciaa.sdr = in;
 
@@ -314,3 +420,64 @@ kbdgetcn()
 
 	return c;
 }
+
+void
+kbdstuffchar(c)
+	u_char c;
+{
+	struct firm_event *fe;
+	struct kbd_softc *k = &kbd_softc;
+	int put;
+
+	/* 
+	 * If not in event mode, deliver straight to ite to process 
+	 * key stroke 
+	 */
+
+	if (! k->k_event_mode) {
+		ite_filter (c, ITEFILT_TTY);
+		return;
+	}
+
+	/* 
+	 * Keyboard is generating events. Turn this keystroke into an
+	 * event and put it in the queue. If the queue is full, the
+	 * keystroke is lost (sorry!).
+	 */
+	
+	put = k->k_events.ev_put;
+	fe = &k->k_events.ev_q[put];
+	put = (put + 1) % EV_QSIZE;
+	if (put == k->k_events.ev_get) {
+		log(LOG_WARNING, "keyboard event queue overflow\n");
+			/* ??? */
+		return;
+	}
+	fe->id = KEY_CODE(c);
+	fe->value = KEY_UP(c) ? VKEY_UP : VKEY_DOWN;
+	fe->time = time;
+	k->k_events.ev_put = put;
+	EV_WAKEUP(&k->k_events);
+}
+
+
+#ifdef DRACO
+void
+drkbdintr()
+{
+	u_char in;
+	struct kbd_softc *k = &kbd_softc;
+
+	in = draco_ioct->io_kbddata;
+	draco_ioct->io_kbdrst = 0;
+
+	if (in == 0xF0) 
+		k->k_rlprfx = 0x80;
+	else {
+		kbdstuffchar(in>=sizeof(drkbdtab) ? 0xff :
+		    drkbdtab[in] | k->k_rlprfx);
+		k->k_rlprfx = 0;
+	}
+}
+
+#endif
diff --git a/sys/arch/amiga/dev/ms.c b/sys/arch/amiga/dev/ms.c
index 39bee0431f9..4e14bef5f3e 100644
--- a/sys/arch/amiga/dev/ms.c
+++ b/sys/arch/amiga/dev/ms.c
@@ -1,5 +1,5 @@
-/*	$OpenBSD: ms.c,v 1.2 1996/05/02 06:44:21 niklas Exp $	*/
-/*	$NetBSD: ms.c,v 1.9 1996/04/24 11:41:16 is Exp $	*/
+/*	$OpenBSD: ms.c,v 1.3 1996/05/29 10:15:35 niklas Exp $	*/
+/*	$NetBSD: ms.c,v 1.10 1996/05/09 20:31:41 is Exp $	*/
 
 /*
  * based on:
@@ -115,7 +115,6 @@ msmatch(pdp, match, auxp)
 	return 0;
 }
 
-
 void
 msattach(pdp, dp, auxp)
 	struct device *pdp, *dp;
@@ -123,7 +122,6 @@ msattach(pdp, dp, auxp)
 {
 	printf("\n");
 }
-  
 
 /*
  * Amiga mice are hooked up to one of the two "game" ports, where
@@ -144,6 +142,7 @@ ms_enable(dev)
 	struct ms_softc *ms;
 
 	ms = (struct ms_softc *)getsoftc(ms_cd, minor(dev));
+
 	/* 
 	 * use this as flag to the "interrupt" to tell it when to
 	 * shut off (when it's reset to 0).
@@ -193,6 +192,7 @@ msintr(arg)
 	
 	unit = (int)arg;
 	ms = (struct ms_softc *)getsoftc(ms_cd, unit);
+
 	horc = ((u_char *) &count) + 1;
 	verc = (u_char *) &count;
 
@@ -385,6 +385,7 @@ msread(dev, uio, flags)
 	struct ms_softc *ms;
 
 	ms = (struct ms_softc *)getsoftc(ms_cd, minor(dev));
+
 	return(ev_read(&ms->ms_events, uio, flags));
 }
 
@@ -432,5 +433,6 @@ msselect(dev, rw, p)
 	struct ms_softc *ms;
 
 	ms = (struct ms_softc *)getsoftc(ms_cd, minor(dev));
+
 	return(ev_select(&ms->ms_events, rw, p));
 }
diff --git a/sys/arch/amiga/dev/sbic.c b/sys/arch/amiga/dev/sbic.c
index 37308102c96..cf83fabaecb 100644
--- a/sys/arch/amiga/dev/sbic.c
+++ b/sys/arch/amiga/dev/sbic.c
@@ -1,5 +1,5 @@
-/*	$OpenBSD: sbic.c,v 1.6 1996/05/04 14:12:29 niklas Exp $	*/
-/*	$NetBSD: sbic.c,v 1.24 1996/05/01 16:58:41 mhitch Exp $	*/
+/*	$OpenBSD: sbic.c,v 1.7 1996/05/29 10:15:38 niklas Exp $	*/
+/*	$NetBSD: sbic.c,v 1.25 1996/05/12 02:26:10 mhitch Exp $	*/
 
 /*
  * Copyright (c) 1994 Christian E. Hopps
@@ -560,13 +560,6 @@ sbic_scsidone(acb, stat)
 	}
 #endif
 	/*
-	 * XXX Support old-style instrumentation for now.
-	 * IS THIS REALLY THE RIGHT PLACE FOR THIS?  --thorpej
-	 */
-	if (slp->device_softc &&
-	    ((struct device *)(slp->device_softc))->dv_unit < dk_ndrive)
-		++dk_xfer[((struct device *)(slp->device_softc))->dv_unit];
-	/*
 	 * is this right?
 	 */
 	xs->status = stat;
diff --git a/sys/arch/amiga/dev/sci.c b/sys/arch/amiga/dev/sci.c
index 49de4b4cd19..ea12bc58ce2 100644
--- a/sys/arch/amiga/dev/sci.c
+++ b/sys/arch/amiga/dev/sci.c
@@ -1,5 +1,5 @@
-/*	$OpenBSD: sci.c,v 1.3 1996/05/02 06:44:28 niklas Exp $	*/
-/*	$NetBSD: sci.c,v 1.16 1996/04/21 21:12:24 veego Exp $	*/
+/*	$OpenBSD: sci.c,v 1.4 1996/05/29 10:15:40 niklas Exp $	*/
+/*	$NetBSD: sci.c,v 1.17 1996/05/12 02:26:19 mhitch Exp $	*/
 
 /*
  * Copyright (c) 1994 Michael L. Hitch
@@ -218,13 +218,6 @@ sci_scsidone(dev, stat)
 		panic("sci_scsidone");
 #endif
 	/*
-	 * XXX Support old-style instrumentation for now.
-	 * IS THIS REALLY THE RIGHT PLACE FOR THIS?  --thorpej
-	 */
-	if (xs->sc_link->device_softc &&
-	    ((struct device *)(xs->sc_link->device_softc))->dv_unit < dk_ndrive)
-		++dk_xfer[((struct device *)(xs->sc_link->device_softc))->dv_unit];
-	/*
 	 * is this right?
 	 */
 	xs->status = stat;
diff --git a/sys/arch/amiga/dev/scsidefs.h b/sys/arch/amiga/dev/scsidefs.h
index f7b68799266..e69de29bb2d 100644
--- a/sys/arch/amiga/dev/scsidefs.h
+++ b/sys/arch/amiga/dev/scsidefs.h
@@ -1,390 +0,0 @@
-/*	$NetBSD: scsidefs.h,v 1.4 1994/10/26 02:04:49 cgd Exp $	*/
-
-/*
- * Copyright (c) 1990 The Regents of the University of California.
- * All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * Van Jacobson of Lawrence Berkeley Laboratory.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *	This product includes software developed by the University of
- *	California, Berkeley and its contributors.
- * 4. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	@(#)scsidefs.h	7.3 (Berkeley) 2/5/91
- */
-
-/*
- * Common SCSI definitions
- */
-
-/* psns/pctl phase lines as bits */
-#define	PHASE_MSG	0x04
-#define	PHASE_CD	0x02		/* =1 if 'command' */
-#define	PHASE_IO	0x01		/* =1 if data inbound */
-/* Phase lines as values */
-#define	PHASE		0x07		/* mask for psns/pctl phase */
-#define	DATA_OUT_PHASE	0x00
-#define	DATA_IN_PHASE	0x01
-#define	CMD_PHASE	0x02
-#define	STATUS_PHASE	0x03
-#define	BUS_FREE_PHASE	0x04
-#define	ARB_SEL_PHASE	0x05	/* Fuji chip combines arbitration with sel. */
-#define	MESG_OUT_PHASE	0x06
-#define	MESG_IN_PHASE	0x07
-
-/* SCSI Messages */
-
-#define	MSG_CMD_COMPLETE	0x00
-#define MSG_EXT_MESSAGE		0x01
-#define	MSG_SAVE_DATA_PTR	0x02
-#define	MSG_RESTORE_PTR		0x03
-#define	MSG_DISCONNECT		0x04
-#define	MSG_INIT_DETECT_ERROR	0x05
-#define	MSG_ABORT		0x06
-#define	MSG_REJECT		0x07
-#define	MSG_NOOP		0x08
-#define	MSG_PARITY_ERROR	0x09
-#define	MSG_BUS_DEVICE_RESET	0x0C
-#define	MSG_IDENTIFY		0x80
-#define	MSG_IDENTIFY_DR		0xc0	/* (disconnect/reconnect allowed) */
-#define	MSG_SYNC_REQ 		0x01
-
-/* SCSI Commands */
-
-#define CMD_TEST_UNIT_READY	0x00
-#define CMD_REQUEST_SENSE	0x03
-#define	CMD_INQUIRY		0x12
-#define CMD_SEND_DIAGNOSTIC	0x1D
-
-#define CMD_REWIND		0x01
-#define CMD_FORMAT_UNIT		0x04
-#define CMD_READ_BLOCK_LIMITS	0x05
-#define CMD_REASSIGN_BLOCKS	0x07
-#define CMD_READ		0x08
-#define CMD_WRITE		0x0A
-#define CMD_WRITE_FILEMARK	0x10
-#define CMD_SPACE		0x11
-#define CMD_MODE_SELECT		0x15
-#define CMD_RELEASE_UNIT	0x17
-#define CMD_ERASE		0x19
-#define CMD_MODE_SENSE		0x1A
-#define CMD_LOADUNLOAD		0x1B
-#define CMD_RECEIVE_DIAG	0x1C
-#define CMD_SEND_DIAG		0x1D
-#define CMD_P_A_MEDIA_REMOVAL	0x1E
-#define CMD_READ_CAPACITY	0x25
-#define CMD_READ_EXT		0x28
-#define CMD_WRITE_EXT		0x2A
-#define CMD_READ_DEFECT_DATA	0x37
-#define		SD_MANUFAC_DEFECTS	0x14000000
-#define		SD_GROWN_DEFECTS	0x0c000000
-#define CMD_READ_BUFFER		0x3B
-#define CMD_WRITE_BUFFER	0x3C
-#define CMD_READ_FULL		0xF0
-#define CMD_MEDIA_TEST		0xF1
-#define CMD_ACCESS_LOG		0xF2
-#define CMD_WRITE_FULL		0xFC
-#define CMD_MANAGE_PRIMARY	0xFD
-#define CMD_EXECUTE_DATA	0xFE
-
-/* SCSI status bits */
-
-#define	STS_CHECKCOND	0x02	/* Check Condition (ie., read sense) */
-#define	STS_CONDMET	0x04	/* Condition Met (ie., search worked) */
-#define	STS_BUSY	0x08
-#define	STS_INTERMED	0x10	/* Intermediate status sent */
-#define	STS_EXT		0x80	/* Extended status valid */
-
-/* command descriptor blocks */
-
-struct scsi_cdb6 {
-	u_char	cmd;		/* command code */
-	u_char	lun:  3,	/* logical unit on ctlr */
-		lbah: 5;	/* msb of read/write logical block addr */
-	u_char	lbam;		/* middle byte of l.b.a. */
-	u_char	lbal;		/* lsb of l.b.a. */
-	u_char	len;		/* transfer length */
-	u_char	xtra;
-};
-
-struct scsi_cdb10 {
-	u_char	cmd;		/* command code */
-	u_char	lun: 3,		/* logical unit on ctlr */
-		   : 4,
-		rel: 1;		/* l.b.a. is relative addr if =1 */
-	u_char	lbah;		/* msb of read/write logical block addr */
-	u_char	lbahm;		/* high middle byte of l.b.a. */
-	u_char	lbalm;		/* low middle byte of l.b.a. */
-	u_char	lbal;		/* lsb of l.b.a. */
-	u_char	reserved;
-	u_char	lenh;		/* msb transfer length */
-	u_char	lenl;		/* lsb transfer length */
-	u_char	xtra;
-};
-
-/* basic sense data */
-
-struct scsi_sense {
-	u_char	valid: 1,	/* l.b.a. is valid */
-		class: 3,
-		code:  4;
-	u_char	vu:    4,	/* vendor unique */
-		lbah:  4;
-	u_char	lbam;
-	u_char	lbal;
-};
-
-struct scsi_xsense {
-	u_char	valid: 1,	/* l.b.a. is valid */
-		class: 3,
-		code:  4;
-	u_char	segment;
-	u_char	filemark: 1,
-		eom:      1,
-		ili:      1,	/* illegal length indicator */
-		rsvd:	  1,
-		key:	  4;
-	u_char	info1;
-	u_char	info2;
-	u_char	info3;
-	u_char	info4;
-	u_char	len;		/* additional sense length */
-};
-
-/* inquiry data */
-struct scsi_inquiry {
-	u_char	type;
-	u_char	qual;
-	u_char	version;
-	u_char	rsvd;
-	u_char	len;
-	char	class[3];
-	char	vendor_id[8];
-	char	product_id[16];
-	char	rev[4];
-};
-
-struct scsi_format_parms {		/* physical BFI format */
-	u_short	reserved;
-	u_short	list_len;
-	struct defect {
-		unsigned cyl  : 24;
-		unsigned head : 8;
-		long	bytes_from_index;
-	} defect[127];
-} format_parms;
-
-struct scsi_reassign_parms {
-	u_short	reserved;
-	u_short	list_len;	/* length in bytes of defects only */
-	struct new_defect {
-		unsigned lba;	/* logical block address */
-	} new_defect[2];
-} reassign_parms;
-
-struct scsi_modesel_hdr {
-	u_char	rsvd1;
-	u_char	media_type;
-	u_char 	rsvd2;
-	u_char	block_desc_len;
-	u_int	density		: 8;
-	u_int	number_blocks	:24;
-	u_int	rsvd3		: 8;
-	u_int	block_length	:24;
-}; 
-
-struct scsi_modesense_hdr {
-	u_char	len;
-	u_char	media_type;
-	u_char 	wp    : 1;
-	u_char 	rsvd1 : 7;
-	u_char	block_desc_len;
-	u_int	density		: 8;
-	u_int	number_blocks	:24;
-	u_int	rsvd2		: 8;
-	u_int	block_length	:24;
-}; 
-
-/*
- * Mode Select / Mode sense "pages"
- */
-
-/*
- * Page One - Error Recovery Parameters 
- */
-struct scsi_err_recovery {
-	u_char	page_savable	: 1;	/* save parameters */
-	u_char	reserved	: 1;
-	u_char	page_code	: 6;	/* = 0x01 */
-	u_char	page_length;		/* = 6 */
-	u_char	awre		: 1;	/* auto write realloc enabled */
-	u_char	arre		: 1;	/* auto read realloc enabled */
-	u_char	tb		: 1;	/* transfer block */
-	u_char 	rc		: 1;	/* read continuous */
-	u_char	eec		: 1;	/* enable early correction */
-	u_char	per		: 1;	/* post error */
-	u_char	dte		: 1;	/* disable transfer on error */
-	u_char	dcr		: 1;	/* disable correction */
-	u_char	retry_count;
-	u_char	correction_span;
-	u_char	head_offset_count;
-	u_char	strobe_offset_count;
-	u_char	recovery_time_limit;
-};
-
-/*
- * Page Two - Disconnect / Reconnect Control Parameters
- */
-struct scsi_disco_reco {
-	u_char	page_savable	: 1;	/* save parameters */
-	u_char	rsvd		: 1;
-	u_char	page_code	: 6;	/* = 0x02 */
-	u_char	page_length;		/* = 10 */
-	u_char	buffer_full_ratio;	/* write, how full before reconnect? */
-	u_char	buffer_empty_ratio;	/* read, how full before reconnect? */
-
-	u_short	bus_inactivity_limit;	/* how much bus time for busy */
-	u_short	disconnect_time_limit;	/* min to remain disconnected */
-	u_short	connect_time_limit;	/* min to remain connected */
-	u_short	reserved_1;
-};
-
-/*
- * Page Three - Direct Access Device Format Parameters
- */
-struct scsi_format {
-	u_char	page_savable	: 1;	/* save parameters */
-	u_char	rsvd		: 1;
-	u_char	page_code	: 6;	/* = 0x03 */
-	u_char	page_length;		/* = 22 */
-	u_short	tracks_per_zone;	/*  Handling of Defects Fields */
-	u_short	alt_sect_zone;
-	u_short alt_tracks_zone;
-	u_short	alt_tracks_vol;
-	u_short	sect_track;		/* Track Format Field */
-	u_short data_sect;		/* Sector Format Fields */
-	u_short	interleave;
-	u_short	track_skew_factor;
-	u_short	cyl_skew_factor;
-	u_char	ssec		: 1;	/* Drive Type Field */
-	u_char	hsec		: 1;
-	u_char	rmb		: 1;
-	u_char	surf		: 1;
-	u_char	ins		: 1;
-	u_char	reserved_1	: 3;
-	u_char	reserved_2;
-	u_char	reserved_3;
-	u_char	reserved_4;
-};
-
-/*
- * Page Four - Rigid Disk Drive Geometry Parameters 
- */
-struct scsi_geometry {
-	u_char	page_savable	: 1;	/* save parameters */
-	u_char	rsvd		: 1;
-	u_char	page_code	: 6;	/* = 0x04 */
-	u_char	page_length;		/* = 18 */
-	u_char	cyl_ub;			/* number of cylinders */
-	u_char	cyl_mb;
-	u_char	cyl_lb;
-	u_char	heads;			/* number of heads */
-	u_char	precomp_cyl_ub;		/* cylinder to start precomp */
-	u_char	precomp_cyl_mb;
-	u_char	precomp_cyl_lb;
-	u_char	current_cyl_ub;		/* cyl to start reduced current */
-	u_char	current_cyl_mb;
-	u_char	current_cyl_lb;
-	u_short	step_rate;		/* drive step rate */
-	u_char	landing_cyl_ub;		/* landing zone cylinder */
-	u_char	landing_cyl_mb;
-	u_char	landing_cyl_lb;
-	u_char	reserved_1;
-	u_char	reserved_2;
-	u_char	reserved_3;
-};
-
-/*
- * Page 0x38 - Cache Control Parameters
- */
-struct scsi_cache {
-	u_char	page_savable	: 1;	/* save parameters */
-	u_char	rsvd		: 1;
-	u_char	page_code	: 6;	/* = 0x38 */
-	u_char	page_length;		/* = 14 */
-	u_char rsvd_1	: 1;
-	u_char wie	: 1; 		/* write index enable */
-	u_char rsvd_2	: 1;
-	u_char ce	: 1; 		/* cache enable */
-	u_char table_size : 4;
-	u_char	prefetch_threshold;
-	u_char	maximum_threshold;
-	u_char	maximumprefetch_multiplier;
-	u_char	minimum_threshold;
-	u_char	minimum_prefetch_multiplier;
-	u_char	reserved[8];
-};
-
-/*
- * Driver ioctl's for various scsi operations.
- */
-#ifndef _IOCTL_
-#include <sys/ioctl.h>
-#endif
-
-/*
- * Control for SCSI "format" mode.
- *
- * "Format" mode allows a privileged process to issue direct SCSI
- * commands to a drive (it is intended primarily to allow on-line
- * formatting).  SDIOCSFORMAT with a non-zero arg will put the drive
- * into format mode; a zero arg will take it out.  When in format
- * mode, only the process that issued the SDIOCFORMAT can read or
- * write the drive.
- *
- * In format mode, process is expected to
- *	- do SDIOCSCSICOMMAND to supply cdb for next SCSI op
- *	- do read or write as appropriate for cdb
- *	- if i/o error, optionally do SDIOCSENSE to get completion
- *	  status and sense data from last scsi operation.
- */
-
-struct scsi_fmt_cdb {
-	int len;		/* cdb length (in bytes) */
-	u_char cdb[28];		/* cdb to use on next read/write */
-};
-
-struct scsi_fmt_sense {
-	u_int status;		/* completion status of last op */
-	u_char sense[28];	/* sense data (if any) from last op */
-};
-
-#define	SDIOCSFORMAT		_IOW('S', 0x1, int)
-#define	SDIOCGFORMAT		_IOR('S', 0x2, int)
-#define	SDIOCSCSICOMMAND	_IOW('S', 0x3, struct scsi_fmt_cdb)
-#define	SDIOCSENSE		_IOR('S', 0x4, struct scsi_fmt_sense)
diff --git a/sys/arch/amiga/dev/siop.c b/sys/arch/amiga/dev/siop.c
index fa6348db5e8..127d1fc25d1 100644
--- a/sys/arch/amiga/dev/siop.c
+++ b/sys/arch/amiga/dev/siop.c
@@ -1,5 +1,5 @@
-/*	$OpenBSD: siop.c,v 1.7 1996/05/02 06:44:34 niklas Exp $	*/
-/*	$NetBSD: siop.c,v 1.32 1996/04/28 06:28:24 mhitch Exp $	*/
+/*	$OpenBSD: siop.c,v 1.8 1996/05/29 10:15:43 niklas Exp $	*/
+/*	$NetBSD: siop.c,v 1.33 1996/05/12 02:26:26 mhitch Exp $	*/
 
 /*
  * Copyright (c) 1994 Michael L. Hitch
@@ -377,13 +377,6 @@ siop_scsidone(acb, stat)
 	slp = xs->sc_link;
 	sc = slp->adapter_softc;
 	/*
-	 * XXX Support old-style instrumentation for now.
-	 * IS THIS REALLY THE RIGHT PLACE FOR THIS?  --thorpej
-	 */
-	if (slp->device_softc &&
-	    ((struct device *)(slp->device_softc))->dv_unit < dk_ndrive)
-		++dk_xfer[((struct device *)(slp->device_softc))->dv_unit];
-	/*
 	 * is this right?
 	 */
 	xs->status = stat;
diff --git a/sys/arch/amiga/dev/zbus.c b/sys/arch/amiga/dev/zbus.c
index 44defa3449b..f068f0cad08 100644
--- a/sys/arch/amiga/dev/zbus.c
+++ b/sys/arch/amiga/dev/zbus.c
@@ -1,5 +1,5 @@
-/*	$OpenBSD: zbus.c,v 1.5 1996/05/07 10:10:19 niklas Exp $	*/
-/*	$NetBSD: zbus.c,v 1.17 1996/03/28 18:41:49 is Exp $	*/
+/*	$OpenBSD: zbus.c,v 1.6 1996/05/29 10:15:45 niklas Exp $	*/
+/*	$NetBSD: zbus.c,v 1.19 1996/05/19 21:06:09 veego Exp $	*/
 
 /*
  * Copyright (c) 1994 Christian E. Hopps
@@ -115,6 +115,8 @@ static struct aconfdata aconftab[] = {
 	{ "grfcl",	2193,	1},	/* Spectrum regs */
 	{ "grfcl",	2195,	5},	/* Piccolo mem */
 	{ "grfcl",	2195,	6},	/* Piccolo regs */
+	{ "grfcl",	2195,	10},	/* Piccolo SD64 mem */
+	{ "grfcl",	2195,	11},	/* Piccolo SD64 regs */
 	/* MacroSystemsUS */
 	{ "wesc",	2203,	19},	/* Warp engine */
 	/* phase 5 digital products */
@@ -128,7 +130,13 @@ static struct aconfdata aconftab[] = {
 	/* Resource Management Force */
 	{ "qn",		2011,	2 },	/* QuickNet Ethernet */
 	/* ??? */
-	{ "empsc",	2171,	21 }	/* Emplant SCSI */
+	{ "empsc",	2171,	21 },	/* Emplant SCSI */
+	/* Tseng ET4000 boards */
+	{ "grfet",	2181,	0 },	/* oMniBus */
+	{ "grfet",	2167,	1 },	/* Domnio mem */
+	{ "grfet",	2167,	2 },	/* Domino regs */
+	{ "grfet",	2117,	3 },	/* Merlin mem */
+	{ "grfet",	2117,	4 }	/* Merlin regs */
 };
 static int naconfent = sizeof(aconftab) / sizeof(struct aconfdata);
 
@@ -142,13 +150,21 @@ static struct preconfdata preconftab[] = {
 	{18260, 16, 0}, /* Retina BLT Z3 */
 	{18260, 19, 0}, /* Altais */
 	{2167,	11, 0},	/* Picasso-II mem*/
-	{2167,	12, 0},	/* regs */
+	{2167,	12, 0},	/* Picasso-II regs */
 	{2193,	2, 0},	/* Spectrum mem */
 	{2193,	1, 0},	/* Spectrum regs */
 	{2195,	5, 0},	/* Piccolo mem */
 	{2195,	6, 0},	/* Piccolo regs */
+	{2195,	10, 0},	/* Piccolo SD64 mem */
+	{2195,	11, 0},	/* Piccolo SD64 regs */
 	{1030,	0, 0},	/* Ulwl board */
-	{8512,	34, 0}	/* Cybervison 64 */
+	{8512,	34, 0},	/* Cybervison 64 */
+	{8512,  34, 0}, /* Cybervison 64 */
+	{2181,	0, 0},	/* oMniBus mem or regs */
+	{2167,	1, 0},	/* Domino mem */
+	{2167,	2, 0},	/* Domino regs */
+	{2117,	3, 0},	/* Merlin mem */
+	{2117,	4, 0}	/* Merlin regs */
 };
 static int npreconfent = sizeof(preconftab) / sizeof(struct preconfdata);
 
@@ -251,9 +267,9 @@ zbusattach(pdp, dp, auxp)
 		if (amiga_realconfig && pcp < epcp && pcp->vaddr)
 			za.va = pcp->vaddr;
 		else {
-			za.va = (void *) (isztwopa(za.pa) ? ztwomap(za.pa) :
-			    zbusmap(za.pa, za.size));
-/*                          ??????? */
+			za.va = (void *) (isztwopa(za.pa) ? ztwomap(za.pa) 
+			    : zbusmap(za.pa, za.size));
+/*                     		??????? */
 			/*
 			 * save value if early console init 
 			 */