summaryrefslogtreecommitdiff
path: root/sys/arch/amiga/include
diff options
context:
space:
mode:
authorMiod Vallat <miod@cvs.openbsd.org>2001-12-20 19:02:30 +0000
committerMiod Vallat <miod@cvs.openbsd.org>2001-12-20 19:02:30 +0000
commit664a880e367bbf984dbe49922fdace0ca00a5d91 (patch)
tree90d4583eb879ff0136c57ac9586aa724fb4f3add /sys/arch/amiga/include
parent6743d0464c802e3119c4632471d95b000cfa0d89 (diff)
Temporarily revert the pmap_motorola changes, as they may account for
some problems as well. Requested by deraadt@
Diffstat (limited to 'sys/arch/amiga/include')
-rw-r--r--sys/arch/amiga/include/cpu.h4
-rw-r--r--sys/arch/amiga/include/param.h11
-rw-r--r--sys/arch/amiga/include/pmap.h141
-rw-r--r--sys/arch/amiga/include/pte.h84
4 files changed, 222 insertions, 18 deletions
diff --git a/sys/arch/amiga/include/cpu.h b/sys/arch/amiga/include/cpu.h
index 1e711202f62..518399a7f95 100644
--- a/sys/arch/amiga/include/cpu.h
+++ b/sys/arch/amiga/include/cpu.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: cpu.h,v 1.16 2001/12/07 00:59:16 miod Exp $ */
+/* $OpenBSD: cpu.h,v 1.17 2001/12/20 19:02:26 miod Exp $ */
/* $NetBSD: cpu.h,v 1.36 1996/09/11 00:11:42 thorpej Exp $ */
/*
@@ -184,10 +184,12 @@ struct fpframe;
struct user;
struct pcb;
+void clearseg __P((vm_offset_t));
void doboot __P((void)) __attribute__((__noreturn__));
void loadustp __P((int));
void m68881_save __P((struct fpframe *));
void m68881_restore __P((struct fpframe *));
+void physcopyseg __P((vm_offset_t, vm_offset_t));
u_int probeva __P((u_int, u_int));
void proc_trampoline __P((void));
void savectx __P((struct pcb *));
diff --git a/sys/arch/amiga/include/param.h b/sys/arch/amiga/include/param.h
index c7bb979d23a..656303d5957 100644
--- a/sys/arch/amiga/include/param.h
+++ b/sys/arch/amiga/include/param.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: param.h,v 1.18 2001/12/05 01:57:14 provos Exp $ */
+/* $OpenBSD: param.h,v 1.19 2001/12/20 19:02:26 miod Exp $ */
/* $NetBSD: param.h,v 1.35 1997/07/10 08:22:36 veego Exp $ */
/*
@@ -60,6 +60,15 @@
#define KERNBASE 0x00000000 /* start of kernel virtual */
+#define SEGSHIFT 24 /* LOG2(NBSEG) [68030 value] */
+/* bytes/segment */
+/* (256 * (1 << PGSHIFT)) == (1 << SEGSHIFT) */
+#define NBSEG ((mmutype == MMU_68040) \
+ ? (32 * (1 << PGSHIFT)) : (256 * (1 << PGSHIFT)))
+#define SEGOFSET (NBSEG-1) /* byte offset into segment */
+
+#define UPAGES 2 /* pages of u-area */
+
#include <m68k/param.h>
#define NPTEPG (NBPG/(sizeof (pt_entry_t)))
diff --git a/sys/arch/amiga/include/pmap.h b/sys/arch/amiga/include/pmap.h
index 7e40c742b75..a4fa87f48f6 100644
--- a/sys/arch/amiga/include/pmap.h
+++ b/sys/arch/amiga/include/pmap.h
@@ -1,13 +1,142 @@
-/* $OpenBSD: pmap.h,v 1.10 2001/11/30 23:20:09 miod Exp $ */
+/* $OpenBSD: pmap.h,v 1.11 2001/12/20 19:02:26 miod Exp $ */
+/* $NetBSD: pmap.h,v 1.17 1997/06/10 18:34:52 veego Exp $ */
+/*
+ * Copyright (c) 1987 Carnegie-Mellon University
+ * Copyright (c) 1991 Regents of the University of California.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * the Systems Programming Group of the University of Utah Computer
+ * Science Department.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @(#)pmap.h 7.6 (Berkeley) 5/10/91
+ */
#ifndef _MACHINE_PMAP_H_
#define _MACHINE_PMAP_H_
-#include <m68k/pmap_motorola.h>
+/*
+ * Pmap stuff
+ */
+struct pmap {
+ pt_entry_t *pm_ptab; /* KVA of page table */
+ st_entry_t *pm_stab; /* KVA of segment table */
+ int pm_stfree; /* 040: free lev2 blocks */
+ u_int *pm_stpa; /* 040: ST phys addr */
+ short pm_sref; /* segment table ref count */
+ short pm_count; /* pmap reference count */
+ long pm_ptpages; /* more stats: PT pages */
+ struct simplelock pm_lock; /* lock on pmap */
+ struct pmap_statistics pm_stats; /* pmap statistics */
+};
+
+typedef struct pmap *pmap_t;
+
+/*
+ * On the 040 we keep track of which level 2 blocks are already in use
+ * with the pm_stfree mask. Bits are arranged from LSB (block 0) to MSB
+ * (block 31). For convenience, the level 1 table is considered to be
+ * block 0.
+ *
+ * MAX[KU]L2SIZE control how many pages of level 2 descriptors are allowed.
+ * for the kernel and users. 16 implies only the initial "segment table"
+ * page is used. WARNING: don't change MAXUL2SIZE unless you can allocate
+ * physically contiguous pages for the ST in pmap.c!
+ */
+#define MAXKL2SIZE 32
+#define MAXUL2SIZE 16
+#define l2tobm(n) (1 << (n))
+#define bmtol2(n) (ffs(n) - 1)
+
+/*
+ * Macros for speed
+ */
+#define PMAP_ACTIVATE(pmap, loadhw) \
+{ \
+ if ((loadhw)) \
+ loadustp(m68k_btop((pmap)->pm_stpa)); \
+}
+
+/*
+ * For each vm_page_t, there is a list of all currently valid virtual
+ * mappings of that page. An entry is a pv_entry_t, the list is pv_table.
+ */
+typedef struct pv_entry {
+ struct pv_entry *pv_next; /* next pv_entry */
+ struct pmap *pv_pmap; /* pmap where mapping lies */
+ vm_offset_t pv_va; /* virtual address for mapping */
+ u_int *pv_ptste; /* non-zero if VA maps a PT page */
+ struct pmap *pv_ptpmap; /* if pv_ptste, pmap for PT page */
+ int pv_flags; /* flags */
+} *pv_entry_t;
+
+#define PV_CI 0x01 /* all entries must be cache inhibited */
+#define PV_PTPAGE 0x02 /* entry maps a page table page */
+
+struct pv_page;
+
+struct pv_page_info {
+ TAILQ_ENTRY(pv_page) pgi_list;
+ struct pv_entry *pgi_freelist;
+ int pgi_nfree;
+};
+
+/*
+ * This is basically:
+ * ((NBPG - sizeof(struct pv_page_info)) / sizeof(struct pv_entry))
+ */
+#define NPVPPG 340
+
+struct pv_page {
+ struct pv_page_info pvp_pgi;
+ struct pv_entry pvp_pv[NPVPPG];
+};
#ifdef _KERNEL
-void pmap_init_md __P((void));
-#define PMAP_INIT_MD() pmap_init_md()
-#endif
+pv_entry_t pv_table; /* array of entries, one per page */
+u_int *Sysmap;
+char *vmmap; /* map for mem, dumps, etc. */
+struct pmap kernel_pmap_store;
+
+#define pmap_kernel() (&kernel_pmap_store)
+#define active_pmap(pm) \
+ ((pm) == pmap_kernel() || (pm) == curproc->p_vmspace->vm_map.pmap)
+#define active_user_pmap(pm) \
+ (curproc && \
+ (pm) != pmap_kernel() && (pm) == curproc->p_vmspace->vm_map.pmap)
+
+#define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count)
+#define pmap_wired_count(pmap) ((pmap)->pm_stats.wired_count)
+#define pmap_update(pmap) /* nothing */
+
+#endif /* _KERNEL */
-#endif /* _MACHINE_PMAP_H_ */
+#endif /* !_MACHINE_PMAP_H_ */
diff --git a/sys/arch/amiga/include/pte.h b/sys/arch/amiga/include/pte.h
index 9a6d5d146a8..a5acfc91685 100644
--- a/sys/arch/amiga/include/pte.h
+++ b/sys/arch/amiga/include/pte.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: pte.h,v 1.4 2001/12/06 22:33:18 miod Exp $ */
+/* $OpenBSD: pte.h,v 1.5 2001/12/20 19:02:26 miod Exp $ */
/* $NetBSD: pte.h,v 1.14 1995/09/29 13:52:09 chopps Exp $ */
/*
@@ -45,12 +45,72 @@
#ifndef _MACHINE_PTE_H_
#define _MACHINE_PTE_H_
-#include <m68k/pte_motorola.h>
+/*
+ * AMIGA hardware segment/page table entries
+ */
+
+struct pte {
+ u_int pte;
+};
+typedef u_int pt_entry_t; /* Mach page table entry */
+
+struct ste {
+ u_int ste;
+};
+typedef u_int st_entry_t; /* segment table entry */
+
+#define PT_ENTRY_NULL ((pt_entry_t *) 0)
+#define ST_ENTRY_NULL ((st_entry_t *) 0)
+
+#define SG_V 0x00000002 /* segment is valid */
+#define SG_NV 0x00000000
+#define SG_PROT 0x00000004 /* access protection mask */
+#define SG_RO 0x00000004
+#define SG_RW 0x00000000
+#define SG_U 0x00000008 /* modified bit (68040) */
+#define SG_FRAME 0xffffe000
+#define SG_IMASK 0xff000000
+#define SG_ISHIFT 24
+#define SG_PMASK 0x00ffe000
+#define SG_PSHIFT 13
+
+/* 68040 additions */
+#define SG4_MASK1 0xfe000000 /* pointer table 1 index mask */
+#define SG4_SHIFT1 25
+#define SG4_MASK2 0x01fc0000 /* pointer table 2 index mask */
+#define SG4_SHIFT2 18
+#define SG4_MASK3 0x0003e000 /* page table index mask */
+#define SG4_SHIFT3 13
+#define SG4_ADDR1 0xfffffe00 /* pointer table address mask */
+#define SG4_ADDR2 0xffffff80 /* page table address mask */
+#define SG4_LEV1SIZE 128 /* entries in pointer table 1 */
+#define SG4_LEV2SIZE 128 /* entries in pointer table 2 */
+#define SG4_LEV3SIZE 32 /* entries in page table */
+
+#define PG_V 0x00000001
+#define PG_NV 0x00000000
+#define PG_PROT 0x00000004
+#define PG_U 0x00000008
+#define PG_M 0x00000010
+#define PG_W 0x00000100
+#define PG_RO 0x00000004
+#define PG_RW 0x00000000
+#define PG_FRAME 0xffffe000
+#define PG_CI 0x00000040
+#define PG_SHIFT 13
+#define PG_PFNUM(x) (((x) & PG_FRAME) >> PG_SHIFT)
+
+/* 68040 additions */
+#define PG_CMASK 0x00000060 /* cache mode mask */
+#define PG_CWT 0x00000000 /* writethrough caching */
+#define PG_CCB 0x00000020 /* copyback caching */
+#define PG_CIS 0x00000040 /* cache inhibited serialized */
+#define PG_CIN 0x00000060 /* cache inhibited nonserialized */
+#define PG_SO 0x00000080 /* supervisor only */
#define AMIGA_040RTSIZE 512 /* root (level 1) table size */
#define AMIGA_040STSIZE 512 /* segment (level 2) table size */
#define AMIGA_040PTSIZE 128 /* page (level 3) table size */
-
#if 0
#define AMIGA_STSIZE 1024 /* segment table size */
#else
@@ -65,10 +125,9 @@
* AMIGA_MAX_KPTSIZE the most number of bytes for kpt pages
* AMIGA_MAX_PTSIZE the number of bytes to map everything
*/
-extern vaddr_t amiga_uptbase;
#define AMIGA_MAX_COREUPT 1024
#define AMIGA_UPTSIZE roundup(VM_MAXUSER_ADDRESS / NPTEPG, NBPG)
-#define AMIGA_UPTBASE amiga_uptbase
+#define AMIGA_UPTBASE 0x10000000
#define AMIGA_UPTMAXSIZE \
roundup((AMIGA_MAX_COREUPT * AMIGA_UPTSIZE), NBPG)
#define AMIGA_MAX_KPTSIZE \
@@ -77,10 +136,15 @@ extern vaddr_t amiga_uptbase;
roundup((VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS) / NPTEPG, NBPG)
#define AMIGA_MAX_PTSIZE roundup(0xffffffff / NPTEPG, NBPG)
-#define MACHINE_STSIZE AMIGA_STSIZE
-#define MACHINE_MAX_PTSIZE AMIGA_MAX_PTSIZE
-#define MACHINE_MAX_KPTSIZE AMIGA_MAX_KPTSIZE
-#define MACHINE_PTBASE AMIGA_UPTBASE
-#define MACHINE_PTMAXSIZE AMIGA_UPTMAXSIZE
+/*
+ * Kernel virtual address to page table entry and to physical address.
+ */
+#define kvtopte(va) \
+ (&Sysmap[((unsigned)(va) - VM_MIN_KERNEL_ADDRESS) >> PGSHIFT])
+#define ptetokv(pt) \
+ ((((u_int *)(pt) - Sysmap) << PGSHIFT) + VM_MIN_KERNEL_ADDRESS)
+#define kvtophys(va) \
+ ((kvtopte(va)->pg_pfnum << PGSHIFT) | ((int)(va) & PGOFSET))
+
#endif /* !_MACHINE_PTE_H_ */