diff options
| author | Per Fogelstrom <pefo@cvs.openbsd.org> | 1998-03-16 09:38:53 +0000 |
|---|---|---|
| committer | Per Fogelstrom <pefo@cvs.openbsd.org> | 1998-03-16 09:38:53 +0000 |
| commit | a963ca51673d0d081904efce31dd28f05d83e730 (patch) | |
| tree | f51de935de8777cae9204bbaa29b11aa7007425d /sys/arch/arc/algor/algor.h | |
| parent | c1aa08ed9b8f4b392adef8685e4f55ff3b189dbb (diff) | |
DDB.
Support for Algorithmics R5000/R10000 evaluation board. So far only the
RM5260 is supported. RM5270 - RM7000 later. R5000 and R10000 depending
on access to cpu modules.
vm_machdep.c moved to arch/mips/mips.
Diffstat (limited to 'sys/arch/arc/algor/algor.h')
| -rw-r--r-- | sys/arch/arc/algor/algor.h | 42 |
1 files changed, 39 insertions, 3 deletions
diff --git a/sys/arch/arc/algor/algor.h b/sys/arch/arc/algor/algor.h index c5fc4604120..31e6f896824 100644 --- a/sys/arch/arc/algor/algor.h +++ b/sys/arch/arc/algor/algor.h @@ -1,4 +1,4 @@ -/* $OpenBSD: algor.h,v 1.3 1997/04/19 17:19:36 pefo Exp $ */ +/* $OpenBSD: algor.h,v 1.4 1998/03/16 09:38:23 pefo Exp $ */ /* * Copyright (c) 1996 Per Fogelstrom @@ -36,12 +36,15 @@ #define _ALGOR_H_ 1 /* - * P-4032's Physical address space + * Physical address space */ #define P4032_PHYS_MIN 0x00000000 /* 256 Meg */ #define P4032_PHYS_MAX 0x0fffffff +#define P5064_PHYS_MIN 0x00000000 /* 256 Meg */ +#define P5064_PHYS_MAX 0x0fffffff + /* * Memory map */ @@ -49,8 +52,11 @@ #define P4032_PHYS_MEMORY_START 0x00000000 #define P4032_PHYS_MEMORY_END 0x0fffffff /* 256 Meg in 2 slots */ +#define P5064_PHYS_MEMORY_START 0x00000000 +#define P5064_PHYS_MEMORY_END 0x0fffffff /* 256 Meg in 2 slots */ + /* - * I/O map + * I/O map P-4032 */ #define P4032_V96x 0xbef00000 /* PCI Bus bridge ctrlregs */ @@ -76,6 +82,36 @@ #define P4032_IXR2 0xbff90014 /* Int crossbar register 0 */ /* + * I/O map P-5064 + */ + +#define P5064_V96x P4032_V96x /* PCI Bus bridge ctrlregs */ + +#define P5064_CLOCK 0xbd000070 /* RTC clock ptr reg, data +1 */ +#define P5064_KEYB 0xbd000064 /* PC Keyboard controller */ +#define P5064_LED P4032_LED /* 4 Char LED display */ +#define P5064_LCD P4032_LCD /* LCD option display */ +#define P5064_GPIO P4032_GPIO /* General purpose I/O */ +#define P5064_GPIO_IACK P4032_GPIO_IACK /* General purpose I/O Iack */ +#define P5064_FPY 0xbd0003f0 /* Floppy controller */ +#define P5064_COM1 0xbd0003f8 /* Serial port com1 */ +#define P5064_COM2 0xbd0002f8 /* Serial port com2 */ +#define P5064_CENTR 0xbd000378 /* Centronics paralell port */ +#define P5064_IMR 0xbff90000 /* Int mask reg (wr) */ +#define P5064_IRR 0xbff90000 /* Int request reg (rd) */ +#define P5064_EIRR 0xbff90004 /* Error int request reg (rd) */ +#define P5064_ICR 0xbff90004 /* Int clear register (wr) */ +#define P5064_PCIIMR 0xbff90008 /* PCI Int mask reg (wr) */ +#define P5064_PCIIRR 0xbff90008 /* PCI Int req reg (rd) */ +#define P5064_IDEIMR 0xbff9000c /* IDE Int req reg (rd) */ +#define P5064_IDEIRR 0xbff9000c /* IDE Int req reg (rd) */ +#define P5064_IXR0 0xbff90010 /* Int crossbar register 0 */ +#define P5064_IXR1 0xbff90014 /* Int crossbar register 1 */ +#define P5064_IXR2 0xbff90018 /* Int crossbar register 2 */ +#define P5064_IXR3 0xbff9001c /* Int crossbar register 3 */ +#define P5064_IXR4 0xbff90020 /* Int crossbar register 4 */ + +/* * Interrupt controller interrupt masks */ |