Cleanup, endian and abi stuff fixies. Some stuff added for MIPS Magnum.

(PICA and Magnum uses very similar core chipsets).

3 files changed, 71 insertions, 77 deletions

diff --git a/sys/arch/arc/dev/dma.c b/sys/arch/arc/dev/dma.c
index 20d068480e5..433655983de 100644
--- a/sys/arch/arc/dev/dma.c
+++ b/sys/arch/arc/dev/dma.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: dma.c,v 1.1 1996/06/24 09:07:19 pefo Exp $	*/
+/*	$OpenBSD: dma.c,v 1.2 1996/07/30 20:24:20 pefo Exp $	*/
 /*
  * Copyright (c) 1992, 1993
  *	The Regents of the University of California.  All rights reserved.
@@ -32,7 +32,7 @@
  * SUCH DAMAGE.
  *
  *	from: @(#)rz.c	8.1 (Berkeley) 7/29/93
- *      $Id: dma.c,v 1.1 1996/06/24 09:07:19 pefo Exp $
+ *      $Id: dma.c,v 1.2 1996/07/30 20:24:20 pefo Exp $
  */
 
 /*
@@ -66,7 +66,7 @@
 
 extern vm_map_t phys_map;
 
-#define dma_pte_to_pa(x)	(((x) - first_dma_pte) * PICA_DMA_PAGE_SIZE)
+#define dma_pte_to_pa(x)	(((x) - first_dma_pte) * R4030_DMA_PAGE_SIZE)
 
 dma_pte_t *free_dma_pte;	/* Pointer to free dma pte list */
 dma_pte_t *first_dma_pte;	/* Pointer to first dma pte */
@@ -87,9 +87,9 @@ picaDmaInit()
 	free_dma_pte->queue.next = NULL;
 	free_dma_pte->queue.size = PICA_TL_SIZE / sizeof(dma_pte_t);
 
-	out32(PICA_SYS_TL_BASE, UNCACHED_TO_PHYS(map));
-	out32(PICA_SYS_TL_LIMIT, PICA_TL_SIZE);
-	out32(PICA_SYS_TL_IVALID, 0);
+	out32(R4030_SYS_TL_BASE, UNCACHED_TO_PHYS(map));
+	out32(R4030_SYS_TL_LIMIT, PICA_TL_SIZE);
+	out32(R4030_SYS_TL_IVALID, 0);
 }
 
 /*
@@ -190,7 +190,7 @@ picaDmaTLBMap(dma_softc_t *sc)
 	int nbytes;
 
 	va = sc->next_va - sc->dma_va;
-	dma_pte = sc->pte_base + (va / PICA_DMA_PAGE_SIZE);
+	dma_pte = sc->pte_base + (va / R4030_DMA_PAGE_SIZE);
 	nbytes = dma_page_round(sc->next_size + dma_page_offs(va));
 	va = sc->req_va;
 	while(nbytes > 0) {
@@ -200,14 +200,14 @@ picaDmaTLBMap(dma_softc_t *sc)
 		else {
 			pa = pmap_extract(vm_map_pmap(phys_map), va);
 		}
-		pa &= PICA_DMA_PAGE_NUM;
+		pa &= R4030_DMA_PAGE_NUM;
 		if(pa == 0)
 			panic("picaDmaTLBMap: null page frame");
 		dma_pte->entry.lo_addr = pa;
 		dma_pte->entry.hi_addr = 0;
 		dma_pte++;
-		va += PICA_DMA_PAGE_SIZE;
-		nbytes -= PICA_DMA_PAGE_SIZE;
+		va += R4030_DMA_PAGE_SIZE;
+		nbytes -= R4030_DMA_PAGE_SIZE;
 	}
 }
 
@@ -236,21 +236,21 @@ picaDmaStart(sc, addr, size, datain)
 
 	/* Map up the request viritual dma space */
 	picaDmaTLBMap(sc);
-	out32(PICA_SYS_TL_IVALID, 0);	/* Flush dma map cache */
+	out32(R4030_SYS_TL_IVALID, 0);	/* Flush dma map cache */
 
 	/* Load new transfer parameters */
 	regs->dma_addr = sc->next_va;
 	regs->dma_count = sc->next_size;
-	regs->dma_mode = sc->mode & PICA_DMA_MODE;
+	regs->dma_mode = sc->mode & R4030_DMA_MODE;
 
 	sc->sc_active = 1;
 	if(datain == DMA_FROM_DEV) {
 		sc->mode &= ~DMA_DIR_WRITE;
-		regs->dma_enab = PICA_DMA_ENAB_RUN | PICA_DMA_ENAB_READ;
+		regs->dma_enab = R4030_DMA_ENAB_RUN | R4030_DMA_ENAB_READ;
 	}
 	else {
 		sc->mode |= DMA_DIR_WRITE;
-		regs->dma_enab = PICA_DMA_ENAB_RUN | PICA_DMA_ENAB_WRITE;
+		regs->dma_enab = R4030_DMA_ENAB_RUN | R4030_DMA_ENAB_WRITE;
 	}
 	wbflush();
 }
@@ -286,7 +286,7 @@ picaDmaFlush(sc, addr, size, datain)
 	size_t  size;
 	int     datain;
 {
-	out32(PICA_SYS_TL_IVALID, 0);	/* Flush dma map cache */
+	out32(R4030_SYS_TL_IVALID, 0);	/* Flush dma map cache */
 }
 
 /*
@@ -348,9 +348,9 @@ asc_dma_init(dma_softc_t *sc)
 	sc->intr = (int(*)())picaDmaNull;
 	sc->end = picaDmaEnd;
 
-	sc->dma_reg = (pDmaReg)PICA_SYS_DMA0_REGS;
+	sc->dma_reg = (pDmaReg)R4030_SYS_DMA0_REGS;
 	sc->pte_size = 32;
-	sc->mode = PICA_DMA_MODE_160NS | PICA_DMA_MODE_16;
+	sc->mode = R4030_DMA_MODE_160NS | R4030_DMA_MODE_16;
 	picaDmaTLBAlloc(sc);
 }
 /*
@@ -368,9 +368,9 @@ fdc_dma_init(dma_softc_t *sc)
 	sc->intr = (int(*)())picaDmaNull;
 	sc->end = picaDmaEnd;
 
-	sc->dma_reg = (pDmaReg)PICA_SYS_DMA1_REGS;
+	sc->dma_reg = (pDmaReg)R4030_SYS_DMA1_REGS;
 	sc->pte_size = 32;
-	sc->mode = PICA_DMA_MODE_160NS | PICA_DMA_MODE_8;
+	sc->mode = R4030_DMA_MODE_160NS | R4030_DMA_MODE_8;
 	picaDmaTLBAlloc(sc);
 }
 /*
diff --git a/sys/arch/arc/dev/dma.h b/sys/arch/arc/dev/dma.h
index 949154ca697..3e6f4446ca2 100644
--- a/sys/arch/arc/dev/dma.h
+++ b/sys/arch/arc/dev/dma.h
@@ -1,7 +1,7 @@
-/*	$OpenBSD: dma.h,v 1.1 1996/06/24 09:07:19 pefo Exp $	*/
-/*-
- * Copyright (c) 1992, 1993
- *	The Regents of the University of California.  All rights reserved.
+/*	$OpenBSD: dma.h,v 1.2 1996/07/30 20:24:21 pefo Exp $	*/
+/*
+ * Copyright (c) 1996 Per Fogelstrom
+ * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -13,30 +13,24 @@
  *    documentation and/or other materials provided with the distribution.
  * 3. All advertising materials mentioning features or use of this software
  *    must display the following acknowledgement:
- *	This product includes software developed by the University of
- *	California, Berkeley and its contributors.
- * 4. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
+ *      This product includes software developed by Per Fogelstrom.
+ * 4. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission
  *
- *	from: @(#)dma.h	8.1 (Berkeley) 6/10/93
- *      $Id: dma.h,v 1.1 1996/06/24 09:07:19 pefo Exp $
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
 /*
- *	The PICA system has four dma channels capable of scatter/gather
+ *	The R4030 system has four dma channels capable of scatter/gather
  *	and full memory addressing. The maximum transfer length is 1Mb.
  *	Dma snopes the L2 cache so no precaution is required. However
  *	if L1 cache is cached 'write back' the processor is responible
@@ -62,35 +56,35 @@ typedef volatile struct {
 	int		pad4;
 } DmaReg, *pDmaReg;
 
-#define	PICA_DMA_MODE_40NS	0x00	/* Device dma timing */
-#define	PICA_DMA_MODE_80NS	0x01	/* Device dma timing */
-#define	PICA_DMA_MODE_120NS	0x02	/* Device dma timing */
-#define	PICA_DMA_MODE_160NS	0x03	/* Device dma timing */
-#define	PICA_DMA_MODE_200NS	0x04	/* Device dma timing */
-#define	PICA_DMA_MODE_240NS	0x05	/* Device dma timing */
-#define	PICA_DMA_MODE_280NS	0x06	/* Device dma timing */
-#define	PICA_DMA_MODE_320NS	0x07	/* Device dma timing */
-#define	PICA_DMA_MODE_8		0x08	/* Device 8 bit  */
-#define	PICA_DMA_MODE_16	0x10	/* Device 16 bit */
-#define	PICA_DMA_MODE_32	0x18	/* Device 32 bit */
-#define	PICA_DMA_MODE_INT	0x20	/* Interrupt when done */
-#define	PICA_DMA_MODE_BURST	0x40	/* Burst mode (Rev 2 only) */
-#define PICA_DMA_MODE_FAST	0x80	/* Fast dma cycle (Rev 2 only) */
-#define PICA_DMA_MODE		0xff	/* Mode register bits */
+#define	R4030_DMA_MODE_40NS	0x00	/* Device dma timing */
+#define	R4030_DMA_MODE_80NS	0x01	/* Device dma timing */
+#define	R4030_DMA_MODE_120NS	0x02	/* Device dma timing */
+#define	R4030_DMA_MODE_160NS	0x03	/* Device dma timing */
+#define	R4030_DMA_MODE_200NS	0x04	/* Device dma timing */
+#define	R4030_DMA_MODE_240NS	0x05	/* Device dma timing */
+#define	R4030_DMA_MODE_280NS	0x06	/* Device dma timing */
+#define	R4030_DMA_MODE_320NS	0x07	/* Device dma timing */
+#define	R4030_DMA_MODE_8		0x08	/* Device 8 bit  */
+#define	R4030_DMA_MODE_16	0x10	/* Device 16 bit */
+#define	R4030_DMA_MODE_32	0x18	/* Device 32 bit */
+#define	R4030_DMA_MODE_INT	0x20	/* Interrupt when done */
+#define	R4030_DMA_MODE_BURST	0x40	/* Burst mode (Rev 2 only) */
+#define R4030_DMA_MODE_FAST	0x80	/* Fast dma cycle (Rev 2 only) */
+#define R4030_DMA_MODE		0xff	/* Mode register bits */
 #define DMA_DIR_WRITE		0x100	/* Software direction status */
 #define DMA_DIR_READ		0x000	/* Software direction status */
 
-#define	PICA_DMA_ENAB_RUN	0x01	/* Enable dma */
-#define	PICA_DMA_ENAB_READ	0x00	/* Read from device */
-#define	PICA_DMA_ENAB_WRITE	0x02	/* Write to device */
-#define	PICA_DMA_ENAB_TC_IE	0x100	/* Terminal count int enable */
-#define	PICA_DMA_ENAB_ME_IE	0x200	/* Memory error int enable */
-#define	PICA_DMA_ENAB_TL_IE	0x400	/* Translation limit int enable */
+#define	R4030_DMA_ENAB_RUN	0x01	/* Enable dma */
+#define	R4030_DMA_ENAB_READ	0x00	/* Read from device */
+#define	R4030_DMA_ENAB_WRITE	0x02	/* Write to device */
+#define	R4030_DMA_ENAB_TC_IE	0x100	/* Terminal count int enable */
+#define	R4030_DMA_ENAB_ME_IE	0x200	/* Memory error int enable */
+#define	R4030_DMA_ENAB_TL_IE	0x400	/* Translation limit int enable */
 
-#define	PICA_DMA_COUNT_MASK	0x00fffff /* Byte count mask */
-#define	PICA_DMA_PAGE_NUM	0xffff000 /* Address page number */
-#define	PICA_DMA_PAGE_OFFS	0x0000fff /* Address page offset */
-#define	PICA_DMA_PAGE_SIZE	0x0001000 /* Address page size */
+#define	R4030_DMA_COUNT_MASK	0x00fffff /* Byte count mask */
+#define	R4030_DMA_PAGE_NUM	0xffff000 /* Address page number */
+#define	R4030_DMA_PAGE_OFFS	0x0000fff /* Address page offset */
+#define	R4030_DMA_PAGE_SIZE	0x0001000 /* Address page size */
 
 
 /*
@@ -140,8 +134,8 @@ typedef struct dma_softc {
 #define	DMA_TO_DEV	0
 #define	DMA_FROM_DEV	1
 
-#define	dma_page_offs(x)	((int)(x) & PICA_DMA_PAGE_OFFS)
-#define dma_page_round(x)	(((int)(x) + PICA_DMA_PAGE_OFFS) & PICA_DMA_PAGE_NUM)
+#define	dma_page_offs(x)	((int)(x) & R4030_DMA_PAGE_OFFS)
+#define dma_page_round(x)	(((int)(x) + R4030_DMA_PAGE_OFFS) & R4030_DMA_PAGE_NUM)
 
 #define	DMA_RESET(r)		((r->reset)(r))
 #define	DMA_START(a, b, c, d)	((a->start)(a, b, c, d))
diff --git a/sys/arch/arc/dev/if_sn.c b/sys/arch/arc/dev/if_sn.c
index dfe411a6551..c5148833611 100644
--- a/sys/arch/arc/dev/if_sn.c
+++ b/sys/arch/arc/dev/if_sn.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: if_sn.c,v 1.1 1996/06/24 09:07:19 pefo Exp $	*/
+/*	$OpenBSD: if_sn.c,v 1.2 1996/07/30 20:24:22 pefo Exp $	*/
 /*
  * National Semiconductor  SONIC Driver
  * Copyright (c) 1991   Algorithmics Ltd (http://www.algor.co.uk)
@@ -287,8 +287,8 @@ snattach(parent, self, aux)
 
 	sc->dma = &sc->__dma;
 	sn_dma_init(sc->dma, FRAGMAX * NTDA
-			   + (NRBA * RBASIZE / PICA_DMA_PAGE_SIZE) + 1
-			   + (DESC_SIZE * 2 / PICA_DMA_PAGE_SIZE) + 1);
+			   + (NRBA * RBASIZE / R4030_DMA_PAGE_SIZE) + 1
+			   + (DESC_SIZE * 2 / R4030_DMA_PAGE_SIZE) + 1);
 
 /*
  * because the sonic is basicly 16bit device it 'concatenates'
@@ -296,7 +296,7 @@ snattach(parent, self, aux)
  * around problems near the end of 64k !!
  */
 	p = SONICBUF;
-	pp = SONICBUF - (FRAGMAX * NTDA * PICA_DMA_PAGE_SIZE);
+	pp = SONICBUF - (FRAGMAX * NTDA * R4030_DMA_PAGE_SIZE);
 
 	if ((p ^ (p + TDASIZE)) & 0x10000)
 		p = (p + 0x10000) & ~0xffff;
@@ -320,7 +320,7 @@ snattach(parent, self, aux)
 	v_cda = (struct CDA *)(p - pp + sc->dma->dma_va);
 	p += CDASIZE;
 
-	p += PICA_DMA_PAGE_SIZE - (p & (PICA_DMA_PAGE_SIZE -1));
+	p += R4030_DMA_PAGE_SIZE - (p & (R4030_DMA_PAGE_SIZE -1));
 	p_rba = (char *)p;
 	v_rba = (char *)(p - pp + sc->dma->dma_va);
 	p += NRBA * RBASIZE;
@@ -649,7 +649,7 @@ sonicput(sc, m0)
 	mtdnext->mtd_mbuf = m0;
 	txp = mtdnext->mtd_txp;
 	SWR(txp->config, 0);
-	fragoffset = (txp - p_tda) * FRAGMAX * PICA_DMA_PAGE_SIZE;
+	fragoffset = (txp - p_tda) * FRAGMAX * R4030_DMA_PAGE_SIZE;
 
 	/*
 	 * Now fill in the fragments. Each fragment maps to it's
@@ -685,7 +685,7 @@ sonicput(sc, m0)
 			fr++;
 			va += n;
 			resid -= n;
-			fragoffset += PICA_DMA_PAGE_SIZE;
+			fragoffset += R4030_DMA_PAGE_SIZE;
 		}
 	}
 	/*