Addition of support for a PCI based Vr4300 board from Algorithmics, the P-4032.

Changes to io macros were done to handle sparse bus addressing dynamically.
This is a first cut (rough).

1 files changed, 21 insertions, 6 deletions

diff --git a/sys/arch/arc/include/bus.h b/sys/arch/arc/include/bus.h
index 71ce3df4b49..8d3dcfbb9b4 100644
--- a/sys/arch/arc/include/bus.h
+++ b/sys/arch/arc/include/bus.h
@@ -1,6 +1,7 @@
-/*	$OpenBSD: bus.h,v 1.9 1997/01/10 23:41:25 pefo Exp $	*/
+/*	$OpenBSD: bus.h,v 1.10 1997/03/12 19:16:55 pefo Exp $	*/
 
 /*
+ * Copyright (c) 1997 Per Fogelstrom.  All rights reserved.
  * Copyright (c) 1996 Niklas Hallqvist.  All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -41,19 +42,33 @@
 #define CAT3(a,b,c)	a/**/b/**/c
 #endif
 
+#define HIT_FLUSH_DCACHE(addr, len)    R4K_HitFlushDCache(addr, len)
+
 /*
  * Bus access types.
  */
 typedef u_int32_t bus_addr_t;
 typedef u_int32_t bus_size_t;
 typedef u_int32_t bus_space_handle_t;
-typedef u_int32_t bus_space_tag_t;
+typedef struct arc_bus_space *bus_space_tag_t;
+
+struct arc_bus_space {
+	u_int32_t	isa_io_base;
+	u_int32_t	isa_mem_base;
+	u_int8_t	isa_io_sparse1;	/* Sparse addressing shift count */
+	u_int8_t	isa_io_sparse2;	/* Sparse addressing shift count */
+	u_int8_t	isa_io_sparse4;	/* Sparse addressing shift count */
+	u_int8_t	isa_io_sparse8;	/* Sparse addressing shift count */
+};
+
+extern struct arc_bus_space arc_bus;
 
 /*
  * Access methods for bus resources
  */
-#define bus_space_map(t, addr, size, cacheable, bshp) \
-    ((*(bshp) = (t) + (addr)), 0)
+#define bus_space_map(t, addr, size, cacheable, bshp)			      \
+    ((*(bshp) = (t)->isa_io_base + (addr)), 0)
+
 #define bus_space_unmap(t, bsh, size)
 
 #define bus_space_read(n,m)						      \
@@ -61,7 +76,7 @@ static __inline CAT3(u_int,m,_t)					      \
 CAT(bus_space_read_,n)(bus_space_tag_t bst, bus_space_handle_t bsh,	      \
      bus_addr_t ba)							      \
 {									      \
-	return *(volatile CAT3(u_int,m,_t) *)(bsh + ba);		      \
+	return *(volatile CAT3(u_int,m,_t) *)(bsh + ((ba) << CAT(bst->isa_io_sparse,n)));		      \
 }
 
 bus_space_read(1,8)
@@ -89,7 +104,7 @@ static __inline void							      \
 CAT(bus_space_write_,n)(bus_space_tag_t bst, bus_space_handle_t bsh,	      \
      bus_addr_t ba, CAT3(u_int,m,_t) x)					      \
 {									      \
-	*(volatile CAT3(u_int,m,_t) *)(bsh + ba) = x;			      \
+	*(volatile CAT3(u_int,m,_t) *)(bsh + ((ba) << CAT(bst->isa_io_sparse,n))) = x;      \
 }
 
 bus_space_write(1,8)