diff options
author | Per Fogelstrom <pefo@cvs.openbsd.org> | 1997-04-10 16:29:33 +0000 |
---|---|---|
committer | Per Fogelstrom <pefo@cvs.openbsd.org> | 1997-04-10 16:29:33 +0000 |
commit | 4c459afa7bc75884058a78d41baa5055b46c867d (patch) | |
tree | f543a8884c561f8d6854df4837bd23dd9594bbf7 /sys/arch/arc/include | |
parent | dac87775916d5fa9ed1d6e922f8c41695291126e (diff) |
Attempt to clean up local devices.
Added support for new QED RT52x0 processors.
Diffstat (limited to 'sys/arch/arc/include')
-rw-r--r-- | sys/arch/arc/include/bus.h | 6 | ||||
-rw-r--r-- | sys/arch/arc/include/cpu.h | 8 |
2 files changed, 7 insertions, 7 deletions
diff --git a/sys/arch/arc/include/bus.h b/sys/arch/arc/include/bus.h index 4cb19a65187..8ca525ae571 100644 --- a/sys/arch/arc/include/bus.h +++ b/sys/arch/arc/include/bus.h @@ -1,4 +1,4 @@ -/* $OpenBSD: bus.h,v 1.11 1997/03/26 14:44:38 pefo Exp $ */ +/* $OpenBSD: bus.h,v 1.12 1997/04/10 16:29:22 pefo Exp $ */ /* * Copyright (c) 1997 Per Fogelstrom. All rights reserved. @@ -42,8 +42,6 @@ #define CAT3(a,b,c) a/**/b/**/c #endif -#define HIT_FLUSH_DCACHE(addr, len) R4K_HitFlushDCache(addr, len) - /* * Bus access types. */ @@ -60,7 +58,7 @@ struct arc_bus_space { u_int8_t bus_sparse8; /* Sparse addressing shift count */ }; -extern struct arc_bus_space arc_bus; +extern struct arc_bus_space arc_bus_io, arc_bus_mem; /* * Access methods for bus resources diff --git a/sys/arch/arc/include/cpu.h b/sys/arch/arc/include/cpu.h index 9109b6cd0b1..f9b81386545 100644 --- a/sys/arch/arc/include/cpu.h +++ b/sys/arch/arc/include/cpu.h @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu.h,v 1.6 1997/03/23 11:34:34 pefo Exp $ */ +/* $OpenBSD: cpu.h,v 1.7 1997/04/10 16:29:24 pefo Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -376,7 +376,8 @@ union cpuprid { #define MIPS_R4600 0x20 /* QED R4600 Orion ISA III */ #define MIPS_R4700 0x21 /* QED R4700 Orion ISA III */ #define MIPS_R3TOSH 0x22 /* Toshiba R3000 based CPU ISA I */ -#define MIPS_R3NKK 0x23 /* NKK R3000 based CPU ISA I */ +#define MIPS_R5000 0x23 /* MIPS R5000 based CPU ISA IV */ +#define MIPS_RM5230 0x28 /* QED RM5230 based CPU ISA IV */ /* * MIPS FPU types @@ -395,7 +396,8 @@ union cpuprid { #define MIPS_R4600 0x20 /* QED R4600 Orion ISA III */ #define MIPS_R3SONY 0x21 /* Sony R3000 based FPU ISA I */ #define MIPS_R3TOSH 0x22 /* Toshiba R3000 based FPU ISA I */ -#define MIPS_R3NKK 0x23 /* NKK R3000 based FPU ISA I */ +#define MIPS_R5010 0x23 /* MIPS R5000 based FPU ISA IV */ +#define MIPS_RM5230 0x28 /* QED RM5230 based FPU ISA IV */ #if defined(_KERNEL) && !defined(_LOCORE) union cpuprid cpu_id; |