Pieces of arm11 and armv7 support for newer cpus. This is work in progress

and not complete.

7 files changed, 694 insertions, 0 deletions

diff --git a/sys/arch/arm/armv7/armv7_a4x_io.S b/sys/arch/arm/armv7/armv7_a4x_io.S
new file mode 100644
index 00000000000..7efc5cbaeb1
--- /dev/null
+++ b/sys/arch/arm/armv7/armv7_a4x_io.S
@@ -0,0 +1,104 @@
+/*	$OpenBSD: armv7_a4x_io.S,v 1.1 2009/05/08 02:57:32 drahn Exp $ */
+/*	$NetBSD: pxa2x0_a4x_io.S,v 1.1 2002/10/19 19:31:39 bsh Exp $ */
+
+/*
+ * Copyright (c) 2002  Genetec Corporation.  All rights reserved.
+ * Written by Hiroyuki Bessho for Genetec Corporation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed for the NetBSD Project by
+ *	Genetec Corporation.
+ * 4. The name of Genetec Corporation may not be used to endorse or 
+ *    promote products derived from this software without specific prior
+ *    written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORPORATION
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*	
+ * There are simple bus space functions for IO registers mapped at
+ * 32-bit aligned positions.  offset is multiplied by 4.  
+ */
+
+#include <machine/asm.h>
+
+/*
+ * bus_space I/O functions with offset*4
+ */
+
+/*
+ * read single
+ */
+
+ENTRY(a4x_bs_r_1)
+	ldrb	r0, [r1, r2, LSL #2]
+	mov	pc, lr
+
+ENTRY(a4x_bs_r_2)
+	mov	r2, r2, LSL #2
+	ldrh	r0, [r1, r2]
+	mov	pc, lr
+
+ENTRY(a4x_bs_r_4)
+	ldr	r0, [r1, r2, LSL #2]
+	mov	pc, lr
+
+/*
+ * write single
+ */
+
+ENTRY(a4x_bs_w_1)
+	strb	r3, [r1, r2, LSL #2]
+	mov	pc, lr
+
+ENTRY(a4x_bs_w_2)
+	mov	r2, r2, LSL #2
+	strh	r3, [r1, r2]
+	mov	pc, lr
+
+ENTRY(a4x_bs_w_4)
+	str	r3, [r1, r2, LSL #2]
+	mov	pc, lr
+
+/*
+ * read multiple
+ */
+ENTRY(a4x_bs_rm_1)
+	mov r2, r2, LSL #2
+	b generic_bs_rm_1
+	
+ENTRY(a4x_bs_rm_2)
+	mov r2, r2, LSL #2
+	b generic_armv4_bs_rm_2
+
+
+
+/*
+ * write multiple
+ */
+ENTRY(a4x_bs_wm_1)
+	mov r2, r2, LSL #2
+	b generic_bs_wm_1
+	
+ENTRY(a4x_bs_wm_2)
+	mov r2, r2, LSL #2
+	b generic_armv4_bs_wm_2
diff --git a/sys/arch/arm/armv7/armv7_a4x_space.c b/sys/arch/arm/armv7/armv7_a4x_space.c
new file mode 100644
index 00000000000..3fea5a3129e
--- /dev/null
+++ b/sys/arch/arm/armv7/armv7_a4x_space.c
@@ -0,0 +1,136 @@
+/*	$OpenBSD: armv7_a4x_space.c,v 1.1 2009/05/08 02:57:32 drahn Exp $ */
+/*	$NetBSD: armv7_a4x_space.c,v 1.2 2003/07/15 00:24:54 lukem Exp $ */
+
+/*
+ * Copyright (c) 2002  Genetec Corporation.  All rights reserved.
+ * Written by Hiroyuki Bessho for Genetec Corporation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed for the NetBSD Project by
+ *	Genetec Corporation.
+ * 4. The name of Genetec Corporation may not be used to endorse or 
+ *    promote products derived from this software without specific prior
+ *    written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORPORATION
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Bus space tag for 8/16-bit devices on 32-bit bus.
+ * all registers are located at the address of multiple of 4.
+ */
+
+#include <sys/cdefs.h>
+
+#include <sys/param.h>
+#include <sys/systm.h>
+
+#include <uvm/uvm_extern.h>
+
+#include <machine/bus.h>
+
+/* Prototypes for all the bus_space structure functions */
+bs_protos(armv7);
+bs_protos(a4x);
+bs_protos(generic);
+bs_protos(generic_armv4);
+bs_protos(bs_notimpl);
+
+struct bus_space armv7_a4x_bs_tag = {
+	/* cookie */
+	(void *) 0,
+
+	/* mapping/unmapping */
+	armv7_bs_map,
+	armv7_bs_unmap,
+	armv7_bs_subregion,
+
+	/* allocation/deallocation */
+	armv7_bs_alloc,	/* not implemented */
+	armv7_bs_free,		/* not implemented */
+
+	/* get kernel virtual address */
+	armv7_bs_vaddr,
+
+	/* mmap */
+	bs_notimpl_bs_mmap,
+
+	/* barrier */
+	armv7_bs_barrier,
+
+	/* read (single) */
+	a4x_bs_r_1,
+	a4x_bs_r_2,
+	a4x_bs_r_4,
+	bs_notimpl_bs_r_8,
+
+	/* read multiple */
+	a4x_bs_rm_1,
+	a4x_bs_rm_2,
+	bs_notimpl_bs_rm_4,
+	bs_notimpl_bs_rm_8,
+
+	/* read region */
+	bs_notimpl_bs_rr_1,
+	bs_notimpl_bs_rr_2,
+	bs_notimpl_bs_rr_4,
+	bs_notimpl_bs_rr_8,
+
+	/* write (single) */
+	a4x_bs_w_1,
+	a4x_bs_w_2,
+	a4x_bs_w_4,
+	bs_notimpl_bs_w_8,
+
+	/* write multiple */
+	a4x_bs_wm_1,
+	a4x_bs_wm_2,
+	bs_notimpl_bs_wm_4,
+	bs_notimpl_bs_wm_8,
+
+	/* write region */
+	bs_notimpl_bs_wr_1,
+	bs_notimpl_bs_wr_2,
+	bs_notimpl_bs_wr_4,
+	bs_notimpl_bs_wr_8,
+
+	/* set multiple */
+	bs_notimpl_bs_sm_1,
+	bs_notimpl_bs_sm_2,
+	bs_notimpl_bs_sm_4,
+	bs_notimpl_bs_sm_8,
+
+	/* set region */
+	bs_notimpl_bs_sr_1,
+	bs_notimpl_bs_sr_2,
+	bs_notimpl_bs_sr_4,
+	bs_notimpl_bs_sr_8,
+
+	/* copy */
+	bs_notimpl_bs_c_1,
+	bs_notimpl_bs_c_2,
+	bs_notimpl_bs_c_4,
+	bs_notimpl_bs_c_8,
+};
+
+
+
diff --git a/sys/arch/arm/armv7/armv7_mutex.c b/sys/arch/arm/armv7/armv7_mutex.c
new file mode 100644
index 00000000000..bc8b37693d7
--- /dev/null
+++ b/sys/arch/arm/armv7/armv7_mutex.c
@@ -0,0 +1,70 @@
+/*	$OpenBSD: armv7_mutex.c,v 1.1 2009/05/08 02:57:32 drahn Exp $	*/
+
+/*
+ * Copyright (c) 2004 Artur Grabowski <art@openbsd.org>
+ * All rights reserved. 
+ *
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met: 
+ *
+ * 1. Redistributions of source code must retain the above copyright 
+ *    notice, this list of conditions and the following disclaimer. 
+ * 2. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
+ * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
+ * THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL  DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 
+ */
+
+#include <sys/param.h>
+#include <sys/mutex.h>
+#include <sys/systm.h>
+
+#include <machine/intr.h>
+
+#ifdef MULTIPROCESSOR
+#error This code needs work
+#endif
+
+
+/* rewrite with the proper lock mechanism */
+
+/*
+ * Single processor systems don't need any mutexes, but they need the spl
+ * raising semantics of the mutexes.
+ */
+void
+mtx_init(struct mutex *mtx, int wantipl)
+{
+	mtx->mtx_oldipl = 0;
+	mtx->mtx_wantipl = wantipl;
+	mtx->mtx_lock = 0;
+}
+
+void
+mtx_enter(struct mutex *mtx)
+{
+	if (mtx->mtx_wantipl != IPL_NONE)
+		mtx->mtx_oldipl = _splraise(mtx->mtx_wantipl);
+
+	MUTEX_ASSERT_UNLOCKED(mtx);
+	mtx->mtx_lock = 1;
+}
+
+void
+mtx_leave(struct mutex *mtx)
+{
+	MUTEX_ASSERT_LOCKED(mtx);
+	mtx->mtx_lock = 0;
+	if (mtx->mtx_wantipl != IPL_NONE)
+		splx(mtx->mtx_oldipl);
+}
diff --git a/sys/arch/arm/armv7/armv7_space.c b/sys/arch/arm/armv7/armv7_space.c
new file mode 100644
index 00000000000..97fb452e7c0
--- /dev/null
+++ b/sys/arch/arm/armv7/armv7_space.c
@@ -0,0 +1,267 @@
+/*	$OpenBSD: armv7_space.c,v 1.1 2009/05/08 02:57:32 drahn Exp $ */
+
+/*
+ * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
+ * All rights reserved.
+ *
+ * Written by Jason R. Thorpe for Wasabi Systems, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed for the NetBSD Project by
+ *	Wasabi Systems, Inc.
+ * 4. The name of Wasabi Systems, Inc. may not be used to endorse
+ *    or promote products derived from this software without specific prior
+ *    written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+/*
+ * Copyright (c) 1997 Mark Brinicombe.
+ * Copyright (c) 1997 Causality Limited.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Ichiro FUKUHARA.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by Mark Brinicombe.
+ * 4. The name of the company nor the name of the author may be used to
+ *    endorse or promote products derived from this software without specific
+ *    prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*
+ * bus_space functions for Intel PXA2[51]0 application processor.
+ * Derived from i80321_space.c.
+ */
+
+#include <sys/cdefs.h>
+/*
+__KERNEL_RCSID(0, "$NetBSD: armv7_space.c,v 1.5 2004/06/07 19:45:22 nathanw Exp $");
+*/
+
+#include <sys/param.h>
+#include <sys/systm.h>
+
+#include <uvm/uvm_extern.h>
+
+#include <machine/bus.h>
+
+/* Prototypes for all the bus_space structure functions */
+bs_protos(armv7);
+bs_protos(generic);
+bs_protos(generic_armv4);
+bs_protos(bs_notimpl);
+
+struct bus_space armv7_bs_tag = {
+	/* cookie */
+	(void *) 0,
+
+	/* mapping/unmapping */
+	armv7_bs_map,
+	armv7_bs_unmap,
+	armv7_bs_subregion,
+
+	/* allocation/deallocation */
+	armv7_bs_alloc,	/* not implemented */
+	armv7_bs_free,		/* not implemented */
+
+	/* get kernel virtual address */
+	armv7_bs_vaddr,
+
+	/* mmap */
+	bs_notimpl_bs_mmap,
+
+	/* barrier */
+	armv7_bs_barrier,
+
+	/* read (single) */
+	generic_bs_r_1,
+	generic_armv4_bs_r_2,
+	generic_bs_r_4,
+	bs_notimpl_bs_r_8,
+
+	/* read multiple */
+	generic_bs_rm_1,
+	generic_armv4_bs_rm_2,
+	generic_bs_rm_4,
+	bs_notimpl_bs_rm_8,
+
+	/* read region */
+	generic_bs_rr_1,
+	generic_armv4_bs_rr_2,
+	generic_bs_rr_4,
+	bs_notimpl_bs_rr_8,
+
+	/* write (single) */
+	generic_bs_w_1,
+	generic_armv4_bs_w_2,
+	generic_bs_w_4,
+	bs_notimpl_bs_w_8,
+
+	/* write multiple */
+	generic_bs_wm_1,
+	generic_armv4_bs_wm_2,
+	generic_bs_wm_4,
+	bs_notimpl_bs_wm_8,
+
+	/* write region */
+	generic_bs_wr_1,
+	generic_armv4_bs_wr_2,
+	generic_bs_wr_4,
+	bs_notimpl_bs_wr_8,
+
+	/* set multiple */
+	bs_notimpl_bs_sm_1,
+	bs_notimpl_bs_sm_2,
+	bs_notimpl_bs_sm_4,
+	bs_notimpl_bs_sm_8,
+
+	/* set region */
+	generic_bs_sr_1,
+	generic_armv4_bs_sr_2,
+	bs_notimpl_bs_sr_4,
+	bs_notimpl_bs_sr_8,
+
+	/* copy */
+	bs_notimpl_bs_c_1,
+	generic_armv4_bs_c_2,
+	bs_notimpl_bs_c_4,
+	bs_notimpl_bs_c_8,
+};
+
+int
+armv7_bs_map(void *t, bus_addr_t bpa, bus_size_t size,
+	      int flag, bus_space_handle_t *bshp)
+{
+	u_long startpa, endpa, pa;
+	vaddr_t va;
+	pt_entry_t *pte;
+
+	if ((u_long)bpa > (u_long)KERNEL_BASE) {
+		/* Some IO registers (ex. UART ports for console)
+		   are mapped to fixed address by board specific
+		   routine. */
+		*bshp = bpa;
+		return(0);
+	}
+
+	startpa = trunc_page(bpa);
+	endpa = round_page(bpa + size);
+
+	/* XXX use extent manager to check duplicate mapping */
+
+	va = uvm_km_valloc(kernel_map, endpa - startpa);
+	if (! va)
+		return(ENOMEM);
+
+	*bshp = (bus_space_handle_t)(va + (bpa - startpa));
+
+	for (pa = startpa; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) {
+		pmap_kenter_pa(va, pa, VM_PROT_READ | VM_PROT_WRITE);
+		if ((flag & BUS_SPACE_MAP_CACHEABLE) == 0) {
+			pte = vtopte(va);
+			*pte &= ~L2_S_CACHE_MASK;
+			PTE_SYNC(pte);
+			/* XXX: pmap_kenter_pa() also does PTE_SYNC(). a bit of
+			 *      waste.
+			 */
+		}
+	}
+	pmap_update(pmap_kernel());
+
+	return(0);
+}
+
+void
+armv7_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size)
+{
+
+	if (bsh > (u_long)KERNEL_BASE) 
+		return;
+
+	uvm_km_free(kernel_map, bsh, size);
+}
+
+
+int
+armv7_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,
+    bus_size_t size, bus_space_handle_t *nbshp)
+{
+
+	*nbshp = bsh + offset;
+	return (0);
+}
+
+void
+armv7_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset,
+    bus_size_t len, int flags)
+{
+
+	/* Nothing to do. */
+}
+
+void *
+armv7_bs_vaddr(void *t, bus_space_handle_t bsh)
+{
+
+	return ((void *)bsh);
+}
+
+
+int
+armv7_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend,
+    bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
+    bus_addr_t *bpap, bus_space_handle_t *bshp)
+{
+
+	panic("armv7_io_bs_alloc(): not implemented");
+}
+
+void    
+armv7_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
+{
+
+	panic("armv7_io_bs_free(): not implemented");
+}
+
diff --git a/sys/arch/arm/armv7/armv7reg.h b/sys/arch/arm/armv7/armv7reg.h
new file mode 100644
index 00000000000..ef901d1c284
--- /dev/null
+++ b/sys/arch/arm/armv7/armv7reg.h
@@ -0,0 +1 @@
+#define MPHONE_INTCTL_BASE	0
diff --git a/sys/arch/arm/armv7/armv7var.h b/sys/arch/arm/armv7/armv7var.h
new file mode 100644
index 00000000000..926bfaf9f83
--- /dev/null
+++ b/sys/arch/arm/armv7/armv7var.h
@@ -0,0 +1,4 @@
+extern struct bus_space armv7_bs_tag;
+extern struct bus_space armv7_a4x_bs_tag;
+
+void armv7_intr_bootstrap(vaddr_t);
diff --git a/sys/arch/arm/armv7/avic_intr.h b/sys/arch/arm/armv7/avic_intr.h
new file mode 100644
index 00000000000..a03354c738d
--- /dev/null
+++ b/sys/arch/arm/armv7/avic_intr.h
@@ -0,0 +1,112 @@
+/*	$OpenBSD: avic_intr.h,v 1.1 2009/05/08 02:57:32 drahn Exp $ */
+/*	$NetBSD: pxa2x0_intr.h,v 1.4 2003/07/05 06:53:08 dogcow Exp $ */
+
+/* Derived from i80321_intr.h */
+/* Derived from xscale_intr.h */
+
+/*
+ * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
+ * All rights reserved.
+ *
+ * Written by Jason R. Thorpe for Wasabi Systems, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed for the NetBSD Project by
+ *	Wasabi Systems, Inc.
+ * 4. The name of Wasabi Systems, Inc. may not be used to endorse
+ *    or promote products derived from this software without specific prior
+ *    written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _ARMv7_AVIC_INTR_H_
+#define _ARMv7_AVIC_INTR_H_
+
+#define	ARM_IRQ_HANDLER	_C_LABEL(armv7avic_irq_handler)
+
+#ifndef _LOCORE
+
+#include <arm/armreg.h>
+#include <arm/cpufunc.h>
+#include <machine/intr.h>
+#include <arm/softintr.h>
+
+extern vaddr_t armv7avic_base;		/* Shared with armv7avic_irq.S */
+#define read_icu(offset) (*(volatile uint32_t *)(armv7avic_base+(offset)))
+#define write_icu(offset,value) \
+ (*(volatile uint32_t *)(armv7avic_base+(offset))=(value))
+
+extern __volatile int current_spl_level;
+extern __volatile int softint_pending;
+extern int armv7avic_imask[];
+void armv7avic_do_pending(void);
+
+#define SI_TO_IRQBIT(si)  (1U<<(si))
+void armv7avic_setipl(int new);
+void armv7avic_splx(int new);
+int armv7avic_splraise(int ipl);
+int armv7avic_spllower(int ipl);
+void armv7avic_setsoftintr(int si);
+
+
+/*
+ * An useful function for interrupt handlers.
+ * XXX: This shouldn't be here.
+ */
+static __inline int
+find_first_bit( uint32_t bits )
+{
+	int count;
+
+	/* since CLZ is available only on ARMv5, this isn't portable
+	 * to all ARM CPUs.  This file is for ARMv7_AVIC processor. 
+	 */
+	asm( "clz %0, %1" : "=r" (count) : "r" (bits) );
+	return 31-count;
+}
+
+
+int	_splraise(int);
+int	_spllower(int);
+void	splx(int);
+void	_setsoftintr(int);
+
+/*
+ * This function *MUST* be called very early on in a port's
+ * initarm() function, before ANY spl*() functions are called.
+ *
+ * The parameter is the virtual address of the ARMv7_AVIC's Interrupt
+ * Controller registers.
+ */
+void armv7avic_intr_bootstrap(vaddr_t);
+
+void armv7avic_irq_handler(void *);
+void *armv7avic_intr_establish(int irqno, int level, int (*func)(void *),
+    void *cookie, char *name);
+void armv7avic_intr_disestablish(void *cookie);
+const char *armv7avic_intr_string(void *cookie);
+
+#endif /* ! _LOCORE */
+
+#endif /* _ARMv7_AVIC_INTR_H_ */
+