diff options
| author | Tom Cosgrove <tom@cvs.openbsd.org> | 2006-10-19 10:55:57 +0000 |
|---|---|---|
| committer | Tom Cosgrove <tom@cvs.openbsd.org> | 2006-10-19 10:55:57 +0000 |
| commit | 8aff8e78d3d69b8cd3802bbb39e678ddbe0693ac (patch) | |
| tree | 2594f2256966cdbd5b8013a78b199a5c4c5a6797 /sys/arch/arm/xscale/pxa2x0_apm_asm.S | |
| parent | d079ea7bd9c8c790e010d1123f8cb2567f8bd39a (diff) | |
s/Mhz/MHz/ in comments and printf() strings
ok jsg@
Diffstat (limited to 'sys/arch/arm/xscale/pxa2x0_apm_asm.S')
| -rw-r--r-- | sys/arch/arm/xscale/pxa2x0_apm_asm.S | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/sys/arch/arm/xscale/pxa2x0_apm_asm.S b/sys/arch/arm/xscale/pxa2x0_apm_asm.S index d4c79ec4484..72b307f2590 100644 --- a/sys/arch/arm/xscale/pxa2x0_apm_asm.S +++ b/sys/arch/arm/xscale/pxa2x0_apm_asm.S @@ -1,4 +1,4 @@ -/* $OpenBSD: pxa2x0_apm_asm.S,v 1.1 2005/02/22 21:53:03 uwe Exp $ */ +/* $OpenBSD: pxa2x0_apm_asm.S,v 1.2 2006/10/19 10:55:56 tom Exp $ */ /* * Copyright (c) 2005 Uwe Stuehler <uwe@openbsd.org> @@ -486,7 +486,7 @@ ENTRY(pxa27x_frequency_change) and r3, r0, #CCCR_L_MASK ldr r0, .Lmemctliohp ldr r0, [r0] - cmp r3, #CCCR_RUN_X7 /* L=7 is 91Mhz mode */ + cmp r3, #CCCR_RUN_X7 /* L=7 is 91MHz mode */ beq frequency_change_91 and r3, r1, #CLKCFG_B cmp r3, #CLKCFG_B @@ -520,7 +520,7 @@ frequency_change_on_cache: /* Program new CLKCFG value, starting a core PLL frequency change * if CLKCFG_F is set. */ mcr p14, 0, r1, c6, c0, 0 - /* Change SDRAM clock frequency to 104Mhz, and ensure that the + /* Change SDRAM clock frequency to 104MHz, and ensure that the * store to MDREFR is complete before the next SDRAM access. */ str r4, [r0, #MEMCTL_MDREFR] ldr r5, [r0, #MEMCTL_MDREFR] @@ -537,7 +537,7 @@ frequency_change_on_cache: /* * void pxa27x_cpu_speed_91(void) * - * Switch core run frequency to 91 Mhz. + * Switch core run frequency to 91 MHz. */ .align 5 ENTRY(pxa27x_cpu_speed_91) |