diff options
| author | Miod Vallat <miod@cvs.openbsd.org> | 2011-11-06 13:47:58 +0000 |
|---|---|---|
| committer | Miod Vallat <miod@cvs.openbsd.org> | 2011-11-06 13:47:58 +0000 |
| commit | ec3f5ad81ce1bb91dbafa91e524301d7791672ce (patch) | |
| tree | 22a69b620cdbdef3501a09317d4adfe4b8871483 /sys/arch/arm | |
| parent | 13597041e09656a27245faf51e01358734fad333 (diff) | |
Correctly report WB and WT cache modes on v7 (they were swapped). ok uwe@
Diffstat (limited to 'sys/arch/arm')
| -rw-r--r-- | sys/arch/arm/arm/cpufunc.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/sys/arch/arm/arm/cpufunc.c b/sys/arch/arm/arm/cpufunc.c index ce783495fa5..fd1dc115d31 100644 --- a/sys/arch/arm/arm/cpufunc.c +++ b/sys/arch/arm/arm/cpufunc.c @@ -1,4 +1,4 @@ -/* $OpenBSD: cpufunc.c,v 1.14 2011/09/20 22:02:10 miod Exp $ */ +/* $OpenBSD: cpufunc.c,v 1.15 2011/11/06 13:47:57 miod Exp $ */ /* $NetBSD: cpufunc.c,v 1.65 2003/11/05 12:53:15 scw Exp $ */ /* @@ -761,11 +761,12 @@ arm_get_cachetype_cp15v7(void) arm_pcache_type = 0; break; case 0x40000000: - arm_pcache_type = CPU_CT_CTYPE_WT; - break; - case 0x80000000: case 0xc0000000: arm_pcache_type = CPU_CT_CTYPE_WB1; + break; + case 0x80000000: + arm_pcache_type = CPU_CT_CTYPE_WT; + break; } /* icache L1 */ |