diff options
author | Jonathan Gray <jsg@cvs.openbsd.org> | 2016-04-04 00:41:37 +0000 |
---|---|---|
committer | Jonathan Gray <jsg@cvs.openbsd.org> | 2016-04-04 00:41:37 +0000 |
commit | fc707ebdb9be324e8d4fa9830946d3f702155f01 (patch) | |
tree | 72a342adbc4f3a3d45154ff5e55e81c5a28889ab /sys/arch/arm | |
parent | a9ef7aa0def8dfbf3d64210cc977eac9ed1ff8a9 (diff) |
Set the SMP/coherency bit in ACTLR on Cortex A models it is documented
to exist on. This is required to use ldrex/strex in some cases.
ok patrick@
Diffstat (limited to 'sys/arch/arm')
-rw-r--r-- | sys/arch/arm/arm/cpufunc.c | 23 | ||||
-rw-r--r-- | sys/arch/arm/include/armreg.h | 3 |
2 files changed, 23 insertions, 3 deletions
diff --git a/sys/arch/arm/arm/cpufunc.c b/sys/arch/arm/arm/cpufunc.c index 325337e2d18..d5d944f389b 100644 --- a/sys/arch/arm/arm/cpufunc.c +++ b/sys/arch/arm/arm/cpufunc.c @@ -1,4 +1,4 @@ -/* $OpenBSD: cpufunc.c,v 1.38 2016/04/03 13:55:23 jsg Exp $ */ +/* $OpenBSD: cpufunc.c,v 1.39 2016/04/04 00:41:36 jsg Exp $ */ /* $NetBSD: cpufunc.c,v 1.65 2003/11/05 12:53:15 scw Exp $ */ /* @@ -548,6 +548,7 @@ set_cpufuncs() void armv7_setup() { + uint32_t auxctrl, auxctrlmask; int cpuctrl, cpuctrlmask; cpuctrlmask = CPU_CONTROL_MMU_ENABLE @@ -575,7 +576,25 @@ armv7_setup() curcpu()->ci_ctrl = cpuctrl; cpu_control(cpuctrlmask, cpuctrl); - /* TODO: Set ACTLR.SMP to e.g. allow LDREX/STREX. */ + auxctrl = auxctrlmask = 0; + + switch (cputype & CPU_ID_CORTEX_MASK) { + case CPU_ID_CORTEX_A5: + case CPU_ID_CORTEX_A9: + /* Cache and TLB maintenance broadcast */ +#ifdef notyet + auxctrl |= (1 << 0); +#endif + /* FALLTHROUGH */ + case CPU_ID_CORTEX_A7: + case CPU_ID_CORTEX_A15: + case CPU_ID_CORTEX_A17: + /* Set SMP to allow LDREX/STREX */ + auxctrl |= (1 << 6); + break; + } + + cpu_auxcontrol(auxctrlmask, auxctrl); /* And again. */ cpu_idcache_wbinv_all(); diff --git a/sys/arch/arm/include/armreg.h b/sys/arch/arm/include/armreg.h index 27f191774e7..cb5879e5998 100644 --- a/sys/arch/arm/include/armreg.h +++ b/sys/arch/arm/include/armreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: armreg.h,v 1.28 2016/03/22 23:35:01 patrick Exp $ */ +/* $OpenBSD: armreg.h,v 1.29 2016/04/04 00:41:36 jsg Exp $ */ /* $NetBSD: armreg.h,v 1.27 2003/09/06 08:43:02 rearnsha Exp $ */ /* @@ -146,6 +146,7 @@ #define CPU_ID_80321_600 0x69052430 #define CPU_ID_80321_400_B0 0x69052c20 #define CPU_ID_80321_600_B0 0x69052c30 +#define CPU_ID_CORTEX_MASK 0xff0ffff0 #define CPU_ID_CORTEX_A5 0x410fc050 #define CPU_ID_CORTEX_A5_MASK 0xff0ffff0 #define CPU_ID_CORTEX_A7 0x410fc070 |