diff options
| author | Dale Rahn <drahn@cvs.openbsd.org> | 2005-09-22 04:14:45 +0000 |
|---|---|---|
| committer | Dale Rahn <drahn@cvs.openbsd.org> | 2005-09-22 04:14:45 +0000 |
| commit | 2c279f7317708d24bcdf2b04e3608f6fcbcedd2f (patch) | |
| tree | f59906c1472af9270055c542f470adbcc7fa2238 /sys/arch/arm | |
| parent | a0c4c11c7f85dae75a27fafc5b6e824dd6d42c68 (diff) | |
NEWINTR is not an option on OpenBSD.
Diffstat (limited to 'sys/arch/arm')
| -rw-r--r-- | sys/arch/arm/arm/cpuswitch.S | 12 | ||||
| -rw-r--r-- | sys/arch/arm/footbridge/footbridge_intr.h | 4 | ||||
| -rw-r--r-- | sys/arch/arm/xscale/pxa2x0_intr.h | 5 |
3 files changed, 4 insertions, 17 deletions
diff --git a/sys/arch/arm/arm/cpuswitch.S b/sys/arch/arm/arm/cpuswitch.S index ced2d20f056..5b80ec6ed3c 100644 --- a/sys/arch/arm/arm/cpuswitch.S +++ b/sys/arch/arm/arm/cpuswitch.S @@ -1,4 +1,4 @@ -/* $OpenBSD: cpuswitch.S,v 1.5 2004/12/30 23:43:42 drahn Exp $ */ +/* $OpenBSD: cpuswitch.S,v 1.6 2005/09/22 04:14:44 drahn Exp $ */ /* $NetBSD: cpuswitch.S,v 1.41 2003/11/15 08:44:18 scw Exp $ */ /* @@ -311,13 +311,8 @@ ASENTRY_NP(idle) #endif /* Drop to spl0 (returns the current spl level in r0). */ -#ifdef __NEWINTR mov r0, #(IPL_NONE) bl _C_LABEL(_spllower) -#else /* ! __NEWINTR */ - mov r0, #(_SPL_0) - bl _C_LABEL(splx) -#endif /* __NEWINTR */ teq r6, #0 /* cpu_do_powersave non zero? */ ldrne r6, .Lcpufuncs @@ -1102,13 +1097,8 @@ ENTRY(savectx) ldmfd sp!, {r4-r7, pc} ENTRY(proc_trampoline) -#ifdef __NEWINTR mov r0, #(IPL_NONE) bl _C_LABEL(_spllower) -#else /* ! __NEWINTR */ - mov r0, #(_SPL_0) - bl _C_LABEL(splx) -#endif /* __NEWINTR */ #ifdef MULTIPROCESSOR bl _C_LABEL(proc_trampoline_mp) diff --git a/sys/arch/arm/footbridge/footbridge_intr.h b/sys/arch/arm/footbridge/footbridge_intr.h index da4d9b87970..4f860821b76 100644 --- a/sys/arch/arm/footbridge/footbridge_intr.h +++ b/sys/arch/arm/footbridge/footbridge_intr.h @@ -1,4 +1,4 @@ -/* $OpenBSD: footbridge_intr.h,v 1.4 2005/04/19 15:29:47 mickey Exp $ */ +/* $OpenBSD: footbridge_intr.h,v 1.5 2005/09/22 04:14:44 drahn Exp $ */ /* $NetBSD: footbridge_intr.h,v 1.4 2003/01/03 00:56:00 thorpej Exp $ */ /* @@ -68,8 +68,6 @@ #define IST_EDGE 2 /* edge-triggered */ #define IST_LEVEL 3 /* level-triggered */ -#define __NEWINTR /* enables new hooks in cpu_fork()/cpu_switch() */ - #define ARM_IRQ_HANDLER _C_LABEL(footbridge_intr_dispatch) #ifndef _LOCORE diff --git a/sys/arch/arm/xscale/pxa2x0_intr.h b/sys/arch/arm/xscale/pxa2x0_intr.h index 24eb2ef7370..c12651ad38a 100644 --- a/sys/arch/arm/xscale/pxa2x0_intr.h +++ b/sys/arch/arm/xscale/pxa2x0_intr.h @@ -1,4 +1,4 @@ -/* $OpenBSD: pxa2x0_intr.h,v 1.8 2005/08/08 16:30:47 uwe Exp $ */ +/* $OpenBSD: pxa2x0_intr.h,v 1.9 2005/09/22 04:14:44 drahn Exp $ */ /* $NetBSD: pxa2x0_intr.h,v 1.4 2003/07/05 06:53:08 dogcow Exp $ */ /* Derived from i80321_intr.h */ @@ -45,8 +45,6 @@ #ifndef _LOCORE -#define __NEWINTR /* enables new hooks in cpu_fork()/cpu_switch() */ - #include <arm/armreg.h> #include <arm/cpufunc.h> #include <machine/intr.h> @@ -109,3 +107,4 @@ const char *pxa2x0_intr_string(void *cookie); #endif /* ! _LOCORE */ #endif /* _PXA2X0_INTR_H_ */ + |