Avoid overlap in USB hard and the soft interrupt bits, update comments

to reflect the new allocation of IRQ bits, and zap duplicate definition
of SI_TO_IRQBIT; help/test niallo@ ok drahn@

3 files changed, 17 insertions, 15 deletions

diff --git a/sys/arch/arm/xscale/pxa2x0_intr.c b/sys/arch/arm/xscale/pxa2x0_intr.c
index d445ae01975..16c8ea63234 100644
--- a/sys/arch/arm/xscale/pxa2x0_intr.c
+++ b/sys/arch/arm/xscale/pxa2x0_intr.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pxa2x0_intr.c,v 1.11 2005/05/27 20:21:15 uwe Exp $ */
+/*	$OpenBSD: pxa2x0_intr.c,v 1.12 2005/08/08 16:30:47 uwe Exp $ */
 /*	$NetBSD: pxa2x0_intr.c,v 1.5 2003/07/15 00:24:55 lukem Exp $	*/
 
 /*
@@ -180,6 +180,11 @@ pxa2x0_intr_bootstrap(vaddr_t addr)
 	pxaic_base = addr;
 }
 
+/*
+ * Cotulla's integrated ICU doesn't have IRQ0..7, PXA27x has useful
+ * interrupts 0..3, so we map software interrupts to bit 4..7.
+ */
+#define SI_TO_IRQBIT(si)  (1U<<(4+(si)))
 
 /*
  * Map a software interrupt queue to an interrupt priority level.
@@ -639,12 +644,6 @@ sa11x0_intr_establish(sa11x0_chipset_tag_t ic, int irq, int type, int level,
 	return pxa2x0_intr_establish(irq, level, ih_fun, ih_arg, name);
 }
 
-/*
- * Cotulla's integrated ICU doesn't have IRQ0..7, so
- * we map software interrupts to bit 0..3
- */
-#define SI_TO_IRQBIT(si)  (1U<<(si))
-
 void
 pxa2x0_setipl(int new)
 {
diff --git a/sys/arch/arm/xscale/pxa2x0_intr.h b/sys/arch/arm/xscale/pxa2x0_intr.h
index d929c5896ad..24eb2ef7370 100644
--- a/sys/arch/arm/xscale/pxa2x0_intr.h
+++ b/sys/arch/arm/xscale/pxa2x0_intr.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pxa2x0_intr.h,v 1.7 2005/05/27 20:21:15 uwe Exp $ */
+/*	$OpenBSD: pxa2x0_intr.h,v 1.8 2005/08/08 16:30:47 uwe Exp $ */
 /*	$NetBSD: pxa2x0_intr.h,v 1.4 2003/07/05 06:53:08 dogcow Exp $ */
 
 /* Derived from i80321_intr.h */
@@ -62,7 +62,6 @@ extern __volatile int softint_pending;
 extern int pxa2x0_imask[];
 void pxa2x0_do_pending(void);
 
-#define SI_TO_IRQBIT(si)  (1U<<(si))
 void pxa2x0_setipl(int new);
 void pxa2x0_splx(int new);
 int pxa2x0_splraise(int ipl);
diff --git a/sys/arch/arm/xscale/pxa2x0reg.h b/sys/arch/arm/xscale/pxa2x0reg.h
index 5f30542db99..b0ed1e9c623 100644
--- a/sys/arch/arm/xscale/pxa2x0reg.h
+++ b/sys/arch/arm/xscale/pxa2x0reg.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pxa2x0reg.h,v 1.22 2005/04/15 00:09:06 pascoe Exp $ */
+/*	$OpenBSD: pxa2x0reg.h,v 1.23 2005/08/08 16:30:47 uwe Exp $ */
 /* $NetBSD: pxa2x0reg.h,v 1.4 2003/06/11 20:43:01 scw Exp $ */
 
 /*
@@ -126,15 +126,19 @@
 #define PXA2X0_USBHC_SIZE	0x70
 
 /* width of interrupt controller */
-#define ICU_LEN			32   /* but [0..7,15,16] is not used */
-#define ICU_INT_HWMASK		0xffffff00
+#define ICU_LEN			32	/* but some are not used */
+#define ICU_INT_HWMASK		0xffffff0f
 #define PXA2X0_IRQ_MIN		1
 
-#define PXA2X0_INT_USBH2	2
-#define PXA2X0_INT_USBH1	3	/* OHCI */
+/*
+ * [4..7] are used as soft intrs by SI_TO_IRQBIT,
+ * and [0,1,15,16] are not used by us.
+ */
+#define PXA2X0_INT_USBH2	2	/* USB host (all other events) */
+#define PXA2X0_INT_USBH1	3	/* USB host (OHCI) */
 #define PXA2X0_INT_GPIO0	8
 #define PXA2X0_INT_GPIO1	9
-#define PXA2X0_INT_GPION	10	/* irq from GPIO[2..80] */
+#define PXA2X0_INT_GPION	10	/* IRQ from GPIO[2..80] */
 #define PXA2X0_INT_USB  	11
 #define PXA2X0_INT_PMU  	12
 #define PXA2X0_INT_I2S  	13