diff options
| author | Miod Vallat <miod@cvs.openbsd.org> | 2011-11-05 18:11:27 +0000 |
|---|---|---|
| committer | Miod Vallat <miod@cvs.openbsd.org> | 2011-11-05 18:11:27 +0000 |
| commit | 7702ad293096b08815918cfaeab6a7387a580e42 (patch) | |
| tree | a4e0e4305332627960d8538f87cdc50eb041809b /sys/arch/arm | |
| parent | 342419a20106f45294d98630b17a27db567a0216 (diff) | |
Remove incorrect logic leading to skip page table flushes because
PMAP_NEEDS_PTE_SYNC would get defined to zero on kernels lacking StrongArm
support.
discussed with and ok drahn@
Diffstat (limited to 'sys/arch/arm')
| -rw-r--r-- | sys/arch/arm/include/pmap.h | 20 |
1 files changed, 1 insertions, 19 deletions
diff --git a/sys/arch/arm/include/pmap.h b/sys/arch/arm/include/pmap.h index d2aebb80c1a..ca2f2f1f676 100644 --- a/sys/arch/arm/include/pmap.h +++ b/sys/arch/arm/include/pmap.h @@ -1,4 +1,4 @@ -/* $OpenBSD: pmap.h,v 1.20 2011/09/21 10:12:59 miod Exp $ */ +/* $OpenBSD: pmap.h,v 1.21 2011/11/05 18:11:26 miod Exp $ */ /* $NetBSD: pmap.h,v 1.76 2003/09/06 09:10:46 rearnsha Exp $ */ /* @@ -321,26 +321,8 @@ vtopte(vaddr_t va) */ extern int pmap_needs_pte_sync; -/* - * StrongARM SA-1 caches do not have a write-through mode. So, on these, - * we need to do PTE syncs. If only SA-1 is configured, then evaluate - * this at compile time. - */ -#if (ARM_MMU_SA1 == 1) && (ARM_NMMUS == 1) -#define PMAP_NEEDS_PTE_SYNC 1 -#define PMAP_INCLUDE_PTE_SYNC -#elif (ARM_MMU_SA1 == 0) -#define PMAP_NEEDS_PTE_SYNC 0 -#endif - -/* - * Provide a fallback in case we were not able to determine it at - * compile-time. - */ -#ifndef PMAP_NEEDS_PTE_SYNC #define PMAP_NEEDS_PTE_SYNC pmap_needs_pte_sync #define PMAP_INCLUDE_PTE_SYNC -#endif #define PTE_SYNC(pte) \ do { \ |