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authorDale Rahn <drahn@cvs.openbsd.org>2005-01-13 20:46:29 +0000
committerDale Rahn <drahn@cvs.openbsd.org>2005-01-13 20:46:29 +0000
commita837e73ed1a6be5618c0fd8d2720903fb77b1f86 (patch)
treefb8c39b789308984115a31e911de75c6cf7ef0c0 /sys/arch/arm
parent158909fad0b4c40cd84724c6054f2af00552cf3f (diff)
'quick' function for actual gpio operations, set/clear/read, setdir, clearirq
Diffstat (limited to 'sys/arch/arm')
-rw-r--r--sys/arch/arm/xscale/pxa2x0_gpio.c79
1 files changed, 78 insertions, 1 deletions
diff --git a/sys/arch/arm/xscale/pxa2x0_gpio.c b/sys/arch/arm/xscale/pxa2x0_gpio.c
index d928f1b7995..8a5766894d4 100644
--- a/sys/arch/arm/xscale/pxa2x0_gpio.c
+++ b/sys/arch/arm/xscale/pxa2x0_gpio.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: pxa2x0_gpio.c,v 1.9 2005/01/11 21:03:37 drahn Exp $ */
+/* $OpenBSD: pxa2x0_gpio.c,v 1.10 2005/01/13 20:46:28 drahn Exp $ */
/* $NetBSD: pxa2x0_gpio.c,v 1.2 2003/07/15 00:24:55 lukem Exp $ */
/*
@@ -538,3 +538,80 @@ pxa2x0_gpio_set_function(u_int gpio, u_int fn)
return (oldfn);
}
+
+/*
+ * Quick function to read pin value
+ */
+int
+pxa2x0_gpio_get_bit(u_int gpio)
+{
+ struct pxagpio_softc *sc = pxagpio_softc;
+ int bit;
+
+ bit = GPIO_BIT(gpio);
+ if (pxagpio_reg_read(sc, GPIO_REG(GPIO_GPLR0, gpio)) & bit)
+ return 1;
+ else
+ return 0;
+}
+
+/*
+ * Quick function to set pin to 1
+ */
+void
+pxa2x0_gpio_set_bit(u_int gpio)
+{
+ struct pxagpio_softc *sc = pxagpio_softc;
+ int bit;
+
+ bit = GPIO_BIT(gpio);
+ pxagpio_reg_write(sc, GPIO_REG(GPIO_GPSR0, gpio), bit);
+}
+
+/*
+ * Quick function to set pin to 1
+ */
+void
+pxa2x0_gpio_clear_bit(u_int gpio)
+{
+ struct pxagpio_softc *sc = pxagpio_softc;
+ int bit;
+
+ bit = GPIO_BIT(gpio);
+ pxagpio_reg_write(sc, GPIO_REG(GPIO_GPCR0, gpio), bit);
+}
+
+/*
+ * Quick function to change pin direction
+ */
+void
+pxa2x0_gpio_set_dir(u_int gpio, int dir)
+{
+ struct pxagpio_softc *sc = pxagpio_softc;
+ int bit;
+ u_int32_t reg;
+
+ bit = GPIO_BIT(gpio);
+
+ reg = pxagpio_reg_read(sc, GPIO_REG(GPIO_GPDR0, gpio)) & ~bit;
+ if (GPIO_FN_IS_OUT(dir))
+ reg |= bit;
+ pxagpio_reg_write(sc, GPIO_REG(GPIO_GPDR0, gpio), reg);
+}
+
+/*
+ * Quick function to clear interrupt status on a pin
+ * GPIO pins may be toggle in an interrupt and we dont want
+ * extra spurious interrupts to occur.
+ * suppose this causes a slight race if a key is pressed while
+ * the interrupt handler is running. (yes this is for the keyboard driver)
+ */
+void
+pxa2x0_gpio_clear_intr(u_int gpio)
+{
+ struct pxagpio_softc *sc = pxagpio_softc;
+ int bit;
+
+ bit = GPIO_BIT(gpio);
+ pxagpio_reg_write(sc, GPIO_REG(GPIO_GEDR0, gpio), bit);
+}