diff options
| author | Mark Kettenis <kettenis@cvs.openbsd.org> | 2016-08-13 22:07:02 +0000 |
|---|---|---|
| committer | Mark Kettenis <kettenis@cvs.openbsd.org> | 2016-08-13 22:07:02 +0000 |
| commit | e3dcd7c4c4462284c83737064c32010b281d1bb3 (patch) | |
| tree | ad1049b1acc5683703bfd3aa20ceeb181a588bca /sys/arch/armv7/conf/RAMDISK | |
| parent | e9c3d5065605202e536a4b10bcab665e8d7a8ca1 (diff) | |
Add the shim to make dwge(4) attach to simplebus(4). This brings us
working gigabit on the Allwinner A20. Probably won't work yet on other
Allwinner SoCs due to differences in how the clocks get set up.
Based on an earlier diff from patrick@.
Diffstat (limited to 'sys/arch/armv7/conf/RAMDISK')
| -rw-r--r-- | sys/arch/armv7/conf/RAMDISK | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/sys/arch/armv7/conf/RAMDISK b/sys/arch/armv7/conf/RAMDISK index cfffe718334..4936f7e3ff1 100644 --- a/sys/arch/armv7/conf/RAMDISK +++ b/sys/arch/armv7/conf/RAMDISK @@ -1,4 +1,4 @@ -# $OpenBSD: RAMDISK,v 1.42 2016/08/11 04:33:06 jsg Exp $ +# $OpenBSD: RAMDISK,v 1.43 2016/08/13 22:07:01 kettenis Exp $ machine armv7 arm @@ -93,6 +93,7 @@ sxidog* at fdt? # watchdog timer sxirtc* at fdt? # Real Time Clock sxiuart* at fdt? # onboard UARTs sxie* at fdt? +dwge* at fdt? sxiahci* at fdt? # AHCI/SATA ehci* at fdt? # EHCI (shim) usb* at ehci? #flags 0x1 |