diff options
author | Miod Vallat <miod@cvs.openbsd.org> | 2011-11-01 21:20:56 +0000 |
---|---|---|
committer | Miod Vallat <miod@cvs.openbsd.org> | 2011-11-01 21:20:56 +0000 |
commit | 502d09447316d90435e67ad00c1656165c581cc7 (patch) | |
tree | 7a840dc757e6c69edc61ef46b65bb837dc0c0c35 /sys/arch/hp300 | |
parent | b704339b4a8ff1053070fa2b4eb8ef42d829a9a8 (diff) |
Drop support for the HP MMU. It was only found on two hp300 systems (models
320 and 350), which have been unsupported since a bunch of release already,
because this annoying MMU does not have TT registers (or if it does, it is
not documented) and thus went in the way of PMAP_DIRECT for hp300.
In other words: remove a bunch of code which was either #ifdef'ed out or
had no chance to run in real life.
Diffstat (limited to 'sys/arch/hp300')
-rw-r--r-- | sys/arch/hp300/conf/Makefile.hp300 | 19 | ||||
-rw-r--r-- | sys/arch/hp300/hp300/db_memrw.c | 13 | ||||
-rw-r--r-- | sys/arch/hp300/hp300/locore.s | 148 | ||||
-rw-r--r-- | sys/arch/hp300/hp300/machdep.c | 5 |
4 files changed, 12 insertions, 173 deletions
diff --git a/sys/arch/hp300/conf/Makefile.hp300 b/sys/arch/hp300/conf/Makefile.hp300 index 41b7e8c4081..c6ded9e94c3 100644 --- a/sys/arch/hp300/conf/Makefile.hp300 +++ b/sys/arch/hp300/conf/Makefile.hp300 @@ -1,4 +1,4 @@ -# $OpenBSD: Makefile.hp300,v 1.76 2011/07/07 22:28:18 guenther Exp $ +# $OpenBSD: Makefile.hp300,v 1.77 2011/11/01 21:20:52 miod Exp $ # For instructions on building kernels consult the config(8) and options(4) # manual pages. @@ -47,26 +47,21 @@ DB_STRUCTINFO= db_structinfo.h DB_STRUCTINFO= .endif -.if (${IDENT:M-DHP320} != "" || ${IDENT:M-DHP350} != "") -_OPTIONS+= -DM68020 -DM68K_MMU_HP -CPPFLAGS+= -DCACHE_HAVE_VAC -.endif .if (${IDENT:M-DHP330} != "") -_OPTIONS+= -DM68020 -DM68K_MMU_MOTOROLA +_OPTIONS+= -DM68020 .endif .if (${IDENT:M-DHP340} != "" || ${IDENT:M-DHP360} != "" || \ ${IDENT:M-DHP362} != "") -_OPTIONS+= -DM68030 -DM68K_MMU_MOTOROLA +_OPTIONS+= -DM68030 .endif .if (${IDENT:M-DHP345} != "" || ${IDENT:M-DHP370} != "" || \ ${IDENT:M-DHP375} != "" || ${IDENT:M-DHP400} != "") -_OPTIONS+= -DM68030 -DM68K_MMU_MOTOROLA +_OPTIONS+= -DM68030 CPPFLAGS+= -DCACHE_HAVE_PAC .endif .if (${IDENT:M-DHP380} != "" || ${IDENT:M-DHP382} != "" || \ ${IDENT:M-DHP385} != "" || ${IDENT:M-DHP425} != "" || \ ${IDENT:M-DHP433} != "") -_OPTIONS+= -DM68K_MMU_MOTOROLA CPPFLAGS+= -DM68040 -DFPSP .endif .if ${_OPTIONS:M-DM68020} != "" @@ -75,12 +70,6 @@ CPPFLAGS+= -DM68020 .if ${_OPTIONS:M-DM68030} != "" CPPFLAGS+= -DM68030 .endif -.if ${_OPTIONS:M-DM68K_MMU_HP} != "" -CPPFLAGS+= -DM68K_MMU_HP -.endif -.if ${_OPTIONS:M-DM68K_MMU_MOTOROLA} != "" -CPPFLAGS+= -DM68K_MMU_MOTOROLA -.endif .include "${_archdir}/fpsp/Makefile.inc" diff --git a/sys/arch/hp300/hp300/db_memrw.c b/sys/arch/hp300/hp300/db_memrw.c index 3573e0886db..94946da45a7 100644 --- a/sys/arch/hp300/hp300/db_memrw.c +++ b/sys/arch/hp300/hp300/db_memrw.c @@ -1,4 +1,4 @@ -/* $OpenBSD: db_memrw.c,v 1.10 2008/06/26 05:42:10 ray Exp $ */ +/* $OpenBSD: db_memrw.c,v 1.11 2011/11/01 21:20:55 miod Exp $ */ /* $NetBSD: db_memrw.c,v 1.5 1997/06/10 18:48:47 veego Exp $ */ /*- @@ -135,17 +135,6 @@ db_write_text(addr, size, data) limit = size; size -= limit; -#ifdef M68K_MMU_HP - /* - * Flush the supervisor side of the VAC to - * prevent a cache hit on the old, read-only PTE. - * XXX Is this really necessary, or am I just - * paranoid? - */ - if (ectype == EC_VIRT) - DCIS(); -#endif - /* * Make the page writable. Note the mapping is * cache-inhibited to save hair. diff --git a/sys/arch/hp300/hp300/locore.s b/sys/arch/hp300/hp300/locore.s index 2b9278768c3..7799d306ea7 100644 --- a/sys/arch/hp300/hp300/locore.s +++ b/sys/arch/hp300/hp300/locore.s @@ -1,4 +1,4 @@ -/* $OpenBSD: locore.s,v 1.66 2011/08/18 19:54:18 miod Exp $ */ +/* $OpenBSD: locore.s,v 1.67 2011/11/01 21:20:55 miod Exp $ */ /* $NetBSD: locore.s,v 1.91 1998/11/11 06:41:25 thorpej Exp $ */ /* @@ -306,32 +306,12 @@ Lis68020: movl #1,a1@(MMUCMD) | a 68020, write HP MMU location movl a1@(MMUCMD),d0 | read it back btst #0,d0 | non-zero? - jne Lishpmmu | yes, we have HP MMU + jne Lunsupp | yes, we have HP MMU RELOC(mmutype, a0) movl #MMU_68851,a0@ | no, we have PMMU RELOC(machineid, a0) movl #HP_330,a0@ | and 330 CPU jra Lstart1 -Lishpmmu: - RELOC(ectype, a0) | 320 or 350 - movl #EC_VIRT,a0@ | both have a virtual address cache - movl #0x80,a1@(MMUCMD) | set magic cookie - movl a1@(MMUCMD),d0 | read it back - btst #7,d0 | cookie still on? - jeq Lis320 | no, just a 320 - RELOC(machineid, a0) - movl #HP_350,a0@ | yes, a 350 - movl #0,a1@(MMUCMD) | clear out MMU again - RELOC(pmap_aliasmask, a0) - movl #0x7fff, a0@ | 32KB - jra Lstart1 -Lis320: - RELOC(machineid, a0) - movl #HP_320,a0@ - movl #0,a1@(MMUCMD) | clear out MMU again - RELOC(pmap_aliasmask, a0) - movl #0x3fff, a0@ | 16KB - jra Lstart1 /* * End of 68020 section @@ -463,6 +443,7 @@ eiodone: jra Lstart2 1: #endif +Lunsupp: /* Config botch; no hope. */ DOREBOOT @@ -532,8 +513,6 @@ Lmmu_enable: movl a0@,d1 | read value (a KVA) addl a5,d1 | convert to PA RELOC(mmutype, a0) - tstl a0@ | HP MMU? - jeq Lhpmmu2 | yes, skip cmpl #MMU_68040,a0@ | 68040? jne Lmotommu1 | no, skip .long 0x4e7b1807 | movc d1,srp @@ -544,11 +523,7 @@ Lmotommu1: movl d1,a0@(4) | + segtable address pmove a0@,srp | load the supervisor root pointer movl #0x80000002,a0@ | reinit upper half for CRP loads - jra Lstploaddone | done -Lhpmmu2: - moveq #PGSHIFT,d2 - lsrl d2,d1 | convert to page frame - movl d1,INTIOBASE+MMUBASE+MMUSSTP | load in sysseg table register + Lstploaddone: lea MAXADDR,a2 | PA of last RAM page ASRELOC(Lhighcode, a1) | addr of high code @@ -574,8 +549,6 @@ Lhighcode: movc d0,vbr RELOC(mmutype, a0) - tstl a0@ | HP MMU? - jeq Lhpmmu3 | yes, skip cmpl #MMU_68040,a0@ | 68040? jne Lmotommu2 | no, skip movw #0,INTIOBASE+MMUBASE+MMUCMD+2 @@ -620,10 +593,6 @@ Lmotommu2b: movl #0x82c0aa00,a2@ | value to load TC with pmove a2@,tc | load it jmp Lenab1 -Lhpmmu3: - movl #0,INTIOBASE+MMUBASE+MMUCMD | clear external cache - movl #MMU_ENAB,INTIOBASE+MMUBASE+MMUCMD | turn on MMU - jmp Lenab1 | jmp to mapped code Lehighcode: /* @@ -836,11 +805,6 @@ Lbe10: andw #0x0FFF,d0 | clear out frame format cmpw #12,d0 | address error vector? jeq Lisaerr | yes, go to it -#if defined(M68K_MMU_MOTOROLA) -#if defined(M68K_MMU_HP) - tstl _C_LABEL(mmutype) | HP MMU? - jeq Lbehpmmu | yes, different MMU fault handler -#endif movl d1,a0 | fault address movl sp@,d0 | function code from ssw btst #8,d0 | data fault? @@ -858,11 +822,9 @@ Lbe10a: jeq Lmightnotbemerr | no -> wp check btst #7,d1 | is it MMU table berr? jne Lisberr1 | yes, needs not be fast. -#endif /* M68K_MMU_MOTOROLA */ Lismerr: movl #T_MMUFLT,sp@- | show that we are an MMU fault jra _ASM_LABEL(faultstkadj) | and deal with it -#if defined(M68K_MMU_MOTOROLA) Lmightnotbemerr: btst #3,d1 | write protect bit set? jeq Lisberr1 | no: must be bus error @@ -871,17 +833,6 @@ Lmightnotbemerr: cmpw #0x40,d0 | was it read cycle? jne Lismerr | no, was not WPE, must be MMU fault jra Lisberr1 | real bus err needs not be fast. -#endif /* M68K_MMU_MOTOROLA */ -#if defined(M68K_MMU_HP) -Lbehpmmu: - MMUADDR(a0) - movl a0@(MMUSTAT),d0 | read MMU status - btst #3,d0 | MMU fault? - jeq Lisberr1 | no, just a non-MMU bus error - andl #~MMU_FAULT,a0@(MMUSTAT)| yes, clear fault bits - movw d0,sp@ | pass MMU stat in upper half of code - jra Lismerr | and handle it -#endif Lisaerr: movl #T_ADDRERR,sp@- | mark address error jra _ASM_LABEL(faultstkadj) | and deal with it @@ -1492,23 +1443,12 @@ ASENTRY_NOPROFILE(TBIA) rts Lmotommu3: #endif -#if defined(M68K_MMU_MOTOROLA) - tstl _C_LABEL(mmutype) | HP MMU? - jeq Lhpmmu6 | yes, skip pflusha | flush entire TLB jpl Lmc68851a | 68851 implies no d-cache movl #DC_CLEAR,d0 movc d0,cacr | invalidate on-chip d-cache Lmc68851a: rts -Lhpmmu6: -#endif -#if defined(M68K_MMU_HP) - MMUADDR(a0) - movl a0@(MMUTBINVAL),sp@- | do not ask me, this - addql #4,sp | is how HP-UX does it -#endif - rts /* * Invalidate any TLB entry for given VA (TB Invalidate Single) @@ -1529,9 +1469,6 @@ ENTRY(TBIS) rts Lmotommu4: #endif -#if defined(M68K_MMU_MOTOROLA) - tstl _C_LABEL(mmutype) | HP MMU? - jeq Lhpmmu5 | yes, skip movl sp@(4),a0 | get addr to flush jpl Lmc68851b | is 68851? pflush #0,#0,a0@ | flush address from both sides @@ -1541,23 +1478,6 @@ Lmotommu4: Lmc68851b: pflushs #0,#0,a0@ | flush address from both sides rts -Lhpmmu5: -#endif -#if defined(M68K_MMU_HP) - movl sp@(4),d0 | VA to invalidate - bclr #0,d0 | ensure even - movl d0,a0 - movw sr,d1 | go critical - movw #PSL_HIGHIPL,sr | while in purge space - moveq #FC_PURGE,d0 | change address space - movc d0,dfc | for destination - moveq #0,d0 | zero to invalidate? - movsl d0,a0@ | hit it - moveq #FC_USERD,d0 | back to old - movc d0,dfc | address space - movw d1,sr | restore IPL -#endif - rts /* * Invalidate instruction cache @@ -1590,14 +1510,6 @@ ENTRY(DCIA) rts Lmotommu8: #endif -#if defined(M68K_MMU_HP) - tstl _C_LABEL(ectype) | got external VAC? - jle Lnocache2 | no, all done - MMUADDR(a0) - andl #~MMU_CEN,a0@(MMUCMD) | disable cache in MMU control reg - orl #MMU_CEN,a0@(MMUCMD) | reenable cache in MMU control reg -Lnocache2: -#endif rts ENTRY(DCIS) @@ -1608,14 +1520,6 @@ ENTRY(DCIS) rts Lmotommu9: #endif -#if defined(M68K_MMU_HP) - tstl _C_LABEL(ectype) | got external VAC? - jle Lnocache3 | no, all done - MMUADDR(a0) - movl a0@(MMUSSTP),d0 | read the supervisor STP - movl d0,a0@(MMUSSTP) | write it back -Lnocache3: -#endif rts ENTRY(DCIU) @@ -1626,14 +1530,6 @@ ENTRY(DCIU) rts LmotommuA: #endif -#if defined(M68K_MMU_HP) - tstl _C_LABEL(ectype) | got external VAC? - jle Lnocache4 | no, all done - MMUADDR(a0) - movl a0@(MMUUSTP),d0 | read the user STP - movl d0,a0@(MMUUSTP) | write it back -Lnocache4: -#endif rts #if defined(M68040) || defined(CACHE_HAVE_PAC) @@ -1720,9 +1616,6 @@ ENTRY_NOPROFILE(getdfc) * Load a new user segment table pointer. */ ENTRY(loadustp) -#if defined(M68K_MMU_MOTOROLA) - tstl _C_LABEL(mmutype) | HP MMU? - jeq Lhpmmu9 | yes, skip movl sp@(4),d0 | new USTP moveq #PGSHIFT,d1 lsll d1,d0 | convert to addr @@ -1741,21 +1634,6 @@ LmotommuC: movl #CACHE_CLR,d0 movc d0,cacr | invalidate cache(s) rts -Lhpmmu9: -#endif -#if defined(M68K_MMU_HP) - movl #CACHE_CLR,d0 - movc d0,cacr | invalidate cache(s) - MMUADDR(a0) - movl a0@(MMUTBINVAL),d1 | invalid TLB - tstl _C_LABEL(ectype) | have external VAC? - jle 1f - andl #~MMU_CEN,a0@(MMUCMD) | toggle cache enable - orl #MMU_CEN,a0@(MMUCMD) | to clear data cache -1: - movl sp@(4),a0@(MMUUSTP) | load a new USTP -#endif - rts /* * Set processor priority level calls. Most are implemented with @@ -1912,20 +1790,9 @@ Lbootcode: DOREBOOT LmotommuF: #endif -#if defined(M68K_MMU_MOTOROLA) - tstl _C_LABEL(mmutype) | HP MMU? - jeq LhpmmuB | yes, skip movl #0,a0@ | value for pmove to TC (turn off MMU) pmove a0@,tc | disable MMU DOREBOOT -LhpmmuB: -#endif -#if defined(M68K_MMU_HP) - MMUADDR(a0) - movl #0xFFFF0000,a0@(MMUCMD) | totally disable MMU - movl d2,MAXADDR+NBPG-4 | restore old high page contents - DOREBOOT -#endif Lebootcode: /* @@ -1933,13 +1800,13 @@ Lebootcode: */ .data GLOBAL(machineid) - .long HP_320 | default to 320 + .long -1 | default to unknown GLOBAL(mmuid) .long 0 | default to nothing GLOBAL(mmutype) - .long MMU_HP | default to HP MMU + .long 0 | default to unknown GLOBAL(cputype) .long CPU_68020 | default to 68020 CPU @@ -1950,9 +1817,6 @@ GLOBAL(ectype) GLOBAL(fputype) .long FPU_68882 | default to 68882 FPU -GLOBAL(pmap_aliasmask) - .long 0 - ASLOCAL(protorp) .long 0,0 | prototype root pointer diff --git a/sys/arch/hp300/hp300/machdep.c b/sys/arch/hp300/hp300/machdep.c index 52282340dcd..d23ea45a294 100644 --- a/sys/arch/hp300/hp300/machdep.c +++ b/sys/arch/hp300/hp300/machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: machdep.c,v 1.134 2011/09/20 09:49:38 miod Exp $ */ +/* $OpenBSD: machdep.c,v 1.135 2011/11/01 21:20:55 miod Exp $ */ /* $NetBSD: machdep.c,v 1.121 1999/03/26 23:41:29 mycroft Exp $ */ /* @@ -404,9 +404,6 @@ identifycpu() case MMU_68851: strlcat(cpu_model, ", MC68851 MMU", sizeof cpu_model); break; - case MMU_HP: - strlcat(cpu_model, ", HP MMU", sizeof cpu_model); - break; default: printf("%s\nunknown MMU type %d\n", cpu_model, mmutype); panic("startup"); |