ansi and fancy gcc

47 files changed, 1004 insertions, 853 deletions

diff --git a/sys/arch/hppa/spmath/Makefile b/sys/arch/hppa/spmath/Makefile
deleted file mode 100644
index a274875c102..00000000000
--- a/sys/arch/hppa/spmath/Makefile
+++ /dev/null
@@ -1,32 +0,0 @@
-#	$OpenBSD: Makefile,v 1.1 1998/06/23 20:33:49 mickey Exp $
-
-LIB=	spmath
-NOPIC=
-
-MACHINE=	${XMACHINE}
-MACHINE_ARCH=	${XMACHINE_ARCH}
-
-M=	${.CURDIR}/arch/${MACHINE_ARCH}
-
-CPPFLAGS=	-I$M ${KERNCPPFLAGS}
-
-SRCS+=	divu.S impys.S impyu.S dfadd.c dfcmp.c dfdiv.c dfmpy.c dfrem.c \
-	dfsqrt.c dfsub.c divsfm.c divsfr.c divsim.c divsir.c divufr.c \
-	divuir.c fcnvff.c fcnvfx.c fcnvfxt.c fcnvxf.c frnd.c mdrr.c \
-	mpyaccs.c mpyaccu.c mpys.c mpyscv.c mpyu.c mpyucv.c setovfl.c \
-	sfadd.c sfcmp.c sfdiv.c sfmpy.c sfrem.c sfsqrt.c sfsub.c
-
-install:
-
-.include <bsd.lib.mk>
-
-lib${LIB}.o:: ${OBJS}
-	@echo building standard ${LIB} library
-	@rm -f lib${LIB}.o
-	@${LD} -r -o lib${LIB}.o `${LORDER} ${OBJS} | tsort`
-
-POBJS+=	${OBJS:.o=.po}
-lib${LIB}.po:: ${POBJS}
-	@echo building profiled ${LIB} library
-	@rm -f lib${LIB}.po
-	@${LD} -r -o lib${LIB}.po `${LORDER} ${POBJS} | tsort`
diff --git a/sys/arch/hppa/spmath/Makefile.inc b/sys/arch/hppa/spmath/Makefile.inc
deleted file mode 100644
index 871020addda..00000000000
--- a/sys/arch/hppa/spmath/Makefile.inc
+++ /dev/null
@@ -1,40 +0,0 @@
-#	$OpenBSD: Makefile.inc,v 1.1 1998/06/23 20:33:50 mickey Exp $
-#
-#	NOTE: $S must correspond to the top of the 'sys' tree
-
-SPMATHDIR=	$S/arch/hppa/spmath
-
-SPMATHDST?=	${.OBJDIR}/lib/spmath
-SPMATH_AS?=	obj
-
-SPMATHLIB=	${SPMATHDST}/libspmath.o
-SPMATHLIB_PROF=	${SPMATHDST}/libspmath_p.o
-
-SPMATHMAKE= \
-	cd ${SPMATHDIR} && MAKEOBJDIR=${SPMATHDST} ${MAKE} \
-	    CC='${CC}' CFLAGS='${CFLAGS}' \
-	    AS='${AS}' AFLAGS='${AFLAGS}' \
-	    LD='${LD}' STRIP='${STRIP}' \
-	    CPP='${CPP}' STRIP='${STRIP}' AR='${AR}' \
-	    NM='${NM}' LORDER='${LORDER}' \
-	    XMACHINE='${MACHINE}' XMACHINE_ARCH='${MACHINE_ARCH}' \
-	    SPMATHCPPFLAGS='${CPPFLAGS:S@^-I.@-I../../.@g}'
-
-${SPMATHLIB}:		.NOTMAIN __always_make_kernlib
-	@echo making sure the kern library is up to date...
-	@${SPMATHMAKE} libkern.o
-
-${SPMATHLIB_PROF}:	.NOTMAIN __always_make_kernlib
-	@echo making sure the profiled kern library is up to date...
-	@${SPMATHMAKE} libkern.po
-
-clean::			.NOTMAIN __always_make_kernlib
-	@echo cleaning the kern library objects
-	@${SPMATHMAKE} clean
-
-depend:: 		.NOTMAIN __always_make_kernlib
-	@echo depending the kern library objects
-	@${SPMATHMAKE} depend
-
-__always_make_kernlib:	.NOTMAIN
-	-mkdir -p ${SPMATHDST}
diff --git a/sys/arch/hppa/spmath/cnv_float.h b/sys/arch/hppa/spmath/cnv_float.h
index 2e5fcf89ff4..3ecc40bbe9d 100644
--- a/sys/arch/hppa/spmath/cnv_float.h
+++ b/sys/arch/hppa/spmath/cnv_float.h
@@ -1,3 +1,5 @@
+/*	$OpenBSD: cnv_float.h,v 1.3 1998/07/02 19:04:54 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -71,27 +73,27 @@
     ((exponent < (SGL_P - 1)) ?				\
      (Sall(sgl_value) << (SGL_EXP_LENGTH + 1 + exponent)) : FALSE)
 
-#define Int_isinexact_to_sgl(int_value)	(int_value << 33 - SGL_EXP_LENGTH)
+#define Int_isinexact_to_sgl(int_value)	(int_value << (33 - SGL_EXP_LENGTH))
 
 #define Sgl_roundnearest_from_int(int_value,sgl_value)			\
     if (int_value & 1<<(SGL_EXP_LENGTH - 2))   /* round bit */		\
-    	if ((int_value << 34 - SGL_EXP_LENGTH) || Slow(sgl_value))	\
+    	if ((int_value << (34 - SGL_EXP_LENGTH)) || Slow(sgl_value))	\
 		Sall(sgl_value)++
 
 #define Dint_isinexact_to_sgl(dint_valueA,dint_valueB)		\
-    ((Dintp1(dint_valueA) << 33 - SGL_EXP_LENGTH) || Dintp2(dint_valueB))
+    ((Dintp1(dint_valueA) << (33 - SGL_EXP_LENGTH)) || Dintp2(dint_valueB))
 
 #define Sgl_roundnearest_from_dint(dint_valueA,dint_valueB,sgl_value)	\
     if (Dintp1(dint_valueA) & 1<<(SGL_EXP_LENGTH - 2)) 			\
-    	if ((Dintp1(dint_valueA) << 34 - SGL_EXP_LENGTH) ||		\
+    	if ((Dintp1(dint_valueA) << (34 - SGL_EXP_LENGTH)) ||		\
     	Dintp2(dint_valueB) || Slow(sgl_value)) Sall(sgl_value)++
 
 #define Dint_isinexact_to_dbl(dint_value) 	\
-    (Dintp2(dint_value) << 33 - DBL_EXP_LENGTH)
+    (Dintp2(dint_value) << (33 - DBL_EXP_LENGTH))
 
 #define Dbl_roundnearest_from_dint(dint_opndB,dbl_opndA,dbl_opndB) 	\
     if (Dintp2(dint_opndB) & 1<<(DBL_EXP_LENGTH - 2))			\
-       if ((Dintp2(dint_opndB) << 34 - DBL_EXP_LENGTH) || Dlowp2(dbl_opndB))  \
+       if ((Dintp2(dint_opndB) << (34 -DBL_EXP_LENGTH)) || Dlowp2(dbl_opndB))  \
           if ((++Dallp2(dbl_opndB))==0) Dallp1(dbl_opndA)++
 
 #define Sgl_isone_roundbit(sgl_value,exponent)			\
@@ -253,13 +255,13 @@
     {if (exponent < 32) {						\
     	Dintp1(destA) = 0;						\
     	if (exponent <= 20)						\
-    	    Dintp2(destB) = Dallp1(dbl_valueA) >> 20-exponent;		\
+    	    Dintp2(destB) = Dallp1(dbl_valueA) >> (20-(exponent));	\
     	else Variable_shift_double(Dallp1(dbl_valueA),Dallp2(dbl_valueB), \
-	     52-exponent,Dintp2(destB));					\
+	     (52-(exponent)),Dintp2(destB));				\
     }									\
     else {								\
     	if (exponent <= 52) {						\
-    	    Dintp1(destA) = Dallp1(dbl_valueA) >> 52-exponent;		\
+    	    Dintp1(destA) = Dallp1(dbl_valueA) >> (52-(exponent));	\
 	    if (exponent == 52) Dintp2(destB) = Dallp2(dbl_valueB);	\
 	    else Variable_shift_double(Dallp1(dbl_valueA),Dallp2(dbl_valueB), \
 	    52-exponent,Dintp2(destB));					\
@@ -267,7 +269,7 @@
     	else {								\
     	    Variable_shift_double(Dallp1(dbl_valueA),Dallp2(dbl_valueB), \
 	    84-exponent,Dintp1(destA));					\
-    	    Dintp2(destB) = Dallp2(dbl_valueB) << exponent-52;		\
+    	    Dintp2(destB) = Dallp2(dbl_valueB) << ((exponent)-52);	\
     	}								\
     }}
 
@@ -309,11 +311,11 @@
     {						\
 	int var;				\
 	for (var=8; var >=1; var >>= 1) {	\
-	    if (value >> 32 - position)		\
+	    if (value >> (32 - position))	\
 		position -= var;		\
 		else position += var;		\
 	}					\
-	if ((value >> 32 - position) == 0)	\
+	if ((value >> (32 - position)) == 0)	\
 	    position--;				\
 	else position -= 2;			\
     }
@@ -412,3 +414,20 @@
 	return(NOEXCEPTION);			\
     }
 
+int sgl_to_sgl_fcnvfx __P((sgl_floating_point *, sgl_floating_point *, int *, sgl_floating_point *));
+int sgl_to_dbl_fcnvfx __P((sgl_floating_point *, void *, dbl_integer *, unsigned int *));
+int dbl_to_sgl_fcnvfx __P((dbl_floating_point *, void *, int *, unsigned int *));
+int dbl_to_dbl_fcnvfx __P((dbl_floating_point *, void *, dbl_integer *, unsigned int *));
+
+int sgl_to_sgl_fcnvfxt __P((sgl_floating_point *, void *, int *, unsigned int *));
+int sgl_to_dbl_fcnvfxt __P((sgl_floating_point *, void *, dbl_integer *, unsigned int *));
+int dbl_to_sgl_fcnvfxt __P((dbl_floating_point *, void *, int *, unsigned int *));
+int dbl_to_dbl_fcnvfxt __P((dbl_floating_point *, void *, dbl_integer *, unsigned int *));
+
+int sgl_to_sgl_fcnvxf __P((int *, void *, sgl_floating_point *, unsigned int *));
+int sgl_to_dbl_fcnvxf __P((int *, void *, dbl_floating_point *, unsigned int *));
+int dbl_to_sgl_fcnvxf __P((dbl_integer *, void *, sgl_floating_point *, unsigned int *));
+int dbl_to_dbl_fcnvxf __P((dbl_integer *, void *, dbl_floating_point *, unsigned int *));
+
+
+
diff --git a/sys/arch/hppa/spmath/dbl_float.h b/sys/arch/hppa/spmath/dbl_float.h
index 858fcf85735..4a8fa70fa82 100644
--- a/sys/arch/hppa/spmath/dbl_float.h
+++ b/sys/arch/hppa/spmath/dbl_float.h
@@ -1,3 +1,5 @@
+/*	$OpenBSD: dbl_float.h,v 1.3 1998/07/02 19:04:56 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -35,6 +37,9 @@
  * Hewlett-Packard Company makes no representations about the 
  * suitability of this software for any purpose.
  */
+
+#include <sys/cdefs.h>
+
 /**************************************
  * Declare double precision functions *
  **************************************/
@@ -91,14 +96,14 @@
 /* varamount must be less than 64 */
 #define Dbl_rightshift_exponentmantissa(srcdstA, srcdstB, varamount)	\
     {if((varamount) >= 32) {						\
-        Dallp2(srcdstB) = Dexponentmantissap1(srcdstA) >> (varamount-32); \
+        Dallp2(srcdstB) = Dexponentmantissap1(srcdstA) >> ((varamount)-32); \
 	Dallp1(srcdstA) &= (1<<31);  /* clear exponentmantissa field */ \
     }									\
     else if(varamount > 0) {						\
 	Variable_shift_double(Dexponentmantissap1(srcdstA), Dallp2(srcdstB), \
 	(varamount), Dallp2(srcdstB));					\
 	Deposit_dexponentmantissap1(srcdstA,				\
-	    (Dexponentmantissap1(srcdstA)>>varamount));			\
+	    (Dexponentmantissap1(srcdstA)>>(varamount)));			\
     } }
 /* varamount must be less than 64 */
 #define Dbl_leftshift(srcdstA, srcdstB, varamount)			\
@@ -372,7 +377,7 @@
 		{							\
 	        Variable_shift_double(Dallp1(srcdstA),Dallp2(srcdstB),	\
 		 shift-32, Extall(extent));				\
-	        if(Dallp2(srcdstB) << 64 - (shift)) Ext_setone_low(extent); \
+	        if(Dallp2(srcdstB) << (64 - (shift))) Ext_setone_low(extent); \
 	        }							\
 	    else Extall(extent) = Dallp2(srcdstB);			\
 	    Dallp2(srcdstB) = Dallp1(srcdstA) >> (shift - 32);		\
@@ -390,7 +395,7 @@
 	/* Small alignment is simpler.  Extension is easily set. */	\
 	if (shift > 0)							\
 	    {								\
-	    Extall(extent) = Dallp2(srcdstB) << 32 - (shift);		\
+	    Extall(extent) = Dallp2(srcdstB) << (32 - (shift));		\
 	    Variable_shift_double(Dallp1(srcdstA),Dallp2(srcdstB),shift, \
 	     Dallp2(srcdstB));						\
 	    Dallp1(srcdstA) >>= shift;					\
@@ -403,8 +408,8 @@
  * (due to the exponent becoming negative) during normalization.
  */
 #define Dbl_fix_overshift(srcdstA,srcdstB,shift,extent)			\
-	    Extall(extent) = Dallp2(srcdstB) << 32 - (shift);		\
-	    Dallp2(srcdstB) = (Dallp1(srcdstA) << 32 - (shift)) |	\
+	    Extall(extent) = Dallp2(srcdstB) << (32 - (shift));		\
+	    Dallp2(srcdstB) = (Dallp1(srcdstA) << (32 - (shift))) |	\
 		(Dallp2(srcdstB) >> (shift));				\
 	    Dallp1(srcdstA) = Dallp1(srcdstA) >> shift
 
@@ -519,7 +524,7 @@
     Dbl_clear_signexponent_set_hidden(opndp1);				\
     if (exponent >= (1-DBL_P)) {					\
 	if (exponent >= -31) {						\
-	    guard = (Dallp2(opndp2) >> -exponent) & 1;			\
+	    guard = (Dallp2(opndp2) >> (-(exponent))) & 1;		\
 	    if (exponent < 0) sticky |= Dallp2(opndp2) << (32+exponent); \
 	    if (exponent > -31) {					\
 		Variable_shift_double(opndp1,opndp2,1-exponent,opndp2);	\
@@ -531,10 +536,10 @@
 	    }								\
 	}								\
 	else {								\
-	    guard = (Dallp1(opndp1) >> -32-exponent) & 1;		\
+	    guard = (Dallp1(opndp1) >> (-32-(exponent))) & 1;		\
 	    if (exponent == -32) sticky |= Dallp2(opndp2);		\
-	    else sticky |= (Dallp2(opndp2) | Dallp1(opndp1) << 64+exponent); \
-	    Dallp2(opndp2) = Dallp1(opndp1) >> -31-exponent;		\
+	    else sticky |= (Dallp2(opndp2) | Dallp1(opndp1) << (64+(exponent))); \
+	    Dallp2(opndp2) = Dallp1(opndp1) >> (-31-(exponent));	\
 	    Dbl_setzerop1(opndp1);					\
 	}								\
 	inexact = guard | sticky;					\
@@ -545,3 +550,19 @@
 	Dbl_setzero(opndp1,opndp2);					\
 	inexact = sticky;						\
     }
+
+
+int dbl_fadd __P((dbl_floating_point *, dbl_floating_point*, dbl_floating_point*, unsigned int *));
+int dbl_fcmp __P((dbl_floating_point *, dbl_floating_point*, unsigned int, unsigned int *));
+int dbl_fdiv __P((dbl_floating_point *, dbl_floating_point *, dbl_floating_point *, unsigned int *));
+int dbl_fmpy __P((dbl_floating_point *, dbl_floating_point *, dbl_floating_point*, unsigned int *));
+int dbl_frem __P((dbl_floating_point *, dbl_floating_point *, dbl_floating_point*, unsigned int *));
+int dbl_fsqrt __P((dbl_floating_point *, void *, dbl_floating_point *, unsigned int *));
+int dbl_fsub __P((dbl_floating_point *, dbl_floating_point *, dbl_floating_point*, unsigned int *));
+
+dbl_floating_point dbl_setoverflow __P((unsigned int));
+
+int sgl_to_dbl_fcnvff __P((sgl_floating_point *, void *, dbl_floating_point *, unsigned int *));
+int dbl_to_sgl_fcnvff __P((dbl_floating_point *, void *, sgl_floating_point *, unsigned int *));
+
+int dbl_frnd __P((dbl_floating_point *, void *, dbl_floating_point *, unsigned int *));
diff --git a/sys/arch/hppa/spmath/dfadd.c b/sys/arch/hppa/spmath/dfadd.c
index 6250810fb6a..1ba54688175 100644
--- a/sys/arch/hppa/spmath/dfadd.c
+++ b/sys/arch/hppa/spmath/dfadd.c
@@ -1,3 +1,5 @@
+/*	$OpenBSD: dfadd.c,v 1.3 1998/07/02 19:04:57 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -42,6 +44,7 @@
 /*
  * Double_add: add two double precision values.
  */
+int
 dbl_fadd(leftptr, rightptr, dstptr, status)
     dbl_floating_point *leftptr, *rightptr, *dstptr;
     unsigned int *status;
@@ -496,10 +499,12 @@ dbl_fadd(leftptr, rightptr, dstptr, status)
 	    {
 	    Dbl_setwrapped_exponent(resultp1,result_exponent,ovfl);
 	    Dbl_copytoptr(resultp1,resultp2,dstptr);
-	    if (inexact)
+	    if (inexact) {
 		if (Is_inexacttrap_enabled())
 			return(OVERFLOWEXCEPTION | INEXACTEXCEPTION);
-		else Set_inexactflag();
+		else
+			Set_inexactflag();
+	    }
 	    return(OVERFLOWEXCEPTION);
 	    }
         else
@@ -511,9 +516,11 @@ dbl_fadd(leftptr, rightptr, dstptr, status)
 	}
     else Dbl_set_exponent(resultp1,result_exponent);
     Dbl_copytoptr(resultp1,resultp2,dstptr);
-    if(inexact) 
+    if(inexact) {
 	if(Is_inexacttrap_enabled())
 	    return(INEXACTEXCEPTION);
-	else Set_inexactflag();
+	else
+	    Set_inexactflag();
+    }
     return(NOEXCEPTION);
     }
diff --git a/sys/arch/hppa/spmath/dfcmp.c b/sys/arch/hppa/spmath/dfcmp.c
index 27c110ccdcb..30e083d428f 100644
--- a/sys/arch/hppa/spmath/dfcmp.c
+++ b/sys/arch/hppa/spmath/dfcmp.c
@@ -1,3 +1,5 @@
+/*	$OpenBSD: dfcmp.c,v 1.3 1998/07/02 19:04:59 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -43,6 +45,7 @@
 /*
  * dbl_cmp: compare two values
  */
+int
 dbl_fcmp(leftptr, rightptr, cond, status)
     dbl_floating_point *leftptr, *rightptr;
     unsigned int cond; /* The predicate to be tested */
diff --git a/sys/arch/hppa/spmath/dfdiv.c b/sys/arch/hppa/spmath/dfdiv.c
index 66ec174af07..57b183c6cef 100644
--- a/sys/arch/hppa/spmath/dfdiv.c
+++ b/sys/arch/hppa/spmath/dfdiv.c
@@ -1,3 +1,5 @@
+/*	$OpenBSD: dfdiv.c,v 1.3 1998/07/02 19:05:00 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -44,6 +46,7 @@
  *  Double Precision Floating-point Divide
  */
 
+int
 dbl_fdiv(srcptr1,srcptr2,dstptr,status)
 
 dbl_floating_point *srcptr1, *srcptr2, *dstptr;
@@ -295,10 +298,12 @@ unsigned int *status;
                          */
                         Dbl_setwrapped_exponent(resultp1,dest_exponent,ovfl);
                         Dbl_copytoptr(resultp1,resultp2,dstptr);
-                        if (inexact) 
+                        if (inexact) {
                             if (Is_inexacttrap_enabled())
                                 return(OVERFLOWEXCEPTION | INEXACTEXCEPTION);
-                            else Set_inexactflag();
+                            else
+				Set_inexactflag();
+			}
                         return(OVERFLOWEXCEPTION);
                 }
 		Set_overflowflag();
@@ -317,10 +322,12 @@ unsigned int *status;
                          */
                         Dbl_setwrapped_exponent(resultp1,dest_exponent,unfl);
                         Dbl_copytoptr(resultp1,resultp2,dstptr);
-                        if (inexact) 
+                        if (inexact) {
                             if (Is_inexacttrap_enabled())
                                 return(UNDERFLOWEXCEPTION | INEXACTEXCEPTION);
-                            else Set_inexactflag();
+                            else
+				Set_inexactflag();
+			}
                         return(UNDERFLOWEXCEPTION);
                 }
 
diff --git a/sys/arch/hppa/spmath/dfmpy.c b/sys/arch/hppa/spmath/dfmpy.c
index 1fccee04bb2..ab14101d1e1 100644
--- a/sys/arch/hppa/spmath/dfmpy.c
+++ b/sys/arch/hppa/spmath/dfmpy.c
@@ -1,3 +1,5 @@
+/*	$OpenBSD: dfmpy.c,v 1.3 1998/07/02 19:05:01 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -44,6 +46,7 @@
  *  Double Precision Floating-point Multiply
  */
 
+int
 dbl_fmpy(srcptr1,srcptr2,dstptr,status)
 
 dbl_floating_point *srcptr1, *srcptr2, *dstptr;
@@ -287,10 +290,12 @@ unsigned int *status;
                          */
 			Dbl_setwrapped_exponent(resultp1,dest_exponent,ovfl);
 			Dbl_copytoptr(resultp1,resultp2,dstptr);
-			if (inexact) 
+			if (inexact) {
 			    if (Is_inexacttrap_enabled())
 				return (OVERFLOWEXCEPTION | INEXACTEXCEPTION);
-			    else Set_inexactflag();
+			    else
+				Set_inexactflag();
+			}
 			return (OVERFLOWEXCEPTION);
                 }
 		inexact = TRUE;
@@ -309,10 +314,12 @@ unsigned int *status;
                          */
 			Dbl_setwrapped_exponent(resultp1,dest_exponent,unfl);
 			Dbl_copytoptr(resultp1,resultp2,dstptr);
-			if (inexact) 
+			if (inexact) {
 			    if (Is_inexacttrap_enabled())
 				return (UNDERFLOWEXCEPTION | INEXACTEXCEPTION);
-			    else Set_inexactflag();
+			    else
+				Set_inexactflag();
+			}
 			return (UNDERFLOWEXCEPTION);
                 }
 
diff --git a/sys/arch/hppa/spmath/dfrem.c b/sys/arch/hppa/spmath/dfrem.c
index 92abcc446dc..d1779792d16 100644
--- a/sys/arch/hppa/spmath/dfrem.c
+++ b/sys/arch/hppa/spmath/dfrem.c
@@ -1,3 +1,5 @@
+/*	$OpenBSD: dfrem.c,v 1.3 1998/07/02 19:05:03 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -44,7 +46,7 @@
 /*
  *  Double Precision Floating-point Remainder
  */
-
+int
 dbl_frem(srcptr1,srcptr2,dstptr,status)
 
 dbl_floating_point *srcptr1, *srcptr2, *dstptr;
diff --git a/sys/arch/hppa/spmath/dfsqrt.c b/sys/arch/hppa/spmath/dfsqrt.c
index 91b258d64e7..5af5cfa36fa 100644
--- a/sys/arch/hppa/spmath/dfsqrt.c
+++ b/sys/arch/hppa/spmath/dfsqrt.c
@@ -1,3 +1,5 @@
+/*	$OpenBSD: dfsqrt.c,v 1.3 1998/07/02 19:05:04 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -45,10 +47,12 @@
  */
 
 /*ARGSUSED*/
+int
 dbl_fsqrt(srcptr,nullptr,dstptr,status)
 
 dbl_floating_point *srcptr, *dstptr;
-unsigned int *nullptr, *status;
+void *nullptr;
+unsigned int *status;
 {
 	register unsigned int srcp1, srcp2, resultp1, resultp2;
 	register unsigned int newbitp1, newbitp2, sump1, sump2;
diff --git a/sys/arch/hppa/spmath/dfsub.c b/sys/arch/hppa/spmath/dfsub.c
index f5d57508abe..99a24ad4fbc 100644
--- a/sys/arch/hppa/spmath/dfsub.c
+++ b/sys/arch/hppa/spmath/dfsub.c
@@ -1,3 +1,5 @@
+/*	$OpenBSD: dfsub.c,v 1.3 1998/07/02 19:05:08 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -43,6 +45,7 @@
 /*
  * Double_subtract: subtract two double precision values.
  */
+int
 dbl_fsub(leftptr, rightptr, dstptr, status)
     dbl_floating_point *leftptr, *rightptr, *dstptr;
     unsigned int *status;
@@ -499,10 +502,12 @@ dbl_fsub(leftptr, rightptr, dstptr, status)
 	    {
 	    Dbl_setwrapped_exponent(resultp1,result_exponent,ovfl);
 	    Dbl_copytoptr(resultp1,resultp2,dstptr);
-	    if (inexact)
-	    if (Is_inexacttrap_enabled())
-		return(OVERFLOWEXCEPTION | INEXACTEXCEPTION);
-		else Set_inexactflag();
+	    if (inexact) {
+	        if (Is_inexacttrap_enabled())
+		    return(OVERFLOWEXCEPTION | INEXACTEXCEPTION);
+		else
+		    Set_inexactflag();
+	    }
 	    return(OVERFLOWEXCEPTION);
 	    }
         else
@@ -514,8 +519,11 @@ dbl_fsub(leftptr, rightptr, dstptr, status)
 	}
     else Dbl_set_exponent(resultp1,result_exponent);
     Dbl_copytoptr(resultp1,resultp2,dstptr);
-    if(inexact) 
-	if(Is_inexacttrap_enabled()) return(INEXACTEXCEPTION);
-	else Set_inexactflag();
+    if(inexact) {
+	if(Is_inexacttrap_enabled())
+		return(INEXACTEXCEPTION);
+	else
+		Set_inexactflag();
+    }
     return(NOEXCEPTION);
     }
diff --git a/sys/arch/hppa/spmath/divsfm.c b/sys/arch/hppa/spmath/divsfm.c
index 04d61997563..89a395d33aa 100644
--- a/sys/arch/hppa/spmath/divsfm.c
+++ b/sys/arch/hppa/spmath/divsfm.c
@@ -1,3 +1,5 @@
+/*	$OpenBSD: divsfm.c,v 1.3 1998/07/02 19:05:09 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -38,9 +40,10 @@
  */
 
 
-#include "../spmath/md.h"
+#include "md.h"
 
-VOID divsfm(opnd1,opnd2,result)
+void
+divsfm(opnd1,opnd2,result)
 
 int opnd1, opnd2;
 struct mdsfu_register *result;
diff --git a/sys/arch/hppa/spmath/divsfr.c b/sys/arch/hppa/spmath/divsfr.c
index e6fc272bf59..c32bb32a611 100644
--- a/sys/arch/hppa/spmath/divsfr.c
+++ b/sys/arch/hppa/spmath/divsfr.c
@@ -1,3 +1,5 @@
+/*	$OpenBSD: divsfr.c,v 1.3 1998/07/02 19:05:10 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -38,9 +40,10 @@
  */
 
 
-#include "../spmath/md.h"
+#include "md.h"
 
-VOID divsfr(opnd1,opnd2,result)
+void
+divsfr(opnd1,opnd2,result)
 
 int opnd1, opnd2;
 struct mdsfu_register *result;
diff --git a/sys/arch/hppa/spmath/divsim.c b/sys/arch/hppa/spmath/divsim.c
index 165e2e01827..fe3a56d15e3 100644
--- a/sys/arch/hppa/spmath/divsim.c
+++ b/sys/arch/hppa/spmath/divsim.c
@@ -1,3 +1,5 @@
+/*	$OpenBSD: divsim.c,v 1.3 1998/07/02 19:05:12 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -38,9 +40,10 @@
  */
 
 
-#include "../spmath/md.h"
+#include "md.h"
 
-VOID divsim(opnd1,opnd2,result)
+void
+divsim(opnd1,opnd2,result)
 
 int opnd1, opnd2;
 struct mdsfu_register *result;
diff --git a/sys/arch/hppa/spmath/divsir.c b/sys/arch/hppa/spmath/divsir.c
index 33e1223d21b..0f71f9b8d86 100644
--- a/sys/arch/hppa/spmath/divsir.c
+++ b/sys/arch/hppa/spmath/divsir.c
@@ -1,3 +1,5 @@
+/*	$OpenBSD: divsir.c,v 1.3 1998/07/02 19:05:13 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -40,7 +42,8 @@
 
 #include "../spmath/md.h"
 
-VOID divsir(opnd1,opnd2,result)
+void
+divsir(opnd1,opnd2,result)
 
 int opnd1, opnd2;
 struct mdsfu_register *result;
diff --git a/sys/arch/hppa/spmath/divu.S b/sys/arch/hppa/spmath/divu.S
index c1331c6080f..48bbfda54f9 100644
--- a/sys/arch/hppa/spmath/divu.S
+++ b/sys/arch/hppa/spmath/divu.S
@@ -1,3 +1,5 @@
+/*	$OpenBSD: divu.S,v 1.3 1998/07/02 19:05:14 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -47,130 +49,123 @@
 /*
  *	General registers
  */
-gr0	.equ		0	/* General register zero */
-rem	.equ		3	/* remainder and upper part of dividend */
-quo	.equ		4	/* quotient and lower part of dividend */
-dvr	.equ		5	/* divisor */
-tp	.equ		6	/* temp. reg. */
-
-/*****************************************************************************/
-	.export divu,entry
-	.space $TEXT$
-	.subspa $CODE$
-	.align 4
-	.proc
-	.callinfo
+gr0	.reg		%r0	/* General register zero */
+rem	.reg		%r3	/* remainder and upper part of dividend */
+quo	.reg		%r4	/* quotient and lower part of dividend */
+dvr	.reg		%r5	/* divisor */
+tp	.reg		%r6	/* temp. reg. */
 
 /*****************************************************************************/
-divu	stws,ma		rem,4(sp)		# save registers on stack
-	stws,ma		quo,4(sp)		# save registers on stack
-	stws,ma		dvr,4(sp)		# save registers on stack
-	stws,ma		tp,4(sp)		# save registers on stack
+ENTRY(divu)
+	stws,ma		rem,4(sp)		; save registers on stack
+	stws,ma		quo,4(sp)		; save registers on stack
+	stws,ma		dvr,4(sp)		; save registers on stack
+	stws,ma		tp,4(sp)		; save registers on stack
 
-	addi		0,arg2,dvr		# get divisor
-	addi		0,arg1,quo		# get lower dividend
-	addi		0,arg0,rem		# get upper dividend
+	addi		0,arg2,dvr		; get divisor
+	addi		0,arg1,quo		; get lower dividend
+	addi		0,arg0,rem		; get upper dividend
 
-	comib,>,n	0,dvr,hibit		# check for dvr >= 2**31
-	addi		-1,gr0,tp		# set V-bit to 1
+	comib,>,n	0,dvr,hibit		; check for dvr >= 2**31
+	addi		-1,gr0,tp		; set V-bit to 1
 	ds		0,tp,0
-	add		quo,quo,quo		# shift msb bit into carry
-	ds		rem,dvr,rem		# 1st divide step, if carry
-						#   out, msb of quotient = 0
-	addc		quo,quo,quo		# shift quo with/into carry
-	ds		rem,dvr,rem		# 2nd divide step
-	addc		quo,quo,quo		# shift quo with/into carry
-	ds		rem,dvr,rem		# 3rd divide step
-	addc		quo,quo,quo		# shift quo with/into carry
-	ds		rem,dvr,rem		# 4th divide step
-	addc		quo,quo,quo		# shift quo with/into carry
-	ds		rem,dvr,rem		# 5th divide step
-	addc		quo,quo,quo		# shift quo with/into carry
-	ds		rem,dvr,rem		# 6th divide step
-	addc		quo,quo,quo		# shift quo with/into carry
-	ds		rem,dvr,rem		# 7th divide step
-	addc		quo,quo,quo		# shift quo with/into carry
-	ds		rem,dvr,rem		# 8th divide step
-	addc		quo,quo,quo		# shift quo with/into carry
-	ds		rem,dvr,rem		# 9th divide step
-	addc		quo,quo,quo		# shift quo with/into carry
-	ds		rem,dvr,rem		# 10th divide step
-	addc		quo,quo,quo		# shift quo with/into carry
-	ds		rem,dvr,rem		# 11th divide step
-	addc		quo,quo,quo		# shift quo with/into carry
-	ds		rem,dvr,rem		# 12th divide step
-	addc		quo,quo,quo		# shift quo with/into carry
-	ds		rem,dvr,rem		# 13th divide step
-	addc		quo,quo,quo		# shift quo with/into carry
-	ds		rem,dvr,rem		# 14th divide step
-	addc		quo,quo,quo		# shift quo with/into carry
-	ds		rem,dvr,rem		# 15th divide step
-	addc		quo,quo,quo		# shift quo with/into carry
-	ds		rem,dvr,rem		# 16th divide step
-	addc		quo,quo,quo		# shift quo with/into carry
-	ds		rem,dvr,rem		# 17th divide step
-	addc		quo,quo,quo		# shift quo with/into carry
-	ds		rem,dvr,rem		# 18th divide step
-	addc		quo,quo,quo		# shift quo with/into carry
-	ds		rem,dvr,rem		# 19th divide step
-	addc		quo,quo,quo		# shift quo with/into carry
-	ds		rem,dvr,rem		# 20th divide step
-	addc		quo,quo,quo		# shift quo with/into carry
-	ds		rem,dvr,rem		# 21st divide step
-	addc		quo,quo,quo		# shift quo with/into carry
-	ds		rem,dvr,rem		# 22nd divide step
-	addc		quo,quo,quo		# shift quo with/into carry
-	ds		rem,dvr,rem		# 23rd divide step
-	addc		quo,quo,quo		# shift quo with/into carry
-	ds		rem,dvr,rem		# 24th divide step
-	addc		quo,quo,quo		# shift quo with/into carry
-	ds		rem,dvr,rem		# 25th divide step
-	addc		quo,quo,quo		# shift quo with/into carry
-	ds		rem,dvr,rem		# 26th divide step
-	addc		quo,quo,quo		# shift quo with/into carry
-	ds		rem,dvr,rem		# 27th divide step
-	addc		quo,quo,quo		# shift quo with/into carry
-	ds		rem,dvr,rem		# 28th divide step
-	addc		quo,quo,quo		# shift quo with/into carry
-	ds		rem,dvr,rem		# 29th divide step
-	addc		quo,quo,quo		# shift quo with/into carry
-	ds		rem,dvr,rem		# 30th divide step
-	addc		quo,quo,quo		# shift quo with/into carry
-	ds		rem,dvr,rem		# 31st divide step
-	addc		quo,quo,quo		# shift quo with/into carry
-	ds		rem,dvr,rem		# 32nd divide step,
-	addc		quo,quo,quo		# shift last quo bit into quo
-	addb,>=,n	rem,0,finish		# branch if pos. rem
-	add,<		dvr,0,0			# if dvr > 0, add dvr
-	add,tr		rem,dvr,rem		#   for correcting rem.
-	sub		rem,dvr,rem		# else subtract dvr
-#
-#	end of divide routine
-#
-finish	stws		rem,0(arg3)		# save remainder in high part 
-						#   of result
-	stws		quo,4(arg3)		# save quotient in low part 
-						#   of result
-	ldws,mb		-4(sp),tp		# restore registers
-	ldws,mb		-4(sp),dvr		# restore registers
-	ldws,mb		-4(sp),quo		# restore registers
-	bv		0(rp)			# return
-	ldws,mb		-4(sp),rem		# restore registers
-#
-hibit	ldo		32(0),tp		# initialize loop counter
-	add		quo,quo,quo		# shift high bit into carry
-loop	addc		rem,rem,rem		# shift in high bit of dvdl
-	addc,<>		0,0,0			# if bit shifted out of dvdu,
-						#   want to do subtract
-	comb,<<,n	rem,dvr,nosub		# if upper dividend > dvr,
-	sub		rem,dvr,rem		#   subtract and
-	add,tr		dvr,dvr,0		#   set carry
-nosub	addi		0,0,0			# otherwise clear carry
-	addib,>		-1,tp,loop		# inc. counter# finished?
-	addc		quo,quo,quo		# shift bit of result into dvdl
-	b		finish+4		# finish up
-	stws		rem,0(arg3)		# save remainder in high part 
-						#   of result
+	add		quo,quo,quo		; shift msb bit into carry
+	ds		rem,dvr,rem		; 1st divide step, if carry
+						;   out, msb of quotient = 0
+	addc		quo,quo,quo		; shift quo with/into carry
+	ds		rem,dvr,rem		; 2nd divide step
+	addc		quo,quo,quo		; shift quo with/into carry
+	ds		rem,dvr,rem		; 3rd divide step
+	addc		quo,quo,quo		; shift quo with/into carry
+	ds		rem,dvr,rem		; 4th divide step
+	addc		quo,quo,quo		; shift quo with/into carry
+	ds		rem,dvr,rem		; 5th divide step
+	addc		quo,quo,quo		; shift quo with/into carry
+	ds		rem,dvr,rem		; 6th divide step
+	addc		quo,quo,quo		; shift quo with/into carry
+	ds		rem,dvr,rem		; 7th divide step
+	addc		quo,quo,quo		; shift quo with/into carry
+	ds		rem,dvr,rem		; 8th divide step
+	addc		quo,quo,quo		; shift quo with/into carry
+	ds		rem,dvr,rem		; 9th divide step
+	addc		quo,quo,quo		; shift quo with/into carry
+	ds		rem,dvr,rem		; 10th divide step
+	addc		quo,quo,quo		; shift quo with/into carry
+	ds		rem,dvr,rem		; 11th divide step
+	addc		quo,quo,quo		; shift quo with/into carry
+	ds		rem,dvr,rem		; 12th divide step
+	addc		quo,quo,quo		; shift quo with/into carry
+	ds		rem,dvr,rem		; 13th divide step
+	addc		quo,quo,quo		; shift quo with/into carry
+	ds		rem,dvr,rem		; 14th divide step
+	addc		quo,quo,quo		; shift quo with/into carry
+	ds		rem,dvr,rem		; 15th divide step
+	addc		quo,quo,quo		; shift quo with/into carry
+	ds		rem,dvr,rem		; 16th divide step
+	addc		quo,quo,quo		; shift quo with/into carry
+	ds		rem,dvr,rem		; 17th divide step
+	addc		quo,quo,quo		; shift quo with/into carry
+	ds		rem,dvr,rem		; 18th divide step
+	addc		quo,quo,quo		; shift quo with/into carry
+	ds		rem,dvr,rem		; 19th divide step
+	addc		quo,quo,quo		; shift quo with/into carry
+	ds		rem,dvr,rem		; 20th divide step
+	addc		quo,quo,quo		; shift quo with/into carry
+	ds		rem,dvr,rem		; 21st divide step
+	addc		quo,quo,quo		; shift quo with/into carry
+	ds		rem,dvr,rem		; 22nd divide step
+	addc		quo,quo,quo		; shift quo with/into carry
+	ds		rem,dvr,rem		; 23rd divide step
+	addc		quo,quo,quo		; shift quo with/into carry
+	ds		rem,dvr,rem		; 24th divide step
+	addc		quo,quo,quo		; shift quo with/into carry
+	ds		rem,dvr,rem		; 25th divide step
+	addc		quo,quo,quo		; shift quo with/into carry
+	ds		rem,dvr,rem		; 26th divide step
+	addc		quo,quo,quo		; shift quo with/into carry
+	ds		rem,dvr,rem		; 27th divide step
+	addc		quo,quo,quo		; shift quo with/into carry
+	ds		rem,dvr,rem		; 28th divide step
+	addc		quo,quo,quo		; shift quo with/into carry
+	ds		rem,dvr,rem		; 29th divide step
+	addc		quo,quo,quo		; shift quo with/into carry
+	ds		rem,dvr,rem		; 30th divide step
+	addc		quo,quo,quo		; shift quo with/into carry
+	ds		rem,dvr,rem		; 31st divide step
+	addc		quo,quo,quo		; shift quo with/into carry
+	ds		rem,dvr,rem		; 32nd divide step,
+	addc		quo,quo,quo		; shift last quo bit into quo
+	addb,>=,n	rem,0,finish		; branch if pos. rem
+	add,<		dvr,0,0			; if dvr > 0, add dvr
+	add,tr		rem,dvr,rem		;   for correcting rem.
+	sub		rem,dvr,rem		; else subtract dvr
+;
+;	end of divide routine
+;
+finish	stws		rem,0(arg3)		; save remainder in high part 
+						;   of result
+	stws		quo,4(arg3)		; save quotient in low part 
+						;   of result
+	ldws,mb		-4(sp),tp		; restore registers
+	ldws,mb		-4(sp),dvr		; restore registers
+	ldws,mb		-4(sp),quo		; restore registers
+	bv		0(rp)			; return
+	ldws,mb		-4(sp),rem		; restore registers
+;
+hibit	ldo		32(0),tp		; initialize loop counter
+	add		quo,quo,quo		; shift high bit into carry
+loop	addc		rem,rem,rem		; shift in high bit of dvdl
+	addc,<>		0,0,0			; if bit shifted out of dvdu,
+						;   want to do subtract
+	comb,<<,n	rem,dvr,nosub		; if upper dividend > dvr,
+	sub		rem,dvr,rem		;   subtract and
+	add,tr		dvr,dvr,0		;   set carry
+nosub	addi		0,0,0			; otherwise clear carry
+	addib,>		-1,tp,loop		; inc. counter; finished?
+	addc		quo,quo,quo		; shift bit of result into dvdl
+	b		finish+4		; finish up
+	stws		rem,0(arg3)		; save remainder in high part 
+						;   of result
 
-	.procend
+EXIT(divu)
 	.end
diff --git a/sys/arch/hppa/spmath/divufr.c b/sys/arch/hppa/spmath/divufr.c
index 04ebde894f0..1643752ec6c 100644
--- a/sys/arch/hppa/spmath/divufr.c
+++ b/sys/arch/hppa/spmath/divufr.c
@@ -1,3 +1,5 @@
+/*	$OpenBSD: divufr.c,v 1.3 1998/07/02 19:05:16 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -40,7 +42,8 @@
 
 #include "../spmath/md.h"
 
-VOID divufr(opnd1,opnd2,result)
+void
+divufr(opnd1,opnd2,result)
 
 unsigned int opnd1, opnd2;
 struct mdsfu_register *result;
diff --git a/sys/arch/hppa/spmath/divuir.c b/sys/arch/hppa/spmath/divuir.c
index b78cb14c67f..b7e758ae10e 100644
--- a/sys/arch/hppa/spmath/divuir.c
+++ b/sys/arch/hppa/spmath/divuir.c
@@ -1,3 +1,5 @@
+/*	$OpenBSD: divuir.c,v 1.3 1998/07/02 19:05:17 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -40,7 +42,8 @@
 
 #include "../spmath/md.h"
 
-VOID divuir(opnd1,opnd2,result)
+void
+divuir(opnd1,opnd2,result)
 
 unsigned int opnd1, opnd2;
 struct mdsfu_register *result;
diff --git a/sys/arch/hppa/spmath/fcnvff.c b/sys/arch/hppa/spmath/fcnvff.c
index 5d6830b0d3c..9db752b0886 100644
--- a/sys/arch/hppa/spmath/fcnvff.c
+++ b/sys/arch/hppa/spmath/fcnvff.c
@@ -1,3 +1,5 @@
+/*	$OpenBSD: fcnvff.c,v 1.3 1998/07/02 19:05:18 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -46,11 +48,13 @@
  *  Single Floating-point to Double Floating-point 
  */
 /*ARGSUSED*/
+int
 sgl_to_dbl_fcnvff(srcptr,nullptr,dstptr,status)
 
 sgl_floating_point *srcptr;
 dbl_floating_point *dstptr;
-unsigned int *nullptr, *status;
+void *nullptr;
+unsigned int *status;
 {
 	register unsigned int src, resultp1, resultp2;
 	register int src_exponent;
@@ -132,11 +136,13 @@ unsigned int *nullptr, *status;
  *  Double Floating-point to Single Floating-point 
  */
 /*ARGSUSED*/
+int
 dbl_to_sgl_fcnvff(srcptr,nullptr,dstptr,status)
 
 dbl_floating_point *srcptr;
 sgl_floating_point *dstptr;
-unsigned int *nullptr, *status;
+void *nullptr;
+unsigned int *status;
 {
         register unsigned int srcp1, srcp2, result;
         register int src_exponent, dest_exponent, dest_mantissa;
@@ -252,10 +258,12 @@ unsigned int *nullptr, *status;
                          */
 			Sgl_setwrapped_exponent(result,dest_exponent,ovfl);
 			*dstptr = result;
-			if (inexact) 
+			if (inexact) {
 			    if (Is_inexacttrap_enabled())
 				return(OVERFLOWEXCEPTION|INEXACTEXCEPTION);
-			    else Set_inexactflag();
+			    else
+				Set_inexactflag();
+			}
                         return(OVERFLOWEXCEPTION);
                 }
                 Set_overflowflag();
@@ -279,10 +287,12 @@ unsigned int *nullptr, *status;
                          */
 			Sgl_setwrapped_exponent(result,dest_exponent,unfl);
 			*dstptr = result;
-			if (inexact) 
+			if (inexact) {
 			    if (Is_inexacttrap_enabled())
 				return(UNDERFLOWEXCEPTION|INEXACTEXCEPTION);
-			    else Set_inexactflag();
+			    else
+				Set_inexactflag();
+			}
                         return(UNDERFLOWEXCEPTION);
                 }
                  /* 
@@ -296,8 +306,9 @@ unsigned int *nullptr, *status;
         /* 
          * Trap if inexact trap is enabled
          */
-        if (inexact)
+        if (inexact) {
         	if (Is_inexacttrap_enabled()) return(INEXACTEXCEPTION);
         	else Set_inexactflag();
+	}
         return(NOEXCEPTION);
 }
diff --git a/sys/arch/hppa/spmath/fcnvfx.c b/sys/arch/hppa/spmath/fcnvfx.c
index 8997844cf76..edf379a09bf 100644
--- a/sys/arch/hppa/spmath/fcnvfx.c
+++ b/sys/arch/hppa/spmath/fcnvfx.c
@@ -1,3 +1,5 @@
+/*	$OpenBSD: fcnvfx.c,v 1.3 1998/07/02 19:05:19 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -46,6 +48,7 @@
  *  Single Floating-point to Single Fixed-point 
  */
 /*ARGSUSED*/
+int
 sgl_to_sgl_fcnvfx(srcptr,nullptr,dstptr,status)
 
 sgl_floating_point *srcptr, *nullptr, *status;
@@ -97,9 +100,10 @@ int *dstptr;
 			case ROUNDNEAREST:
 			     if (Sgl_isone_roundbit(src,src_exponent)) {
 			        if (Sgl_isone_stickybit(src,src_exponent) 
-				|| (Sgl_isone_lowmantissa(temp)))
+				|| (Sgl_isone_lowmantissa(temp))) {
 			           if (Sgl_iszero_sign(src)) result++;
 			           else result--;
+				}
 			     }
 			} 
 		}
@@ -120,9 +124,10 @@ int *dstptr;
 			     break;
 			case ROUNDNEAREST:
 			     if (src_exponent == -1)
-			        if (Sgl_isnotzero_mantissa(src))
+			        if (Sgl_isnotzero_mantissa(src)) {
 			           if (Sgl_iszero_sign(src)) result++;
 			           else result--;
+				}
 			} 
 		}
 	}
@@ -138,11 +143,13 @@ int *dstptr;
  *  Single Floating-point to Double Fixed-point 
  */
 /*ARGSUSED*/
+int
 sgl_to_dbl_fcnvfx(srcptr,nullptr,dstptr,status)
 
 sgl_floating_point *srcptr;
 dbl_integer *dstptr;
-unsigned int *nullptr, *status;
+void *nullptr;
+unsigned int *status;
 {
 	register int src_exponent, resultp1;
 	register unsigned int src, temp, resultp2;
@@ -198,13 +205,14 @@ unsigned int *nullptr, *status;
                         case ROUNDNEAREST:
                              if (Sgl_isone_roundbit(src,src_exponent))
                                 if (Sgl_isone_stickybit(src,src_exponent) || 
-				(Dint_isone_lowp2(resultp2)))
+				(Dint_isone_lowp2(resultp2))) {
 				   if (Sgl_iszero_sign(src)) {
 				      Dint_increment(resultp1,resultp2);
 				   }
                                    else {
 				      Dint_decrement(resultp1,resultp2);
 				   }
+				}
                         }
                 }
         }
@@ -228,13 +236,14 @@ unsigned int *nullptr, *status;
                              break;
                         case ROUNDNEAREST:
                              if (src_exponent == -1)
-                                if (Sgl_isnotzero_mantissa(src))
+                                if (Sgl_isnotzero_mantissa(src)) {
                                    if (Sgl_iszero_sign(src)) {
 				      Dint_increment(resultp1,resultp2);
 				   }
                                    else {
 				      Dint_decrement(resultp1,resultp2);
 				   }
+				}
 			}
 		}
 	}
@@ -250,11 +259,13 @@ unsigned int *nullptr, *status;
  *  Double Floating-point to Single Fixed-point 
  */
 /*ARGSUSED*/
+int
 dbl_to_sgl_fcnvfx(srcptr,nullptr,dstptr,status)
 
 dbl_floating_point *srcptr;
 int *dstptr;
-unsigned int *nullptr, *status;
+void *nullptr;
+unsigned int *status;
 {
 	register unsigned int srcp1,srcp2, tempp1,tempp2;
 	register int src_exponent, result;
@@ -303,9 +314,10 @@ unsigned int *nullptr, *status;
                         case ROUNDNEAREST:
                              if (Dbl_isone_roundbit(srcp1,srcp2,src_exponent))
                                 if (Dbl_isone_stickybit(srcp1,srcp2,src_exponent) || 
-				(Dbl_isone_lowmantissap1(tempp1)))
+				(Dbl_isone_lowmantissap1(tempp1))) {
                                    if (Dbl_iszero_sign(srcp1)) result++;
                                    else result--;
+				}
                         } 
 			/* check for overflow */
 			if ((Dbl_iszero_sign(srcp1) && result < 0) ||
@@ -330,9 +342,10 @@ unsigned int *nullptr, *status;
                              break;
                         case ROUNDNEAREST:
                              if (src_exponent == -1)
-                                if (Dbl_isnotzero_mantissa(srcp1,srcp2))
+                                if (Dbl_isnotzero_mantissa(srcp1,srcp2)) {
                                    if (Dbl_iszero_sign(srcp1)) result++;
                                    else result--;
+				}
 			}
                 }
 	}
@@ -348,11 +361,13 @@ unsigned int *nullptr, *status;
  *  Double Floating-point to Double Fixed-point 
  */
 /*ARGSUSED*/
+int
 dbl_to_dbl_fcnvfx(srcptr,nullptr,dstptr,status)
 
 dbl_floating_point *srcptr;
 dbl_integer *dstptr;
-unsigned int *nullptr, *status;
+void *nullptr;
+unsigned int *status;
 {
 	register int src_exponent, resultp1;
 	register unsigned int srcp1, srcp2, tempp1, tempp2, resultp2;
@@ -384,8 +399,8 @@ unsigned int *nullptr, *status;
 		tempp1 = srcp1;
 		tempp2 = srcp2;
 		Dbl_clear_signexponent_set_hidden(tempp1);
-		Dint_from_dbl_mantissa(tempp1,tempp2,src_exponent,resultp1,
-		resultp2);
+		Dint_from_dbl_mantissa(tempp1,tempp2,src_exponent,
+				       resultp1, resultp2);
 		if (Dbl_isone_sign(srcp1)) {
 			Dint_setone_sign(resultp1,resultp2);
 		}
@@ -408,13 +423,14 @@ unsigned int *nullptr, *status;
                         case ROUNDNEAREST:
                              if (Dbl_isone_roundbit(srcp1,srcp2,src_exponent))
                                 if (Dbl_isone_stickybit(srcp1,srcp2,src_exponent) || 
-				(Dint_isone_lowp2(resultp2)))
+				(Dint_isone_lowp2(resultp2))) {
                                    if (Dbl_iszero_sign(srcp1)) {
 				      Dint_increment(resultp1,resultp2);
 				   }
                                    else {
 				      Dint_decrement(resultp1,resultp2);
 				   }
+				}
                         } 
                 }
 	}
@@ -438,13 +454,14 @@ unsigned int *nullptr, *status;
                              break;
                         case ROUNDNEAREST:
                              if (src_exponent == -1)
-                                if (Dbl_isnotzero_mantissa(srcp1,srcp2))
+                                if (Dbl_isnotzero_mantissa(srcp1,srcp2)) {
                                    if (Dbl_iszero_sign(srcp1)) {
 				      Dint_increment(resultp1,resultp2);
 				   }
                                    else {
 				      Dint_decrement(resultp1,resultp2);
-				   }
+				   } 
+				}
 			}
                 }
 	}
diff --git a/sys/arch/hppa/spmath/fcnvfxt.c b/sys/arch/hppa/spmath/fcnvfxt.c
index 352cf35274b..8da4ed15fce 100644
--- a/sys/arch/hppa/spmath/fcnvfxt.c
+++ b/sys/arch/hppa/spmath/fcnvfxt.c
@@ -1,3 +1,5 @@
+/*	$OpenBSD: fcnvfxt.c,v 1.3 1998/07/02 19:05:21 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -47,11 +49,13 @@
  *  with truncated result
  */
 /*ARGSUSED*/
+int
 sgl_to_sgl_fcnvfxt(srcptr,nullptr,dstptr,status)
 
 sgl_floating_point *srcptr;
 int *dstptr;
-unsigned int *nullptr, *status;
+void *nullptr;
+unsigned int *status;
 {
 	register unsigned int src, temp;
 	register int src_exponent, result;
@@ -107,11 +111,13 @@ unsigned int *nullptr, *status;
  *  Single Floating-point to Double Fixed-point 
  */
 /*ARGSUSED*/
+int
 sgl_to_dbl_fcnvfxt(srcptr,nullptr,dstptr,status)
 
 sgl_floating_point *srcptr;
 dbl_integer *dstptr;
-unsigned int *nullptr, *status;
+void *nullptr;
+unsigned int *status;
 {
 	register int src_exponent, resultp1;
 	register unsigned int src, temp, resultp2;
@@ -172,11 +178,13 @@ unsigned int *nullptr, *status;
  *  Double Floating-point to Single Fixed-point 
  */
 /*ARGSUSED*/
+int
 dbl_to_sgl_fcnvfxt(srcptr,nullptr,dstptr,status)
 
 dbl_floating_point *srcptr;
 int *dstptr;
-unsigned int *nullptr, *status;
+void  *nullptr;
+unsigned int *status;
 {
 	register unsigned int srcp1, srcp2, tempp1, tempp2;
 	register int src_exponent, result;
@@ -228,11 +236,13 @@ unsigned int *nullptr, *status;
  *  Double Floating-point to Double Fixed-point 
  */
 /*ARGSUSED*/
+int
 dbl_to_dbl_fcnvfxt(srcptr,nullptr,dstptr,status)
 
 dbl_floating_point *srcptr;
 dbl_integer *dstptr;
-unsigned int *nullptr, *status;
+void *nullptr;
+unsigned int *status;
 {
 	register int src_exponent, resultp1;
 	register unsigned int srcp1, srcp2, tempp1, tempp2, resultp2;
diff --git a/sys/arch/hppa/spmath/fcnvxf.c b/sys/arch/hppa/spmath/fcnvxf.c
index 5e485a65fa0..c2b8eac39c5 100644
--- a/sys/arch/hppa/spmath/fcnvxf.c
+++ b/sys/arch/hppa/spmath/fcnvxf.c
@@ -1,3 +1,5 @@
+/*	$OpenBSD: fcnvxf.c,v 1.3 1998/07/02 19:05:25 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -45,12 +47,13 @@
 /*
  *  Convert single fixed-point to single floating-point format
  */
-
+int
 sgl_to_sgl_fcnvxf(srcptr,nullptr,dstptr,status)
 
 int *srcptr;
 sgl_floating_point *dstptr;
-unsigned int *nullptr, *status;
+void *nullptr;
+unsigned int *status;
 {
 	register int src, dst_exponent;
 	register unsigned int result = 0;
@@ -115,12 +118,13 @@ unsigned int *nullptr, *status;
 /*
  *  Single Fixed-point to Double Floating-point 
  */
-
+int
 sgl_to_dbl_fcnvxf(srcptr,nullptr,dstptr,status)
 
 int *srcptr;
 dbl_floating_point *dstptr;
-unsigned int *nullptr, *status;
+void *nullptr;
+unsigned int *status;
 {
 	register int src, dst_exponent;
 	register unsigned int resultp1 = 0, resultp2 = 0;
@@ -155,8 +159,8 @@ unsigned int *nullptr, *status;
 	/*  left justify source, with msb at bit position 1  */
 	if (dst_exponent >= 0) src <<= dst_exponent;
 	else src = 1 << 30;
-	Dbl_set_mantissap1(resultp1, src >> DBL_EXP_LENGTH - 1);
-	Dbl_set_mantissap2(resultp2, src << (33-DBL_EXP_LENGTH));
+	Dbl_set_mantissap1(resultp1, (src >> (DBL_EXP_LENGTH - 1)));
+	Dbl_set_mantissap2(resultp2, (src << (33-DBL_EXP_LENGTH)));
 	Dbl_set_exponent(resultp1, (30+DBL_BIAS) - dst_exponent);
 	Dbl_copytoptr(resultp1,resultp2,dstptr);
 	return(NOEXCEPTION);
@@ -165,12 +169,13 @@ unsigned int *nullptr, *status;
 /*
  *  Double Fixed-point to Single Floating-point 
  */
-
+int
 dbl_to_sgl_fcnvxf(srcptr,nullptr,dstptr,status)
 
 dbl_integer *srcptr;
 sgl_floating_point *dstptr;
-unsigned int *nullptr, *status;
+void *nullptr;
+unsigned int *status;
 {
 	int dst_exponent, srcp1;
 	unsigned int result = 0, srcp2;
@@ -239,7 +244,7 @@ unsigned int *nullptr, *status;
 		 */
 		else srcp1 >>= -(dst_exponent);
 	}
-	Sgl_set_mantissa(result, srcp1 >> SGL_EXP_LENGTH - 1);
+	Sgl_set_mantissa(result, (srcp1 >> (SGL_EXP_LENGTH - 1)));
 	Sgl_set_exponent(result, (62+SGL_BIAS) - dst_exponent);
 
 	/* check for inexact */
@@ -269,12 +274,13 @@ unsigned int *nullptr, *status;
 /*
  *  Double Fixed-point to Double Floating-point 
  */
-
+int
 dbl_to_dbl_fcnvxf(srcptr,nullptr,dstptr,status)
 
 dbl_integer *srcptr;
 dbl_floating_point *dstptr;
-unsigned int *nullptr, *status;
+void *nullptr;
+unsigned int *status;
 {
 	register int srcp1, dst_exponent;
 	register unsigned int srcp2, resultp1 = 0, resultp2 = 0;
diff --git a/sys/arch/hppa/spmath/files.spmath b/sys/arch/hppa/spmath/files.spmath
new file mode 100644
index 00000000000..faeb81b0665
--- /dev/null
+++ b/sys/arch/hppa/spmath/files.spmath
@@ -0,0 +1,37 @@
+#	$OpenBSD: files.spmath,v 1.1 1998/07/02 19:05:26 mickey Exp $
+
+file	arch/hppa/spmath/dfadd.c	fpemul
+file	arch/hppa/spmath/dfcmp.c	fpemul
+file	arch/hppa/spmath/dfdiv.c	fpemul
+file	arch/hppa/spmath/dfmpy.c	fpemul
+file	arch/hppa/spmath/dfrem.c	fpemul
+file	arch/hppa/spmath/dfsqrt.c	fpemul
+file	arch/hppa/spmath/dfsub.c	fpemul
+file	arch/hppa/spmath/divsfm.c	fpemul
+file	arch/hppa/spmath/divsfr.c	fpemul
+file	arch/hppa/spmath/divsim.c	fpemul
+file	arch/hppa/spmath/divsir.c	fpemul
+file	arch/hppa/spmath/divufr.c	fpemul
+file	arch/hppa/spmath/divuir.c	fpemul
+file	arch/hppa/spmath/mpyaccs.c	fpemul
+file	arch/hppa/spmath/mpyaccu.c	fpemul
+file	arch/hppa/spmath/mpys.c		fpemul
+file	arch/hppa/spmath/mpyscv.c	fpemul
+file	arch/hppa/spmath/mpyu.c		fpemul
+file	arch/hppa/spmath/mpyucv.c	fpemul
+file	arch/hppa/spmath/setovfl.c	fpemul
+file	arch/hppa/spmath/sfadd.c	fpemul
+file	arch/hppa/spmath/sfcmp.c	fpemul
+file	arch/hppa/spmath/sfdiv.c	fpemul
+file	arch/hppa/spmath/sfmpy.c	fpemul
+file	arch/hppa/spmath/sfrem.c	fpemul
+file	arch/hppa/spmath/sfsqrt.c	fpemul
+file	arch/hppa/spmath/sfsub.c	fpemul
+file	arch/hppa/spmath/fcnvff.c	fpemul
+file	arch/hppa/spmath/fcnvfx.c	fpemul
+file	arch/hppa/spmath/fcnvfxt.c	fpemul
+file	arch/hppa/spmath/fcnvxf.c	fpemul
+file	arch/hppa/spmath/frnd.c		fpemul
+file	arch/hppa/spmath/divu.S		fpemul
+file	arch/hppa/spmath/impys.S	fpemul
+file	arch/hppa/spmath/impyu.S	fpemul
diff --git a/sys/arch/hppa/spmath/float.h b/sys/arch/hppa/spmath/float.h
index 50c7a72b871..6776a1132ab 100644
--- a/sys/arch/hppa/spmath/float.h
+++ b/sys/arch/hppa/spmath/float.h
@@ -1,3 +1,5 @@
+/*	$OpenBSD: float.h,v 1.3 1998/07/02 19:05:26 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -431,7 +433,7 @@ typedef int VOID;
 #define Set_exceptiontype(object,value) Bitfield_deposit(value, 0, 6,object)
 #define Set_parmfield(object,value) Bitfield_deposit(value, 23, 3,object)
 #define Set_exceptiontype_and_instr_field(exception,instruction,object) \
-    object = exception << 26 | instruction
+    object = ((exception) << 26) | (instruction)
 
 /* Declare the condition field
  *
diff --git a/sys/arch/hppa/spmath/fpbits.h b/sys/arch/hppa/spmath/fpbits.h
index cfa8dffe684..d7f416ffb9a 100644
--- a/sys/arch/hppa/spmath/fpbits.h
+++ b/sys/arch/hppa/spmath/fpbits.h
@@ -1,3 +1,5 @@
+/*	$OpenBSD: fpbits.h,v 1.3 1998/07/02 19:05:28 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -73,5 +75,6 @@
     ((object) & (((unsigned)-1 >> (HOSTWDSZ-len)) << (HOSTWDSZ-start-len)))
 
 #define Bitfield_deposit(value,start,len,object)  object = \
-    ((object) & ~(((unsigned)-1 >> (HOSTWDSZ-len)) << (HOSTWDSZ-start-len))) | \
-    (((value) & ((unsigned)-1 >> (HOSTWDSZ-len))) << (HOSTWDSZ-start-len))
+    ((object) & ~(((unsigned)-1 >> (HOSTWDSZ-(len))) << (HOSTWDSZ-(start)-(len)))) | \
+    (((value) & ((unsigned)-1 >> (HOSTWDSZ-(len)))) << (HOSTWDSZ-(start)-(len)))
+
diff --git a/sys/arch/hppa/spmath/frnd.c b/sys/arch/hppa/spmath/frnd.c
index 4778a1f9fb8..98de7c85822 100644
--- a/sys/arch/hppa/spmath/frnd.c
+++ b/sys/arch/hppa/spmath/frnd.c
@@ -1,3 +1,5 @@
+/*	$OpenBSD: frnd.c,v 1.3 1998/07/02 19:05:29 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -48,10 +50,12 @@
  */
 
 /*ARGSUSED*/
+int
 sgl_frnd(srcptr,nullptr,dstptr,status)
 
 sgl_floating_point *srcptr, *dstptr;
-unsigned int *nullptr, *status;
+void *nullptr;
+unsigned int *status;
 {
 	register unsigned int src, result;
 	register int src_exponent;
@@ -139,9 +143,10 @@ unsigned int *nullptr, *status;
 		}
 	}
 	*dstptr = result;
-	if (inexact) 
+	if (inexact) {
 		if (Is_inexacttrap_enabled()) return(INEXACTEXCEPTION);
 		else Set_inexactflag();
+	}
 	return(NOEXCEPTION);
 } 
 
@@ -150,10 +155,12 @@ unsigned int *nullptr, *status;
  */
 
 /*ARGSUSED*/
+int
 dbl_frnd(srcptr,nullptr,dstptr,status)
 
 dbl_floating_point *srcptr, *dstptr;
-unsigned int *nullptr, *status;
+void *nullptr;
+unsigned int *status;
 {
 	register unsigned int srcp1, srcp2, resultp1, resultp2;
 	register int src_exponent;
@@ -244,17 +251,20 @@ unsigned int *nullptr, *status;
 		}
 	}
 	Dbl_copytoptr(resultp1,resultp2,dstptr);
-	if (inexact)
+	if (inexact) {
 		if (Is_inexacttrap_enabled()) return(INEXACTEXCEPTION);
 		else Set_inexactflag();
+	}
 	return(NOEXCEPTION);
 }
 
 /*ARGSUSED*/
+int
 quad_frnd(srcptr,nullptr,dstptr,status)
 
 quad_floating_point *srcptr, *dstptr;
-unsigned int *nullptr, *status;
+void *nullptr;
+unsigned int *status;
 {
 	return(UNIMPLEMENTEDEXCEPTION);
 }
diff --git a/sys/arch/hppa/spmath/hppa.h b/sys/arch/hppa/spmath/hppa.h
index 454f20332e3..a7e7eb005b9 100644
--- a/sys/arch/hppa/spmath/hppa.h
+++ b/sys/arch/hppa/spmath/hppa.h
@@ -1,3 +1,5 @@
+/*	$OpenBSD: hppa.h,v 1.3 1998/07/02 19:05:31 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
diff --git a/sys/arch/hppa/spmath/impys.S b/sys/arch/hppa/spmath/impys.S
index 6b6584b565f..42a5bbcb79c 100644
--- a/sys/arch/hppa/spmath/impys.S
+++ b/sys/arch/hppa/spmath/impys.S
@@ -1,3 +1,5 @@
+/*	$OpenBSD: impys.S,v 1.3 1998/07/02 19:05:32 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -48,271 +50,263 @@
  * important than program size in this implementation. 
  *
  ***************************************************************************/
-#
-# Definitions - General registers
-#
-gr0	.equ		0		# General register zero
-pu	.equ		3		# upper part of product
-pl	.equ		4		# lower part of product
-op2	.equ		4		# multiplier
-op1	.equ		5		# multiplicand
-cnt	.equ		6		# count in multiply
-brindex	.equ		7		# index into the br. table
-sign	.equ		8		# sign of product
-pc	.equ		9		# carry bit of product, = 00...01
-pm	.equ	       10		# value of -1 used in shifting
+/*
+ * Definitions - General registers
+ */
+gr0	.equ		0		/* General register zero */
+pu	.equ		3		/* upper part of product */
+pl	.equ		4		/* lower part of product */
+op2	.equ		4		/* multiplier */
+op1	.equ		5		/* multiplicand */
+cnt	.equ		6		/* count in multiply */
+brindex	.equ		7		/* index into the br. table */
+sign	.equ		8		/* sign of product */
+pc	.equ		9		/* carry bit of product, = 00...01 */
+pm	.equ	       10		/* value of -1 used in shifting */
 
-#*****************************************************************************
-	.export impys,entry
-	.space $TEXT$
-	.subspa $CODE$
-	.align 4
-	.proc
-	.callinfo
-#
-#****************************************************************************
-impys	stws,ma		pu,4(sp)		# save registers on stack
-	stws,ma		pl,4(sp)		# save registers on stack
-	stws,ma		op1,4(sp)		# save registers on stack
-	stws,ma		cnt,4(sp)		# save registers on stack
-	stws,ma		brindex,4(sp)		# save registers on stack
-	stws,ma		sign,4(sp)		# save registers on stack
-	stws,ma		pc,4(sp)		# save registers on stack
-	stws,ma		pm,4(sp)		# save registers on stack
-#
-#   Start multiply process
-#
-	ldws		0(arg1),op2		# get multiplier
-	ldws		0(arg0),op1		# get multiplicand
-	addi		-1,gr0,pm		# initialize pm to 111...1
-	comb,<		op2,gr0,mpyb		# br. if multiplier < 0
-	xor		op2,op1,sign		# sign(0) = sign of product
-mpy1	comb,<		op1,gr0,mpya		# br. if multiplicand < 0
-	addi		0,gr0,pu		# clear product
-	addib,=		0,op1,fini0		# op1 = 0, product = 0
-mpy2	addi		1,gr0,pc		# initialize pc to 00...01
-	movib,tr	8,cnt,mloop		# set count for mpy loop
-	extru		op2,31,4,brindex	# 4 bits as index into table 
-#
+ENTRY(impys)
+	stws,ma		pu,4(sp)		; save registers on stack
+	stws,ma		pl,4(sp)		; save registers on stack
+	stws,ma		op1,4(sp)		; save registers on stack
+	stws,ma		cnt,4(sp)		; save registers on stack
+	stws,ma		brindex,4(sp)		; save registers on stack
+	stws,ma		sign,4(sp)		; save registers on stack
+	stws,ma		pc,4(sp)		; save registers on stack
+	stws,ma		pm,4(sp)		; save registers on stack
+;
+;   Start multiply process
+;
+	ldws		0(arg1),op2		; get multiplier
+	ldws		0(arg0),op1		; get multiplicand
+	addi		-1,gr0,pm		; initialize pm to 111...1
+	comb,<		op2,gr0,mpyb		; br. if multiplier < 0
+	xor		op2,op1,sign		; sign(0) = sign of product
+mpy1	comb,<		op1,gr0,mpya		; br. if multiplicand < 0
+	addi		0,gr0,pu		; clear product
+	addib,=		0,op1,fini0		; op1 = 0, product = 0
+mpy2	addi		1,gr0,pc		; initialize pc to 00...01
+	movib,tr	8,cnt,mloop		; set count for mpy loop
+	extru		op2,31,4,brindex	; 4 bits as index into table 
+;
 	.align		8
-#
-	b		sh4c			# br. if sign overflow
-sh4n	shd		pu,pl,4,pl		# shift product right 4 bits
-	addib,<=	-1,cnt,mulend		# reduce count by 1, exit if
-	extru  		pu,27,28,pu		#   <= zero
-#
-mloop	blr		brindex,gr0		# br. into table
-						#   entries of 2 words
-	extru		op2,27,4,brindex	# next 4 bits into index
-#
-#
-#	branch table for the multiplication process with four multiplier bits
-#
-mtable						# two words per entry
-#
-# ----	bits = 0000 ---- shift product 4 bits -------------------------------
-#
-	b		sh4n+4			# just shift partial
-	shd		pu,pl,4,pl		#   product right 4 bits
-#
-#  ----	bits = 0001 ---- add op1, then shift 4 bits
-#
-	addb,tr		op1,pu,sh4n+4		# add op1 to product, to shift
-	shd		pu,pl,4,pl		#   product right 4 bits
-#
-#  ----	bits = 0010 ---- add op1, add op1, then shift 4 bits
-#
-	addb,tr		op1,pu,sh4n		# add 2*op1, to shift 
-	addb,uv 	op1,pu,sh4c		#   product right 4 bits
-#
-#  ---- bits = 0011 ---- add op1, add 2*op1, shift 4 bits
-#
-	addb,tr		op1,pu,sh4n-4		# add op1 & 2*op1, shift 
-	sh1add,nsv 	op1,pu,pu			#   product right 4 bits
-#
-#  ----	bits = 0100 ---- shift 2, add op1, shift 2
-#
+;
+	b		sh4c			; br. if sign overflow
+sh4n	shd		pu,pl,4,pl		; shift product right 4 bits
+	addib,<=	-1,cnt,mulend		; reduce count by 1, exit if
+	extru  		pu,27,28,pu		;   <= zero
+;
+mloop	blr		brindex,gr0		; br. into table
+						;   entries of 2 words
+	extru		op2,27,4,brindex	; next 4 bits into index
+;
+;
+;	branch table for the multiplication process with four multiplier bits
+;
+mtable						; two words per entry
+;
+; ----	bits = 0000 ---- shift product 4 bits -------------------------------
+;
+	b		sh4n+4			; just shift partial
+	shd		pu,pl,4,pl		;   product right 4 bits
+;
+;  ----	bits = 0001 ---- add op1, then shift 4 bits
+;
+	addb,tr		op1,pu,sh4n+4		; add op1 to product, to shift
+	shd		pu,pl,4,pl		;   product right 4 bits
+;
+;  ----	bits = 0010 ---- add op1, add op1, then shift 4 bits
+;
+	addb,tr		op1,pu,sh4n		; add 2*op1, to shift 
+	addb,uv 	op1,pu,sh4c		;   product right 4 bits
+;
+;  ---- bits = 0011 ---- add op1, add 2*op1, shift 4 bits
+;
+	addb,tr		op1,pu,sh4n-4		; add op1 & 2*op1, shift 
+	sh1add,nsv 	op1,pu,pu		;   product right 4 bits
+;
+;  ----	bits = 0100 ---- shift 2, add op1, shift 2
+;
 	b		sh2sa
-	shd		pu,pl,2,pl		# shift product 2 bits
-#
-#  ----	bits = 0101 ---- add op1, shift 2, add op1, and shift 2 again
-#
-	addb,tr		op1,pu,sh2us		# add op1 to product
-	shd		pu,pl,2,pl		# shift 2 bits
-#
-#  ----	bits = 0110 ---- add op1, add op1, shift 2, add op1, and shift 2 again
-#
-	addb,tr		op1,pu,sh2c		# add 2*op1, to shift 2 bits
-	addb,nuv	op1,pu,sh2us		# br. if not overflow
-#
-#  ----	bits = 0111 ---- subtract op1, shift 3, add op1, and shift 1
-#
+	shd		pu,pl,2,pl		; shift product 2 bits
+;
+;  ----	bits = 0101 ---- add op1, shift 2, add op1, and shift 2 again
+;
+	addb,tr		op1,pu,sh2us		; add op1 to product
+	shd		pu,pl,2,pl		; shift 2 bits
+;
+;  ----	bits = 0110 ---- add op1, add op1, shift 2, add op1, and shift 2 again
+;
+	addb,tr		op1,pu,sh2c		; add 2*op1, to shift 2 bits
+	addb,nuv	op1,pu,sh2us		; br. if not overflow
+;
+;  ----	bits = 0111 ---- subtract op1, shift 3, add op1, and shift 1
+;
 	b		sh3s
-	sub		pu,op1,pu		# subtract op1, br. to sh3s
+	sub		pu,op1,pu		; subtract op1, br. to sh3s
 
-#
-#  ----	bits = 1000 ---- shift 3, add op1, shift 1
-#
+;
+;  ----	bits = 1000 ---- shift 3, add op1, shift 1
+;
 	b		sh3sa
-	shd		pu,pl,3,pl		# shift product right 3 bits
-#
-#  ----	bits = 1001 ---- add op1, shift 3, add op1, shift 1
-#
-	addb,tr		op1,pu,sh3us		# add op1, to shift 3, add op1,
-	shd		pu,pl,3,pl		#   and shift 1
-#
-#  ----	bits = 1010 ---- add op1, add op1, shift 3, add op1, shift 1
-#
-	addb,tr		op1,pu,sh3c		# add 2*op1, to shift 3 bits
-	addb,nuv	op1,pu,sh3us		#   br. if no overflow
-#
-#  ----	bits = 1011 ---- add -op1, shift 2, add -op1, shift 2, inc. next index
-#
-	addib,tr	1,brindex,sh2s		# add 1 to index, subtract op1,
-	sub		pu,op1,pu		#   shift 2 with minus sign
-#
-#  ----	bits = 1100 ---- shift 2, subtract op1, shift 2, increment next index
-#
-	addib,tr	1,brindex,sh2sb		# add 1 to index, to shift
-	shd		pu,pl,2,pl		# shift right 2 bits signed
-#
-#  ----	bits = 1101 ---- add op1, shift 2, add -op1, shift 2
-#
-	addb,tr		op1,pu,sh2ns		# add op1, to shift 2
-	shd		pu,pl,2,pl		#   right 2 unsigned, etc.
-#
-#  ----	bits = 1110 ---- shift 1 signed, add -op1, shift 3 signed
-#
-	addib,tr	1,brindex,sh1sa		# add 1 to index, to shift
-	shd		pu,pl,1,pl		# shift 1 bit
-#
-#  ----	bits = 1111 ---- add -op1, shift 4 signed
-#
-	addib,tr	1,brindex,sh4s		# add 1 to index, subtract op1,
-	sub		pu,op1,pu		#   to shift 4 signed
+	shd		pu,pl,3,pl		; shift product right 3 bits
+;
+;  ----	bits = 1001 ---- add op1, shift 3, add op1, shift 1
+;
+	addb,tr		op1,pu,sh3us		; add op1, to shift 3, add op1,
+	shd		pu,pl,3,pl		;   and shift 1
+;
+;  ----	bits = 1010 ---- add op1, add op1, shift 3, add op1, shift 1
+;
+	addb,tr		op1,pu,sh3c		; add 2*op1, to shift 3 bits
+	addb,nuv	op1,pu,sh3us		;   br. if no overflow
+;
+;  ----	bits = 1011 ---- add -op1, shift 2, add -op1, shift 2, inc. next index
+;
+	addib,tr	1,brindex,sh2s		; add 1 to index, subtract op1,
+	sub		pu,op1,pu		;   shift 2 with minus sign
+;
+;  ----	bits = 1100 ---- shift 2, subtract op1, shift 2, increment next index
+;
+	addib,tr	1,brindex,sh2sb		; add 1 to index, to shift
+	shd		pu,pl,2,pl		; shift right 2 bits signed
+;
+;  ----	bits = 1101 ---- add op1, shift 2, add -op1, shift 2
+;
+	addb,tr		op1,pu,sh2ns		; add op1, to shift 2
+	shd		pu,pl,2,pl		;   right 2 unsigned, etc.
+;
+;  ----	bits = 1110 ---- shift 1 signed, add -op1, shift 3 signed
+;
+	addib,tr	1,brindex,sh1sa		; add 1 to index, to shift
+	shd		pu,pl,1,pl		; shift 1 bit
+;
+;  ----	bits = 1111 ---- add -op1, shift 4 signed
+;
+	addib,tr	1,brindex,sh4s		; add 1 to index, subtract op1,
+	sub		pu,op1,pu		;   to shift 4 signed
 
-#
-#  ----	bits = 10000 ---- shift 4 signed
-#
-	addib,tr	1,brindex,sh4s+4	# add 1 to index
-	shd		pu,pl,4,pl		# shift 4 signed
-#
-#  ---- end of table ---------------------------------------------------------
-#
+;
+;  ----	bits = 10000 ---- shift 4 signed
+;
+	addib,tr	1,brindex,sh4s+4	; add 1 to index
+	shd		pu,pl,4,pl		; shift 4 signed
+;
+;  ---- end of table ---------------------------------------------------------
+;
 sh4s	shd		pu,pl,4,pl
-	addib,tr	-1,cnt,mloop		# loop (count > 0 always here)
-	shd		pm,pu,4,pu		# shift 4, minus signed
-#
-sh4c	addib,>		-1,cnt,mloop		# decrement count, loop if > 0
-	shd		pc,pu,4,pu		# shift 4 with overflow
-	b		signs			# end of multiply
-	bb,>=,n		sign,0,fini		# test sign of procduct
-#
-mpyb	add,=		op2,op2,gr0		# if <> 0, back to main sect.
+	addib,tr	-1,cnt,mloop		; loop (count > 0 always here)
+	shd		pm,pu,4,pu		; shift 4, minus signed
+;
+sh4c	addib,>		-1,cnt,mloop		; decrement count, loop if > 0
+	shd		pc,pu,4,pu		; shift 4 with overflow
+	b		signs			; end of multiply
+	bb,>=,n		sign,0,fini		; test sign of procduct
+;
+mpyb	add,=		op2,op2,gr0		; if <> 0, back to main sect.
 	b		mpy1
-	sub		0,op2,op2		# op2 = |multiplier|
-	add,>=		op1,gr0,gr0		# if op1 < 0, invert sign, 
-	xor		pm,sign,sign		#   for correct result
-#
-#	special case for multiplier = -2**31, op1 = signed multiplicand
-#		or multiplicand = -2**31, op1 = signed multiplier
-#
-	shd		op1,0,1,pl		# shift op1 left 31 bits
+	sub		0,op2,op2		; op2 = |multiplier|
+	add,>=		op1,gr0,gr0		; if op1 < 0, invert sign, 
+	xor		pm,sign,sign		;   for correct result
+;
+;	special case for multiplier = -2**31, op1 = signed multiplicand
+;		or multiplicand = -2**31, op1 = signed multiplier
+;
+	shd		op1,0,1,pl		; shift op1 left 31 bits
 mmax	extrs		op1,30,31,pu	
-	b		signs			# negate product (if needed)
-	bb,>=,n		sign,0,fini		# test sign of product
-#
-mpya	add,=		op1,op1,gr0		# op1 = -2**31, special case
+	b		signs			; negate product (if needed)
+	bb,>=,n		sign,0,fini		; test sign of product
+;
+mpya	add,=		op1,op1,gr0		; op1 = -2**31, special case
 	b		mpy2
-	sub		0,op1,op1		# op1 = |multiplicand|
-	add,>=		op2,gr0,gr0		# if op2 < 0, invert sign, 
-	xor		pm,sign,sign		#   for correct result
-	movb,tr		op2,op1,mmax		# use op2 as multiplicand
-	shd		op1,0,1,pl		# shift it left 31 bits
-#
-sh3c	shd		pu,pl,3,pl		# shift product 3 bits
-	shd		pc,pu,3,pu		# shift 3 signed
-	addb,tr		op1,pu,sh1		# add op1, to shift 1 bit
+	sub		0,op1,op1		; op1 = |multiplicand|
+	add,>=		op2,gr0,gr0		; if op2 < 0, invert sign, 
+	xor		pm,sign,sign		;   for correct result
+	movb,tr		op2,op1,mmax		; use op2 as multiplicand
+	shd		op1,0,1,pl		; shift it left 31 bits
+;
+sh3c	shd		pu,pl,3,pl		; shift product 3 bits
+	shd		pc,pu,3,pu		; shift 3 signed
+	addb,tr		op1,pu,sh1		; add op1, to shift 1 bit
 	shd		pu,pl,1,pl
-#
-sh3us	extru		pu,28,29,pu		# shift 3 unsigned
-	addb,tr		op1,pu,sh1		# add op1, to shift 1 bit
+;
+sh3us	extru		pu,28,29,pu		; shift 3 unsigned
+	addb,tr		op1,pu,sh1		; add op1, to shift 1 bit
 	shd		pu,pl,1,pl
-#
-sh3sa	extrs		pu,28,29,pu		# shift 3 signed
-	addb,tr		op1,pu,sh1		# add op1, to shift 1 bit
+;
+sh3sa	extrs		pu,28,29,pu		; shift 3 signed
+	addb,tr		op1,pu,sh1		; add op1, to shift 1 bit
 	shd		pu,pl,1,pl
-#
-sh3s	shd		pu,pl,3,pl		# shift 3 minus signed
+;
+sh3s	shd		pu,pl,3,pl		; shift 3 minus signed
 	shd		pm,pu,3,pu
-	addb,tr		op1,pu,sh1		# add op1, to shift 1 bit
+	addb,tr		op1,pu,sh1		; add op1, to shift 1 bit
 	shd		pu,pl,1,pl
-#
-sh1	addib,>		-1,cnt,mloop		# loop if count > 0
+;
+sh1	addib,>		-1,cnt,mloop		; loop if count > 0
 	extru		pu,30,31,pu
-	b		signs			# end of multiply
-	bb,>=,n		sign,0,fini		# test sign of product
-#
-sh2ns	addib,tr	1,brindex,sh2sb+4	# increment index
-	extru		pu,29,30,pu		# shift unsigned
-#
-sh2s	shd		pu,pl,2,pl		# shift with minus sign 
-	shd		pm,pu,2,pu		# 
-	sub		pu,op1,pu		# subtract op1
-	shd		pu,pl,2,pl		# shift with minus sign
-	addib,tr	-1,cnt,mloop		# decrement count, loop
-	shd		pm,pu,2,pu		# shift with minus sign
-						# count never reaches 0 here
-#
-sh2sb	extrs		pu,29,30,pu		# shift 2 signed
-	sub		pu,op1,pu		# subtract op1 from product
-	shd		pu,pl,2,pl		# shift with minus sign
-	addib,tr	-1,cnt,mloop		# decrement count, loop
-	shd		pm,pu,2,pu		# shift with minus sign
-						# count never reaches 0 here
-#
-sh1sa	extrs		pu,30,31,pu		#   signed
-	sub		pu,op1,pu		# subtract op1 from product
-	shd		pu,pl,3,pl		# shift 3 with minus sign
-	addib,tr	-1,cnt,mloop		# dec. count, to loop
-	shd		pm,pu,3,pu		# count never reaches 0 here
-#
-fini0	movib,tr,n	0,pl,fini		# product = 0 as op1 = 0
-#
-sh2us	extru		pu,29,30,pu		# shift 2 unsigned
-	addb,tr		op1,pu,sh2a		# add op1
-	shd		pu,pl,2,pl		# shift 2 bits
-#
+	b		signs			; end of multiply
+	bb,>=,n		sign,0,fini		; test sign of product
+;
+sh2ns	addib,tr	1,brindex,sh2sb+4	; increment index
+	extru		pu,29,30,pu		; shift unsigned
+;
+sh2s	shd		pu,pl,2,pl		; shift with minus sign 
+	shd		pm,pu,2,pu		; 
+	sub		pu,op1,pu		; subtract op1
+	shd		pu,pl,2,pl		; shift with minus sign
+	addib,tr	-1,cnt,mloop		; decrement count, loop
+	shd		pm,pu,2,pu		; shift with minus sign
+						; count never reaches 0 here
+;
+sh2sb	extrs		pu,29,30,pu		; shift 2 signed
+	sub		pu,op1,pu		; subtract op1 from product
+	shd		pu,pl,2,pl		; shift with minus sign
+	addib,tr	-1,cnt,mloop		; decrement count, loop
+	shd		pm,pu,2,pu		; shift with minus sign
+						; count never reaches 0 here
+;
+sh1sa	extrs		pu,30,31,pu		;   signed
+	sub		pu,op1,pu		; subtract op1 from product
+	shd		pu,pl,3,pl		; shift 3 with minus sign
+	addib,tr	-1,cnt,mloop		; dec. count, to loop
+	shd		pm,pu,3,pu		; count never reaches 0 here
+;
+fini0	movib,tr,n	0,pl,fini		; product = 0 as op1 = 0
+;
+sh2us	extru		pu,29,30,pu		; shift 2 unsigned
+	addb,tr		op1,pu,sh2a		; add op1
+	shd		pu,pl,2,pl		; shift 2 bits
+;
 sh2c	shd		pu,pl,2,pl	
-	shd		pc,pu,2,pu		# shift with carry
-	addb,tr		op1,pu,sh2a		# add op1 to product
-	shd		pu,pl,2,pl		# br. to sh2 to shift pu
-#
-sh2sa	extrs		pu,29,30,pu		# shift with sign
-	addb,tr		op1,pu,sh2a		# add op1 to product
-	shd		pu,pl,2,pl		# br. to sh2 to shift pu
-#
-sh2a	addib,>		-1,cnt,mloop		# loop if count > 0
+	shd		pc,pu,2,pu		; shift with carry
+	addb,tr		op1,pu,sh2a		; add op1 to product
+	shd		pu,pl,2,pl		; br. to sh2 to shift pu
+;
+sh2sa	extrs		pu,29,30,pu		; shift with sign
+	addb,tr		op1,pu,sh2a		; add op1 to product
+	shd		pu,pl,2,pl		; br. to sh2 to shift pu
+;
+sh2a	addib,>		-1,cnt,mloop		; loop if count > 0
 	extru		pu,29,30,pu
-#
-mulend	bb,>=,n		sign,0,fini		# test sign of product
-signs	sub		0,pl,pl			# negate product if sign
-	subb		0,pu,pu			#   is negative
-#
-#	finish
-#
-fini	stws		pu,0(arg2)		# save high part of result
-	stws		pl,4(arg2)		# save low part of result
+;
+mulend	bb,>=,n		sign,0,fini		; test sign of product
+signs	sub		0,pl,pl			; negate product if sign
+	subb		0,pu,pu			;   is negative
+;
+;	finish
+;
+fini	stws		pu,0(arg2)		; save high part of result
+	stws		pl,4(arg2)		; save low part of result
 
-	ldws,mb		-4(sp),pm		# restore registers
-	ldws,mb		-4(sp),pc		# restore registers
-	ldws,mb		-4(sp),sign		# restore registers
-	ldws,mb		-4(sp),brindex		# restore registers
-	ldws,mb		-4(sp),cnt		# restore registers
-	ldws,mb		-4(sp),op1		# restore registers
-	ldws,mb		-4(sp),pl		# restore registers
-	bv		0(rp)			# return
-	ldws,mb		-4(sp),pu		# restore registers
+	ldws,mb		-4(sp),pm		; restore registers
+	ldws,mb		-4(sp),pc		; restore registers
+	ldws,mb		-4(sp),sign		; restore registers
+	ldws,mb		-4(sp),brindex		; restore registers
+	ldws,mb		-4(sp),cnt		; restore registers
+	ldws,mb		-4(sp),op1		; restore registers
+	ldws,mb		-4(sp),pl		; restore registers
+	bv		0(rp)			; return
+	ldws,mb		-4(sp),pu		; restore registers
 
-	.procend
+EXIT(impys)
 	.end
diff --git a/sys/arch/hppa/spmath/impyu.S b/sys/arch/hppa/spmath/impyu.S
index 026065e6080..bc686202416 100644
--- a/sys/arch/hppa/spmath/impyu.S
+++ b/sys/arch/hppa/spmath/impyu.S
@@ -1,3 +1,5 @@
+/*	$OpenBSD: impyu.S,v 1.3 1998/07/02 19:05:33 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -48,270 +50,270 @@
  * size in this implementation. 
  *
  *****************************************************************************/
-#
-# Definitions - General registers
-#
-gr0	.equ		0		# General register zero
-pu	.equ		3		# upper part of product
-pl	.equ		4		# lower part of product
-op2	.equ		4		# multiplier
-op1	.equ		5		# multiplicand
-cnt	.equ		6		# count in multiply
-brindex	.equ		7		# index into the br. table
-saveop2	.equ		8		# save op2 if high bit of multiplicand 
-					# is set
-pc	.equ		9		# carry bit of product, = 00...01
-pm	.equ	       10		# value of -1 used in shifting
+;
+; Definitions - General registers
+;
+gr0	.equ		0		; General register zero
+pu	.equ		3		; upper part of product
+pl	.equ		4		; lower part of product
+op2	.equ		4		; multiplier
+op1	.equ		5		; multiplicand
+cnt	.equ		6		; count in multiply
+brindex	.equ		7		; index into the br. table
+saveop2	.equ		8		; save op2 if high bit of multiplicand 
+					; is set
+pc	.equ		9		; carry bit of product, = 00...01
+pm	.equ	       10		; value of -1 used in shifting
 temp	.equ		6
 
-#****************************************************************************
+;****************************************************************************
 	.export impyu,entry
 	.space $TEXT$
 	.subspa $CODE$
 	.align 4
 	.proc
 	.callinfo
-#
-#****************************************************************************
-impyu	stws,ma		pu,4(sp)		# save registers on stack
-	stws,ma		pl,4(sp)		# save registers on stack
-	stws,ma		op1,4(sp)		# save registers on stack
-	stws,ma		cnt,4(sp)		# save registers on stack
-	stws,ma		brindex,4(sp)		# save registers on stack
-	stws,ma		saveop2,4(sp)		# save registers on stack
-	stws,ma		pc,4(sp)		# save registers on stack
-	stws,ma		pm,4(sp)		# save registers on stack
-#
-#   Start multiply process
-#
-	ldws		0(arg0),op1		# get multiplicand
-	ldws		0(arg1),op2		# get multiplier
-	addib,=		0,op1,fini0		# op1 = 0, product = 0
-	addi		0,gr0,pu		# clear product
-	bb,>=		op1,0,mpy1		# test msb of multiplicand
-	addi		0,gr0,saveop2		# clear saveop2
-#
-# msb of multiplicand is set so will save multiplier for a final
-# addition into the result
-#
-	extru,=		op1,31,31,op1		# clear msb of multiplicand
-	b		mpy1			# if op1 < 2**32, start multiply
-	add		op2,gr0,saveop2		#   save op2 in saveop2
-	shd		gr0,op2,1,pu		# shift op2 left 31 for result
-	b		fini			# go to finish 
+;
+;****************************************************************************
+impyu	stws,ma		pu,4(sp)		; save registers on stack
+	stws,ma		pl,4(sp)		; save registers on stack
+	stws,ma		op1,4(sp)		; save registers on stack
+	stws,ma		cnt,4(sp)		; save registers on stack
+	stws,ma		brindex,4(sp)		; save registers on stack
+	stws,ma		saveop2,4(sp)		; save registers on stack
+	stws,ma		pc,4(sp)		; save registers on stack
+	stws,ma		pm,4(sp)		; save registers on stack
+;
+;   Start multiply process
+;
+	ldws		0(arg0),op1		; get multiplicand
+	ldws		0(arg1),op2		; get multiplier
+	addib,=		0,op1,fini0		; op1 = 0, product = 0
+	addi		0,gr0,pu		; clear product
+	bb,>=		op1,0,mpy1		; test msb of multiplicand
+	addi		0,gr0,saveop2		; clear saveop2
+;
+; msb of multiplicand is set so will save multiplier for a final
+; addition into the result
+;
+	extru,=		op1,31,31,op1		; clear msb of multiplicand
+	b		mpy1			; if op1 < 2**32, start multiply
+	add		op2,gr0,saveop2		;   save op2 in saveop2
+	shd		gr0,op2,1,pu		; shift op2 left 31 for result
+	b		fini			; go to finish 
 	shd		op2,gr0,1,pl
-#
-mpy1 	addi		-1,gr0,pm		# initialize pm to 111...1
-	addi		1,gr0,pc		# initialize pc to 00...01
-	movib,tr	8,cnt,mloop		# set count for mpy loop
-	extru		op2,31,4,brindex	# 4 bits as index into table 
-#
+;
+mpy1 	addi		-1,gr0,pm		; initialize pm to 111...1
+	addi		1,gr0,pc		; initialize pc to 00...01
+	movib,tr	8,cnt,mloop		; set count for mpy loop
+	extru		op2,31,4,brindex	; 4 bits as index into table 
+;
 	.align		8
-#
-	b		sh4c			# br. if sign overflow
-sh4n	shd		pu,pl,4,pl		# shift product right 4 bits
-	addib,<=	-1,cnt,mulend		# reduce count by 1, exit if
-	extru  		pu,27,28,pu		#   <= zero
-#
-mloop	blr		brindex,gr0		# br. into table
-						#   entries of 2 words
-	extru		op2,27,4,brindex	# next 4 bits into index
-#
-#
-#	branch table for the multiplication process with four multiplier bits
-#
-mtable						# two words per entry
-#
-# ----	bits = 0000 ---- shift product 4 bits -------------------------------
-#
-	b		sh4n+4			# just shift partial
-	shd		pu,pl,4,pl		#   product right 4 bits
-#
-#  ----	bits = 0001 ---- add op1, then shift 4 bits
-#
-	addb,tr		op1,pu,sh4n+4		# add op1 to product, to shift
-	shd		pu,pl,4,pl		#   product right 4 bits
-#
-#  ----	bits = 0010 ---- add op1, add op1, then shift 4 bits
-#
-	addb,tr		op1,pu,sh4n		# add 2*op1, to shift 
-	addb,uv 	op1,pu,sh4c		#   product right 4 bits
-#
-#  ---- bits = 0011 ---- add op1, add 2*op1, shift 4 bits
-#
-	addb,tr		op1,pu,sh4n-4		# add op1 & 2*op1, shift 
-	sh1add,nuv 	op1,pu,pu			#   product right 4 bits
-#
-#  ----	bits = 0100 ---- shift 2, add op1, shift 2
-#
+;
+	b		sh4c			; br. if sign overflow
+sh4n	shd		pu,pl,4,pl		; shift product right 4 bits
+	addib,<=	-1,cnt,mulend		; reduce count by 1, exit if
+	extru  		pu,27,28,pu		;   <= zero
+;
+mloop	blr		brindex,gr0		; br. into table
+						;   entries of 2 words
+	extru		op2,27,4,brindex	; next 4 bits into index
+;
+;
+;	branch table for the multiplication process with four multiplier bits
+;
+mtable						; two words per entry
+;
+; ----	bits = 0000 ---- shift product 4 bits -------------------------------
+;
+	b		sh4n+4			; just shift partial
+	shd		pu,pl,4,pl		;   product right 4 bits
+;
+;  ----	bits = 0001 ---- add op1, then shift 4 bits
+;
+	addb,tr		op1,pu,sh4n+4		; add op1 to product, to shift
+	shd		pu,pl,4,pl		;   product right 4 bits
+;
+;  ----	bits = 0010 ---- add op1, add op1, then shift 4 bits
+;
+	addb,tr		op1,pu,sh4n		; add 2*op1, to shift 
+	addb,uv 	op1,pu,sh4c		;   product right 4 bits
+;
+;  ---- bits = 0011 ---- add op1, add 2*op1, shift 4 bits
+;
+	addb,tr		op1,pu,sh4n-4		; add op1 & 2*op1, shift 
+	sh1add,nuv 	op1,pu,pu			;   product right 4 bits
+;
+;  ----	bits = 0100 ---- shift 2, add op1, shift 2
+;
 	b		sh2sa
-	shd		pu,pl,2,pl		# shift product 2 bits
-#
-#  ----	bits = 0101 ---- add op1, shift 2, add op1, and shift 2 again
-#
-	addb,tr		op1,pu,sh2us		# add op1 to product
-	shd		pu,pl,2,pl		# shift 2 bits
-#
-#  ----	bits = 0110 ---- add op1, add op1, shift 2, add op1, and shift 2 again
-#
-	addb,tr		op1,pu,sh2c		# add 2*op1, to shift 2 bits
-	addb,nuv	op1,pu,sh2us		# br. if not overflow
-#
-#  ----	bits = 0111 ---- subtract op1, shift 3, add op1, and shift 1
-#
+	shd		pu,pl,2,pl		; shift product 2 bits
+;
+;  ----	bits = 0101 ---- add op1, shift 2, add op1, and shift 2 again
+;
+	addb,tr		op1,pu,sh2us		; add op1 to product
+	shd		pu,pl,2,pl		; shift 2 bits
+;
+;  ----	bits = 0110 ---- add op1, add op1, shift 2, add op1, and shift 2 again
+;
+	addb,tr		op1,pu,sh2c		; add 2*op1, to shift 2 bits
+	addb,nuv	op1,pu,sh2us		; br. if not overflow
+;
+;  ----	bits = 0111 ---- subtract op1, shift 3, add op1, and shift 1
+;
 	b		sh3s
-	sub		pu,op1,pu		# subtract op1, br. to sh3s
+	sub		pu,op1,pu		; subtract op1, br. to sh3s
 
-#
-#  ----	bits = 1000 ---- shift 3, add op1, shift 1
-#
+;
+;  ----	bits = 1000 ---- shift 3, add op1, shift 1
+;
 	b		sh3sa
-	shd		pu,pl,3,pl		# shift product right 3 bits
-#
-#  ----	bits = 1001 ---- add op1, shift 3, add op1, shift 1
-#
-	addb,tr		op1,pu,sh3us		# add op1, to shift 3, add op1,
-	shd		pu,pl,3,pl		#   and shift 1
-#
-#  ----	bits = 1010 ---- add op1, add op1, shift 3, add op1, shift 1
-#
-	addb,tr		op1,pu,sh3c		# add 2*op1, to shift 3 bits
-	addb,nuv	op1,pu,sh3us		#   br. if no overflow
-#
-#  ----	bits = 1011 ---- add -op1, shift 2, add -op1, shift 2, inc. next index
-#
-	addib,tr	1,brindex,sh2s		# add 1 to index, subtract op1,
-	sub		pu,op1,pu		#   shift 2 with minus sign
-#
-#  ----	bits = 1100 ---- shift 2, subtract op1, shift 2, increment next index
-#
-	addib,tr	1,brindex,sh2sb		# add 1 to index, to shift
-	shd		pu,pl,2,pl		# shift right 2 bits signed
-#
-#  ----	bits = 1101 ---- add op1, shift 2, add -op1, shift 2
-#
-	addb,tr		op1,pu,sh2ns		# add op1, to shift 2
-	shd		pu,pl,2,pl		#   right 2 unsigned, etc.
-#
-#  ----	bits = 1110 ---- shift 1 signed, add -op1, shift 3 signed
-#
-	addib,tr	1,brindex,sh1sa		# add 1 to index, to shift
-	shd		pu,pl,1,pl		# shift 1 bit
-#
-#  ----	bits = 1111 ---- add -op1, shift 4 signed
-#
-	addib,tr	1,brindex,sh4s		# add 1 to index, subtract op1,
-	sub		pu,op1,pu		#   to shift 4 signed
+	shd		pu,pl,3,pl		; shift product right 3 bits
+;
+;  ----	bits = 1001 ---- add op1, shift 3, add op1, shift 1
+;
+	addb,tr		op1,pu,sh3us		; add op1, to shift 3, add op1,
+	shd		pu,pl,3,pl		;   and shift 1
+;
+;  ----	bits = 1010 ---- add op1, add op1, shift 3, add op1, shift 1
+;
+	addb,tr		op1,pu,sh3c		; add 2*op1, to shift 3 bits
+	addb,nuv	op1,pu,sh3us		;   br. if no overflow
+;
+;  ----	bits = 1011 ---- add -op1, shift 2, add -op1, shift 2, inc. next index
+;
+	addib,tr	1,brindex,sh2s		; add 1 to index, subtract op1,
+	sub		pu,op1,pu		;   shift 2 with minus sign
+;
+;  ----	bits = 1100 ---- shift 2, subtract op1, shift 2, increment next index
+;
+	addib,tr	1,brindex,sh2sb		; add 1 to index, to shift
+	shd		pu,pl,2,pl		; shift right 2 bits signed
+;
+;  ----	bits = 1101 ---- add op1, shift 2, add -op1, shift 2
+;
+	addb,tr		op1,pu,sh2ns		; add op1, to shift 2
+	shd		pu,pl,2,pl		;   right 2 unsigned, etc.
+;
+;  ----	bits = 1110 ---- shift 1 signed, add -op1, shift 3 signed
+;
+	addib,tr	1,brindex,sh1sa		; add 1 to index, to shift
+	shd		pu,pl,1,pl		; shift 1 bit
+;
+;  ----	bits = 1111 ---- add -op1, shift 4 signed
+;
+	addib,tr	1,brindex,sh4s		; add 1 to index, subtract op1,
+	sub		pu,op1,pu		;   to shift 4 signed
 
-#
-#  ----	bits = 10000 ---- shift 4 signed
-#
-	addib,tr	1,brindex,sh4s+4		# add 1 to index
-	shd		pu,pl,4,pl		# shift 4 signed
-#
-#  ---- end of table ---------------------------------------------------------
-#
+;
+;  ----	bits = 10000 ---- shift 4 signed
+;
+	addib,tr	1,brindex,sh4s+4		; add 1 to index
+	shd		pu,pl,4,pl		; shift 4 signed
+;
+;  ---- end of table ---------------------------------------------------------
+;
 sh4s	shd		pu,pl,4,pl
-	addib,>		-1,cnt,mloop		# decrement count, loop if > 0
-	shd		pm,pu,4,pu		# shift 4, minus signed
-	addb,tr		op1,pu,lastadd		# do one more add, then finish
-	addb,=,n	saveop2,gr0,fini	# check saveop2
-#
-sh4c	addib,>		-1,cnt,mloop		# decrement count, loop if > 0
-	shd		pc,pu,4,pu		# shift 4 with overflow
-	b		lastadd			# end of multiply
-	addb,=,n	saveop2,gr0,fini	# check saveop2
-#
-sh3c	shd		pu,pl,3,pl		# shift product 3 bits
-	shd		pc,pu,3,pu		# shift 3 signed
-	addb,tr		op1,pu,sh1		# add op1, to shift 1 bit
+	addib,>		-1,cnt,mloop		; decrement count, loop if > 0
+	shd		pm,pu,4,pu		; shift 4, minus signed
+	addb,tr		op1,pu,lastadd		; do one more add, then finish
+	addb,=,n	saveop2,gr0,fini	; check saveop2
+;
+sh4c	addib,>		-1,cnt,mloop		; decrement count, loop if > 0
+	shd		pc,pu,4,pu		; shift 4 with overflow
+	b		lastadd			; end of multiply
+	addb,=,n	saveop2,gr0,fini	; check saveop2
+;
+sh3c	shd		pu,pl,3,pl		; shift product 3 bits
+	shd		pc,pu,3,pu		; shift 3 signed
+	addb,tr		op1,pu,sh1		; add op1, to shift 1 bit
 	shd		pu,pl,1,pl
-#
-sh3us	extru		pu,28,29,pu		# shift 3 unsigned
-	addb,tr		op1,pu,sh1		# add op1, to shift 1 bit
+;
+sh3us	extru		pu,28,29,pu		; shift 3 unsigned
+	addb,tr		op1,pu,sh1		; add op1, to shift 1 bit
 	shd		pu,pl,1,pl
-#
-sh3sa	extrs		pu,28,29,pu		# shift 3 signed
-	addb,tr		op1,pu,sh1		# add op1, to shift 1 bit
+;
+sh3sa	extrs		pu,28,29,pu		; shift 3 signed
+	addb,tr		op1,pu,sh1		; add op1, to shift 1 bit
 	shd		pu,pl,1,pl
-#
-sh3s	shd		pu,pl,3,pl		# shift 3 minus signed
+;
+sh3s	shd		pu,pl,3,pl		; shift 3 minus signed
 	shd		pm,pu,3,pu
-	addb,tr		op1,pu,sh1		# add op1, to shift 1 bit
+	addb,tr		op1,pu,sh1		; add op1, to shift 1 bit
 	shd		pu,pl,1,pl
-#
-sh1	addib,>		-1,cnt,mloop		# loop if count > 0
+;
+sh1	addib,>		-1,cnt,mloop		; loop if count > 0
 	extru		pu,30,31,pu
-	b		lastadd			# end of multiply
-	addb,=,n	saveop2,gr0,fini	# check saveop2
-#
-sh2ns	addib,tr	1,brindex,sh2sb+4	# increment index
-	extru		pu,29,30,pu		# shift unsigned
-#
-sh2s	shd		pu,pl,2,pl		# shift with minus sign 
-	shd		pm,pu,2,pu		# 
-	sub		pu,op1,pu		# subtract op1
-	shd		pu,pl,2,pl		# shift with minus sign
-	addib,>		-1,cnt,mloop		# decrement count, loop if > 0
-	shd		pm,pu,2,pu		# shift with minus sign
-	addb,tr		op1,pu,lastadd		# do one more add, then finish
-	addb,=,n	saveop2,gr0,fini	# check saveop2
-#
-sh2sb	extrs		pu,29,30,pu		# shift 2 signed
-	sub		pu,op1,pu		# subtract op1 from product
-	shd		pu,pl,2,pl		# shift with minus sign
-	addib,>		-1,cnt,mloop		# decrement count, loop if > 0
-	shd		pm,pu,2,pu		# shift with minus sign
-	addb,tr		op1,pu,lastadd		# do one more add, then finish
-	addb,=,n	saveop2,gr0,fini	# check saveop2
-#
-sh1sa	extrs		pu,30,31,pu		#   signed
-	sub		pu,op1,pu		# subtract op1 from product
-	shd		pu,pl,3,pl		# shift 3 with minus sign
-	addib,>		-1,cnt,mloop		# decrement count, loop if >0
+	b		lastadd			; end of multiply
+	addb,=,n	saveop2,gr0,fini	; check saveop2
+;
+sh2ns	addib,tr	1,brindex,sh2sb+4	; increment index
+	extru		pu,29,30,pu		; shift unsigned
+;
+sh2s	shd		pu,pl,2,pl		; shift with minus sign 
+	shd		pm,pu,2,pu		; 
+	sub		pu,op1,pu		; subtract op1
+	shd		pu,pl,2,pl		; shift with minus sign
+	addib,>		-1,cnt,mloop		; decrement count, loop if > 0
+	shd		pm,pu,2,pu		; shift with minus sign
+	addb,tr		op1,pu,lastadd		; do one more add, then finish
+	addb,=,n	saveop2,gr0,fini	; check saveop2
+;
+sh2sb	extrs		pu,29,30,pu		; shift 2 signed
+	sub		pu,op1,pu		; subtract op1 from product
+	shd		pu,pl,2,pl		; shift with minus sign
+	addib,>		-1,cnt,mloop		; decrement count, loop if > 0
+	shd		pm,pu,2,pu		; shift with minus sign
+	addb,tr		op1,pu,lastadd		; do one more add, then finish
+	addb,=,n	saveop2,gr0,fini	; check saveop2
+;
+sh1sa	extrs		pu,30,31,pu		;   signed
+	sub		pu,op1,pu		; subtract op1 from product
+	shd		pu,pl,3,pl		; shift 3 with minus sign
+	addib,>		-1,cnt,mloop		; decrement count, loop if >0
 	shd		pm,pu,3,pu		 
-	addb,tr		op1,pu,lastadd		# do one more add, then finish
-	addb,=,n	saveop2,gr0,fini	# check saveop2
-#
-fini0	movib,tr	0,pl,fini		# product = 0 as op1 = 0
-	stws		pu,0(arg2)		# save high part of result
-#
-sh2us	extru		pu,29,30,pu		# shift 2 unsigned
-	addb,tr		op1,pu,sh2a		# add op1
-	shd		pu,pl,2,pl		# shift 2 bits
-#
+	addb,tr		op1,pu,lastadd		; do one more add, then finish
+	addb,=,n	saveop2,gr0,fini	; check saveop2
+;
+fini0	movib,tr	0,pl,fini		; product = 0 as op1 = 0
+	stws		pu,0(arg2)		; save high part of result
+;
+sh2us	extru		pu,29,30,pu		; shift 2 unsigned
+	addb,tr		op1,pu,sh2a		; add op1
+	shd		pu,pl,2,pl		; shift 2 bits
+;
 sh2c	shd		pu,pl,2,pl	
-	shd		pc,pu,2,pu		# shift with carry
-	addb,tr		op1,pu,sh2a		# add op1 to product
-	shd		pu,pl,2,pl		# br. to sh2 to shift pu
-#
-sh2sa	extrs		pu,29,30,pu		# shift with sign
-	addb,tr		op1,pu,sh2a		# add op1 to product
-	shd		pu,pl,2,pl		# br. to sh2 to shift pu
-#
-sh2a	addib,>		-1,cnt,mloop		# loop if count > 0
+	shd		pc,pu,2,pu		; shift with carry
+	addb,tr		op1,pu,sh2a		; add op1 to product
+	shd		pu,pl,2,pl		; br. to sh2 to shift pu
+;
+sh2sa	extrs		pu,29,30,pu		; shift with sign
+	addb,tr		op1,pu,sh2a		; add op1 to product
+	shd		pu,pl,2,pl		; br. to sh2 to shift pu
+;
+sh2a	addib,>		-1,cnt,mloop		; loop if count > 0
 	extru		pu,29,30,pu
-#
-mulend	addb,=,n	saveop2,gr0,fini	# check saveop2
-lastadd	shd		saveop2,gr0,1,temp	#  if saveop2 <> 0, shift it
-	shd		gr0,saveop2,1,saveop2	#  left 31 and add to result
+;
+mulend	addb,=,n	saveop2,gr0,fini	; check saveop2
+lastadd	shd		saveop2,gr0,1,temp	;  if saveop2 <> 0, shift it
+	shd		gr0,saveop2,1,saveop2	;  left 31 and add to result
 	add		pl,temp,pl
 	addc		pu,saveop2,pu
-#
-#	finish
-#
-fini	stws		pu,0(arg2)		# save high part of result
-	stws		pl,4(arg2)		# save low part of result
+;
+;	finish
+;
+fini	stws		pu,0(arg2)		; save high part of result
+	stws		pl,4(arg2)		; save low part of result
 
-	ldws,mb		-4(sp),pm		# restore registers
-	ldws,mb		-4(sp),pc		# restore registers
-	ldws,mb		-4(sp),saveop2		# restore registers
-	ldws,mb		-4(sp),brindex		# restore registers
-	ldws,mb		-4(sp),cnt		# restore registers
-	ldws,mb		-4(sp),op1		# restore registers
-	ldws,mb		-4(sp),pl		# restore registers
-	bv		0(rp)			# return
-	ldws,mb		-4(sp),pu		# restore registers
+	ldws,mb		-4(sp),pm		; restore registers
+	ldws,mb		-4(sp),pc		; restore registers
+	ldws,mb		-4(sp),saveop2		; restore registers
+	ldws,mb		-4(sp),brindex		; restore registers
+	ldws,mb		-4(sp),cnt		; restore registers
+	ldws,mb		-4(sp),op1		; restore registers
+	ldws,mb		-4(sp),pl		; restore registers
+	bv		0(rp)			; return
+	ldws,mb		-4(sp),pu		; restore registers
 
 	.procend
 	.end
diff --git a/sys/arch/hppa/spmath/md.h b/sys/arch/hppa/spmath/md.h
index d4d1591920c..d2b4701f612 100644
--- a/sys/arch/hppa/spmath/md.h
+++ b/sys/arch/hppa/spmath/md.h
@@ -1,3 +1,5 @@
+/*	$OpenBSD: md.h,v 1.3 1998/07/02 19:05:35 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -37,6 +39,8 @@
  * suitability of this software for any purpose.
  */
 
+#include <sys/cdefs.h>
+
 /*****************************************************************
  * Muliply/Divide SFU Internal State                             *
  *****************************************************************/
@@ -77,6 +81,8 @@ typedef int boolean;
 #define BIT30 0x2
 #define BIT31 0x1
 
+	/* Simply copy the arguments to the emulated copies of the registers */
+#define	mdrr(reg1,reg2,result)	{result_hi = reg1;result_lo = reg2;}
 
 /*
  *  Structures
@@ -86,3 +92,22 @@ struct md_state {
 	int resulthi,	/* high word of result */
 	    resultlo;	/* low word of result */
 };
+
+void divsfm __P((int, int, struct mdsfu_register *));
+void divsfr __P((int, int, struct mdsfu_register *));
+void divsim __P((int, int, struct mdsfu_register *));
+void divsir __P((int, int, struct mdsfu_register *));
+
+void divu __P((int, int, int, struct mdsfu_register *));
+void divufr __P((unsigned int, unsigned int, struct mdsfu_register *));
+void divuir __P((unsigned int, unsigned int, struct mdsfu_register *));
+
+void mpyaccs __P((int, int, struct mdsfu_register *));
+void mpyaccu __P((unsigned int, unsigned int, struct mdsfu_register *));
+void mpys __P((int, int, struct mdsfu_register *));
+void mpyscv __P((int, int, struct mdsfu_register *));
+void mpyu __P((unsigned int, unsigned int, struct mdsfu_register *));
+void mpyucv __P((unsigned int, unsigned int, struct mdsfu_register *));
+
+int impys __P((int *, int *, struct mdsfu_register *));
+int impyu __P((int *, int *, struct mdsfu_register *));
diff --git a/sys/arch/hppa/spmath/mdrr.c b/sys/arch/hppa/spmath/mdrr.c
deleted file mode 100644
index 6a6cec1b2a3..00000000000
--- a/sys/arch/hppa/spmath/mdrr.c
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
- * Copyright 1996 1995 by Open Software Foundation, Inc.   
- *              All Rights Reserved 
- *  
- * Permission to use, copy, modify, and distribute this software and 
- * its documentation for any purpose and without fee is hereby granted, 
- * provided that the above copyright notice appears in all copies and 
- * that both the copyright notice and this permission notice appear in 
- * supporting documentation. 
- *  
- * OSF DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE 
- * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 
- * FOR A PARTICULAR PURPOSE. 
- *  
- * IN NO EVENT SHALL OSF BE LIABLE FOR ANY SPECIAL, INDIRECT, OR 
- * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM 
- * LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT, 
- * NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION 
- * WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 
- * 
- */
-/*
- * pmk1.1
- */
-/*
- * (c) Copyright 1986 HEWLETT-PACKARD COMPANY
- *
- * To anyone who acknowledges that this file is provided "AS IS" 
- * without any express or implied warranty:
- *     permission to use, copy, modify, and distribute this file 
- * for any purpose is hereby granted without fee, provided that 
- * the above copyright notice and this notice appears in all 
- * copies, and that the name of Hewlett-Packard Company not be 
- * used in advertising or publicity pertaining to distribution 
- * of the software without specific, written prior permission.  
- * Hewlett-Packard Company makes no representations about the 
- * suitability of this software for any purpose.
- */
-
-#ifdef HPE
-#include "hmd.asmassis.official"
-#else /* HPE */
-#include "../spmath/md.h"
-#endif /* HPE */
-
-void
-mdrr(reg1,reg2,result)
-    int reg1, reg2;
-    struct mdsfu_register *result;
-    {
-    /* Simply copy the arguments to the emulated copies of the registers */
-    result_hi = reg1;
-    result_lo = reg2;
-    }
diff --git a/sys/arch/hppa/spmath/mpyaccs.c b/sys/arch/hppa/spmath/mpyaccs.c
index aed43770097..079df8ff5ec 100644
--- a/sys/arch/hppa/spmath/mpyaccs.c
+++ b/sys/arch/hppa/spmath/mpyaccs.c
@@ -1,3 +1,5 @@
+/*	$OpenBSD: mpyaccs.c,v 1.3 1998/07/02 19:05:40 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -38,9 +40,10 @@
  */
 
 
-#include "../spmath/md.h"
+#include "md.h"
 
-VOID mpyaccs(opnd1,opnd2,result)
+void
+mpyaccs(opnd1,opnd2,result)
 
 int opnd1, opnd2;
 struct mdsfu_register *result;
diff --git a/sys/arch/hppa/spmath/mpyaccu.c b/sys/arch/hppa/spmath/mpyaccu.c
index 25fbd55d596..6dc9611d935 100644
--- a/sys/arch/hppa/spmath/mpyaccu.c
+++ b/sys/arch/hppa/spmath/mpyaccu.c
@@ -1,3 +1,5 @@
+/*	$OpenBSD: mpyaccu.c,v 1.3 1998/07/02 19:05:42 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -40,7 +42,8 @@
 
 #include "../spmath/md.h"
 
-VOID mpyaccu(opnd1,opnd2,result)
+void
+mpyaccu(opnd1,opnd2,result)
 
 unsigned int opnd1, opnd2;
 struct mdsfu_register *result;
diff --git a/sys/arch/hppa/spmath/mpys.c b/sys/arch/hppa/spmath/mpys.c
index a6d0392aed3..2404fa9714d 100644
--- a/sys/arch/hppa/spmath/mpys.c
+++ b/sys/arch/hppa/spmath/mpys.c
@@ -1,3 +1,5 @@
+/*	$OpenBSD: mpys.c,v 1.3 1998/07/02 19:05:43 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -40,7 +42,8 @@
 
 #include "../spmath/md.h"
 
-VOID mpys(opnd1,opnd2,result)
+void
+mpys(opnd1,opnd2,result)
 
 int opnd1, opnd2;
 struct mdsfu_register *result;
diff --git a/sys/arch/hppa/spmath/mpyscv.c b/sys/arch/hppa/spmath/mpyscv.c
index b58948bd4d8..ccd19938c0e 100644
--- a/sys/arch/hppa/spmath/mpyscv.c
+++ b/sys/arch/hppa/spmath/mpyscv.c
@@ -1,3 +1,5 @@
+/*	$OpenBSD: mpyscv.c,v 1.3 1998/07/02 19:05:44 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -40,7 +42,8 @@
 
 #include "../spmath/md.h"
 
-VOID mpyscv(opnd1,opnd2,result)
+void
+mpyscv(opnd1,opnd2,result)
 
 int opnd1, opnd2;
 struct mdsfu_register *result;
diff --git a/sys/arch/hppa/spmath/mpyu.c b/sys/arch/hppa/spmath/mpyu.c
index 8372a44cb00..8a62afb8178 100644
--- a/sys/arch/hppa/spmath/mpyu.c
+++ b/sys/arch/hppa/spmath/mpyu.c
@@ -1,3 +1,5 @@
+/*	$OpenBSD: mpyu.c,v 1.3 1998/07/02 19:05:46 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -38,9 +40,10 @@
  */
 
 
-#include "../spmath/md.h"
+#include "md.h"
 
-VOID mpyu(opnd1,opnd2,result)
+void
+mpyu(opnd1,opnd2,result)
 
 unsigned int opnd1, opnd2;
 struct mdsfu_register *result;
diff --git a/sys/arch/hppa/spmath/mpyucv.c b/sys/arch/hppa/spmath/mpyucv.c
index aa5dd75135e..921ececfaea 100644
--- a/sys/arch/hppa/spmath/mpyucv.c
+++ b/sys/arch/hppa/spmath/mpyucv.c
@@ -1,3 +1,5 @@
+/*	$OpenBSD: mpyucv.c,v 1.3 1998/07/02 19:05:47 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -38,9 +40,10 @@
  */
 
 
-#include "../spmath/md.h"
+#include "md.h"
 
-VOID mpyucv(opnd1,opnd2,result)
+void
+mpyucv(opnd1,opnd2,result)
 
 unsigned int opnd1, opnd2;
 struct mdsfu_register *result;
diff --git a/sys/arch/hppa/spmath/quad_float.h b/sys/arch/hppa/spmath/quad_float.h
index 8af2b9eea29..14a9a2120d5 100644
--- a/sys/arch/hppa/spmath/quad_float.h
+++ b/sys/arch/hppa/spmath/quad_float.h
@@ -1,3 +1,5 @@
+/*	$OpenBSD: quad_float.h,v 1.3 1998/07/02 19:05:49 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -96,3 +98,5 @@
     Qallp4(leftp4)  = Qallp4(leftp4) XOR Qallp4(rightp4)	\
     Qallp4(rightp4) = Qallp4(leftp4) XOR Qallp4(rightp4)	\
     Qallp4(leftp4)  = Qallp4(leftp4) XOR Qallp4(rightp4)
+
+int quad_frnd __P((quad_floating_point *, void *, quad_floating_point *, unsigned int *));
diff --git a/sys/arch/hppa/spmath/setovfl.c b/sys/arch/hppa/spmath/setovfl.c
index 60c8e285412..c4b61303ea0 100644
--- a/sys/arch/hppa/spmath/setovfl.c
+++ b/sys/arch/hppa/spmath/setovfl.c
@@ -1,3 +1,5 @@
+/*	$OpenBSD: setovfl.c,v 1.3 1998/07/02 19:05:50 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -73,8 +75,8 @@ unsigned int sign;
 		case ROUNDZERO:
 			Sgl_setlargest(result,sign);
 	}
-	return(result);
 	*/
+	return(result);
 }
 
 dbl_floating_point dbl_setoverflow(sign)
@@ -108,6 +110,6 @@ unsigned int sign;
 		case ROUNDZERO:
 			Dbl_setlargest(result,sign);
 	}
-	return(result);
 	*/
+	return(result);
 }
diff --git a/sys/arch/hppa/spmath/sfadd.c b/sys/arch/hppa/spmath/sfadd.c
index 55208a4d9c5..3e052e85d50 100644
--- a/sys/arch/hppa/spmath/sfadd.c
+++ b/sys/arch/hppa/spmath/sfadd.c
@@ -1,3 +1,5 @@
+/*	$OpenBSD: sfadd.c,v 1.3 1998/07/02 19:05:51 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -43,6 +45,7 @@
 /*
  * Single_add: add two single precision values.
  */
+int
 sgl_fadd(leftptr, rightptr, dstptr, status)
     sgl_floating_point *leftptr, *rightptr, *dstptr;
     unsigned int *status;
@@ -491,10 +494,11 @@ sgl_fadd(leftptr, rightptr, dstptr, status)
 	    {
 	    Sgl_setwrapped_exponent(result,result_exponent,ovfl);
 	    *dstptr = result;
-	    if (inexact)
+	    if (inexact) {
 		if (Is_inexacttrap_enabled())
 		    return(OVERFLOWEXCEPTION | INEXACTEXCEPTION);
 		else Set_inexactflag();
+	    }
 	    return(OVERFLOWEXCEPTION);
 	    }
         else
@@ -506,8 +510,9 @@ sgl_fadd(leftptr, rightptr, dstptr, status)
 	}
     else Sgl_set_exponent(result,result_exponent);
     *dstptr = result;
-    if(inexact) 
+    if(inexact) {
 	if(Is_inexacttrap_enabled()) return(INEXACTEXCEPTION);
 	else Set_inexactflag();
+    }
     return(NOEXCEPTION);
     }
diff --git a/sys/arch/hppa/spmath/sfcmp.c b/sys/arch/hppa/spmath/sfcmp.c
index e663235852b..369ca341476 100644
--- a/sys/arch/hppa/spmath/sfcmp.c
+++ b/sys/arch/hppa/spmath/sfcmp.c
@@ -1,3 +1,5 @@
+/*	$OpenBSD: sfcmp.c,v 1.3 1998/07/02 19:05:53 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -43,6 +45,7 @@
 /*
  * sgl_cmp: compare two values
  */
+int
 sgl_fcmp(leftptr, rightptr, cond, status)
     sgl_floating_point *leftptr, *rightptr;
     unsigned int cond; /* The predicate to be tested */
diff --git a/sys/arch/hppa/spmath/sfdiv.c b/sys/arch/hppa/spmath/sfdiv.c
index b1e8c1bb29b..9ea439aed50 100644
--- a/sys/arch/hppa/spmath/sfdiv.c
+++ b/sys/arch/hppa/spmath/sfdiv.c
@@ -1,3 +1,5 @@
+/*	$OpenBSD: sfdiv.c,v 1.3 1998/07/02 19:05:56 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -43,7 +45,7 @@
 /*
  *  Single Precision Floating-point Divide
  */
-
+int
 sgl_fdiv(srcptr1,srcptr2,dstptr,status)
 
 sgl_floating_point *srcptr1, *srcptr2, *dstptr;
@@ -289,10 +291,11 @@ unsigned int *status;
                          */
                         Sgl_setwrapped_exponent(result,dest_exponent,ovfl);
                         *dstptr = result;
-                        if (inexact) 
+                        if (inexact) {
                             if (Is_inexacttrap_enabled())
                                 return(OVERFLOWEXCEPTION | INEXACTEXCEPTION);
                             else Set_inexactflag();
+			}
                         return(OVERFLOWEXCEPTION);
                 }
 		Set_overflowflag();
@@ -311,10 +314,11 @@ unsigned int *status;
                          */
                         Sgl_setwrapped_exponent(result,dest_exponent,unfl);
                         *dstptr = result;
-                        if (inexact) 
+                        if (inexact) {
                             if (Is_inexacttrap_enabled())
                                 return(UNDERFLOWEXCEPTION | INEXACTEXCEPTION);
                             else Set_inexactflag();
+			}
                         return(UNDERFLOWEXCEPTION);
                 }
 
diff --git a/sys/arch/hppa/spmath/sfmpy.c b/sys/arch/hppa/spmath/sfmpy.c
index 77b363c501a..2368657fc07 100644
--- a/sys/arch/hppa/spmath/sfmpy.c
+++ b/sys/arch/hppa/spmath/sfmpy.c
@@ -1,3 +1,5 @@
+/*	$OpenBSD: sfmpy.c,v 1.3 1998/07/02 19:05:58 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -43,7 +45,7 @@
 /*
  *  Single Precision Floating-point Multiply
  */
-
+int
 sgl_fmpy(srcptr1,srcptr2,dstptr,status)
 
 sgl_floating_point *srcptr1, *srcptr2, *dstptr;
@@ -273,10 +275,11 @@ unsigned int *status;
                          */
 			Sgl_setwrapped_exponent(result,dest_exponent,ovfl);
 			*dstptr = result;
-			if (inexact) 
+			if (inexact) {
 			    if (Is_inexacttrap_enabled())
 				return(OVERFLOWEXCEPTION | INEXACTEXCEPTION);
 			    else Set_inexactflag();
+			}
 			return(OVERFLOWEXCEPTION);
                 }
 		inexact = TRUE;
@@ -295,10 +298,11 @@ unsigned int *status;
                          */
 			Sgl_setwrapped_exponent(result,dest_exponent,unfl);
 			*dstptr = result;
-			if (inexact) 
+			if (inexact) {
 			    if (Is_inexacttrap_enabled())
 				return(UNDERFLOWEXCEPTION | INEXACTEXCEPTION);
 			    else Set_inexactflag();
+			}
 			return(UNDERFLOWEXCEPTION);
                 }
 
diff --git a/sys/arch/hppa/spmath/sfrem.c b/sys/arch/hppa/spmath/sfrem.c
index d186a9955e7..8a51e9f1088 100644
--- a/sys/arch/hppa/spmath/sfrem.c
+++ b/sys/arch/hppa/spmath/sfrem.c
@@ -1,3 +1,5 @@
+/*	$OpenBSD: sfrem.c,v 1.3 1998/07/02 19:05:59 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -44,7 +46,7 @@
 /*
  *  Single Precision Floating-point Remainder
  */
-
+int
 sgl_frem(srcptr1,srcptr2,dstptr,status)
 
 sgl_floating_point *srcptr1, *srcptr2, *dstptr;
diff --git a/sys/arch/hppa/spmath/sfsqrt.c b/sys/arch/hppa/spmath/sfsqrt.c
index ae78a9c33cb..72d7853f7fb 100644
--- a/sys/arch/hppa/spmath/sfsqrt.c
+++ b/sys/arch/hppa/spmath/sfsqrt.c
@@ -1,3 +1,5 @@
+/*	$OpenBSD: sfsqrt.c,v 1.3 1998/07/02 19:06:01 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -45,10 +47,12 @@
  */
 
 /*ARGSUSED*/
+int
 sgl_fsqrt(srcptr,nullptr,dstptr,status)
 
 sgl_floating_point *srcptr, *dstptr;
-unsigned int *nullptr, *status;
+void *nullptr;
+unsigned int *status;
 {
 	register unsigned int src, result;
 	register int src_exponent, newbit, sum;
diff --git a/sys/arch/hppa/spmath/sfsub.c b/sys/arch/hppa/spmath/sfsub.c
index fed32bbf494..9695a63c55f 100644
--- a/sys/arch/hppa/spmath/sfsub.c
+++ b/sys/arch/hppa/spmath/sfsub.c
@@ -1,3 +1,5 @@
+/*	$OpenBSD: sfsub.c,v 1.3 1998/07/02 19:06:02 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -43,6 +45,7 @@
 /*
  * Single_subtract: subtract two single precision values.
  */
+int
 sgl_fsub(leftptr, rightptr, dstptr, status)
     sgl_floating_point *leftptr, *rightptr, *dstptr;
     unsigned int *status;
@@ -494,10 +497,11 @@ sgl_fsub(leftptr, rightptr, dstptr, status)
 	    {
 	    Sgl_setwrapped_exponent(result,result_exponent,ovfl);
 	    *dstptr = result;
-	    if (inexact)
+	    if (inexact) {
 		if (Is_inexacttrap_enabled())
 		    return(OVERFLOWEXCEPTION | INEXACTEXCEPTION);
 		else Set_inexactflag();
+	    }
 	    return(OVERFLOWEXCEPTION);
 	    }
         else
@@ -509,8 +513,9 @@ sgl_fsub(leftptr, rightptr, dstptr, status)
 	}
     else Sgl_set_exponent(result,result_exponent);
     *dstptr = result;
-    if(inexact) 
+    if(inexact) {
 	if(Is_inexacttrap_enabled()) return(INEXACTEXCEPTION);
 	else Set_inexactflag();
+    }
     return(NOEXCEPTION);
     }
diff --git a/sys/arch/hppa/spmath/sgl_float.h b/sys/arch/hppa/spmath/sgl_float.h
index dc8cd016798..bac3d56215d 100644
--- a/sys/arch/hppa/spmath/sgl_float.h
+++ b/sys/arch/hppa/spmath/sgl_float.h
@@ -1,3 +1,5 @@
+/*	$OpenBSD: sgl_float.h,v 1.3 1998/07/02 19:06:03 mickey Exp $	*/
+
 /*
  * Copyright 1996 1995 by Open Software Foundation, Inc.   
  *              All Rights Reserved 
@@ -35,6 +37,9 @@
  * Hewlett-Packard Company makes no representations about the 
  * suitability of this software for any purpose.
  */
+
+#include <sys/cdefs.h>
+
 /******************************
  * Single precision functions *
  ******************************/
@@ -73,7 +78,7 @@
     Sall(srcdst) <<= varamount
 #define Sgl_rightshift_exponentmantissa(srcdst, varamount) \
     Sall(srcdst) = \
-	(Sexponentmantissa(srcdst) >> varamount) | (Sall(srcdst) & (1<<31))
+	(Sexponentmantissa(srcdst) >> (varamount)) | (Sall(srcdst) & (1<<31))
 
 #define Sgl_leftshiftby1_withextent(left,right,result) \
     Shiftdouble(Sall(left),Extall(right),31,Sall(result))
@@ -212,7 +217,7 @@
 
 #define Sgl_setlargestpositive(sgl_value) 				\
     Sall(sgl_value) = ((SGL_EMAX+SGL_BIAS) << (32-(1+SGL_EXP_LENGTH)))	\
-                      | ((1<<(32-(1+SGL_EXP_LENGTH))) - 1 )
+                      | ((1<<(32-(1+SGL_EXP_LENGTH))) - 1)
 #define Sgl_setlargestnegative(sgl_value)				\
     Sall(sgl_value) = ((SGL_EMAX+SGL_BIAS) << (32-(1+SGL_EXP_LENGTH)))	\
                       | ((1<<(32-(1+SGL_EXP_LENGTH))) - 1 ) | (1<<31)
@@ -221,11 +226,11 @@
     Sall(sgl_value) = 				\
     ((1<<SGL_EXP_LENGTH) | SGL_INFINITY_EXPONENT) << (32-(1+SGL_EXP_LENGTH))
 #define Sgl_setlargest(sgl_value,sign) 					\
-    Sall(sgl_value) = sign << 31 |					\
+    Sall(sgl_value) = ((sign) << 31) |					\
         (((SGL_EMAX+SGL_BIAS) << (32-(1+SGL_EXP_LENGTH)))		\
 	  | ((1 << (32-(1+SGL_EXP_LENGTH))) - 1 ))
 #define Sgl_setlargest_exponentmantissa(sgl_value)			\
-    Sall(sgl_value) = Sall(sgl_value) & (1<<31) |			\
+    Sall(sgl_value) = (Sall(sgl_value) & (1<<31)) |			\
         (((SGL_EMAX+SGL_BIAS) << (32-(1+SGL_EXP_LENGTH)))		\
 	  | ((1 << (32-(1+SGL_EXP_LENGTH))) - 1 ))
 
@@ -316,9 +321,9 @@
 #define Sgl_denormalize(opnd,exponent,guard,sticky,inexact)		\
 	Sgl_clear_signexponent_set_hidden(opnd);			\
 	if (exponent >= (1 - SGL_P)) {					\
-		guard = (Sall(opnd) >> -exponent) & 1;			\
+		guard = (Sall(opnd) >> (-(exponent))) & 1;		\
 		if (exponent < 0) sticky |= Sall(opnd) << (32+exponent); \
-		inexact = guard | sticky;				\
+		inexact = (guard) | (sticky);				\
 		Sall(opnd) >>= (1-exponent);				\
 	}								\
 	else {								\
@@ -327,3 +332,14 @@
 		inexact = sticky;					\
 		Sgl_setzero(opnd);					\
 	}
+
+sgl_floating_point sgl_setoverflow __P((unsigned int));
+int sgl_fadd __P((sgl_floating_point *, sgl_floating_point *, sgl_floating_point *, unsigned int *));
+int sgl_fcmp __P((sgl_floating_point *, sgl_floating_point *, unsigned int, unsigned int *));
+int sgl_fdiv __P((sgl_floating_point *, sgl_floating_point *, sgl_floating_point *, unsigned int *));
+int sgl_fmpy __P((sgl_floating_point *, sgl_floating_point *, sgl_floating_point *, unsigned int *));
+int sgl_frem __P((sgl_floating_point *, sgl_floating_point *, sgl_floating_point *, unsigned int *));
+int sgl_fsqrt __P((sgl_floating_point *, void *, sgl_floating_point *, unsigned int *));
+int sgl_fsub __P((sgl_floating_point *, sgl_floating_point *, sgl_floating_point *, unsigned int *));
+int sgl_frnd __P((sgl_floating_point *, void *, sgl_floating_point *, unsigned int *));
+