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authorMichael Shalayeff <mickey@cvs.openbsd.org>2006-04-27 15:37:56 +0000
committerMichael Shalayeff <mickey@cvs.openbsd.org>2006-04-27 15:37:56 +0000
commit35b8d554a33affaf6b27876352c24652d73dab77 (patch)
tree96c478ed97d3ba2b010c6e8672e65eadd0de8127 /sys/arch/i386/include/tss.h
parent11dad837ff643b7f59fbcfae411104a49ab48410 (diff)
implement separate PAE pmap that allows access to 64g of physmem
if supported by the cpu(s). currently not enabled by default and not compiled into ramdisks. this grows paddr_t to 64bit but yet leaves bus_addr_t at 32bits. measures are taken to favour dmaable memory allocation from below 4g line such that buffer cache is already allocated form below, pool backend allocator prefers lower memory and then finally bounce buffers are used as last resort. PAE is engaged only if global variable cpu_pae is manually set to non-zero and there is physical memory present above 4g. simplify pcibios address math to use u_long as we always will be in the 32bit space.
Diffstat (limited to 'sys/arch/i386/include/tss.h')
-rw-r--r--sys/arch/i386/include/tss.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/sys/arch/i386/include/tss.h b/sys/arch/i386/include/tss.h
index 20f6f38f7d5..7590b8ce3a1 100644
--- a/sys/arch/i386/include/tss.h
+++ b/sys/arch/i386/include/tss.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: tss.h,v 1.6 2003/06/02 23:27:47 millert Exp $ */
+/* $OpenBSD: tss.h,v 1.7 2006/04/27 15:37:53 mickey Exp $ */
/* $NetBSD: tss.h,v 1.6 1995/10/11 04:20:28 mycroft Exp $ */
/*-
@@ -50,7 +50,7 @@ struct i386tss {
int __tss_ss1;
int __tss_esp2;
int __tss_ss2;
- int tss_cr3; /* page directory paddr */
+ int tss_cr3; /* page directory [pointer] paddr */
int __tss_eip;
int __tss_eflags;
int __tss_eax;