diff options
| author | Artur Grabowski <art@cvs.openbsd.org> | 2008-08-13 15:46:22 +0000 |
|---|---|---|
| committer | Artur Grabowski <art@cvs.openbsd.org> | 2008-08-13 15:46:22 +0000 |
| commit | 77b098353d39395969c7f9f95b90d104a884ca8a (patch) | |
| tree | e468ebd24157a14e712ea7daa362853c0b275e50 /sys/arch/i386/include | |
| parent | 7c0b6e385e1a3db611671cc0e443279a4d50f2b2 (diff) | |
Disable the fantastics mis-feature on some newer Turion CPUs called C1E.
This "power saving" disables the apic when both cpu cores hit the hlt
instruction which kills our timer.
From FreeBSD.
(poked by kettenis)
Diffstat (limited to 'sys/arch/i386/include')
| -rw-r--r-- | sys/arch/i386/include/specialreg.h | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/sys/arch/i386/include/specialreg.h b/sys/arch/i386/include/specialreg.h index 3efc505c191..af65c0be9ea 100644 --- a/sys/arch/i386/include/specialreg.h +++ b/sys/arch/i386/include/specialreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: specialreg.h,v 1.33 2008/06/13 00:00:45 jsg Exp $ */ +/* $OpenBSD: specialreg.h,v 1.34 2008/08/13 15:46:21 art Exp $ */ /* $NetBSD: specialreg.h,v 1.7 1994/10/27 04:16:26 cgd Exp $ */ /*- @@ -274,6 +274,10 @@ #define MSR_FSBASE 0xc0000100 /* 64bit offset for fs: */ #define MSR_GSBASE 0xc0000101 /* 64bit offset for gs: */ #define MSR_KERNELGSBASE 0xc0000102 /* storage for swapgs ins */ +#define MSR_INT_PEN_MSG 0xc0010055 /* Interrupt pending message */ + +#define IPM_C1E_CMP_HLT 0x10000000 +#define IPM_SMI_CMP_HLT 0x08000000 /* * These require a 'passcode' for access. See cpufunc.h. |