summaryrefslogtreecommitdiff
path: root/sys/arch/i386/include
diff options
context:
space:
mode:
authorTheo de Raadt <deraadt@cvs.openbsd.org>2004-02-01 19:05:24 +0000
committerTheo de Raadt <deraadt@cvs.openbsd.org>2004-02-01 19:05:24 +0000
commit674770922e1c4de03caa86793ce2b4a44d482978 (patch)
treeb69ab7fbec510beef8ffab98791d2b1b4f213543 /sys/arch/i386/include
parent15f049748c018b0444e212573550de66dfb3d929 (diff)
Enable FXSR all the time, and cope with NPX/FXSR conversions; from netbsd.
Pass SSE/SSE2/XCRYPT flags out via syctl, and prepare for being able to do xcrypt-* in userland; ok naddy, tested a lot by pvalchev and jolan, also works on amd64 in 32bit mode
Diffstat (limited to 'sys/arch/i386/include')
-rw-r--r--sys/arch/i386/include/cpu.h16
-rw-r--r--sys/arch/i386/include/npx.h56
-rw-r--r--sys/arch/i386/include/pcb.h9
-rw-r--r--sys/arch/i386/include/psl.h3
4 files changed, 73 insertions, 11 deletions
diff --git a/sys/arch/i386/include/cpu.h b/sys/arch/i386/include/cpu.h
index 2750fabdda6..ef70e5f86fc 100644
--- a/sys/arch/i386/include/cpu.h
+++ b/sys/arch/i386/include/cpu.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: cpu.h,v 1.56 2004/02/01 12:26:45 grange Exp $ */
+/* $OpenBSD: cpu.h,v 1.57 2004/02/01 19:05:23 deraadt Exp $ */
/* $NetBSD: cpu.h,v 1.35 1996/05/05 19:29:26 christos Exp $ */
/*-
@@ -163,6 +163,10 @@ void fix_f00f(void);
/* dkcsum.c */
void dkcsumattach(void);
+extern int i386_use_fxsave;
+extern int i386_has_sse;
+extern int i386_has_sse2;
+
/* machdep.c */
void dumpconf(void);
void cpu_reset(void);
@@ -257,7 +261,11 @@ void setconf(void);
#define CPU_KBDRESET 10 /* keyboard reset under pcvt */
#define CPU_APMHALT 11 /* halt -p hack */
#define CPU_USERLDT 12
-#define CPU_MAXID 13 /* number of valid machdep ids */
+#define CPU_OSFXSR 13 /* uses FXSAVE/FXRSTOR */
+#define CPU_SSE 14 /* supports SSE */
+#define CPU_SSE2 15 /* supports SSE2 */
+#define CPU_XCRYPT 16 /* supports VIA xcrypt in userland */
+#define CPU_MAXID 17 /* number of valid machdep ids */
#define CTL_MACHDEP_NAMES { \
{ 0, 0 }, \
@@ -273,6 +281,10 @@ void setconf(void);
{ "kbdreset", CTLTYPE_INT }, \
{ "apmhalt", CTLTYPE_INT }, \
{ "userldt", CTLTYPE_INT }, \
+ { "osfxsr", CTLTYPE_INT }, \
+ { "sse", CTLTYPE_INT }, \
+ { "sse2", CTLTYPE_INT }, \
+ { "xcrypt", CTLTYPE_INT }, \
}
#endif /* !_I386_CPU_H_ */
diff --git a/sys/arch/i386/include/npx.h b/sys/arch/i386/include/npx.h
index c9fab4ffe9b..d6f906efb46 100644
--- a/sys/arch/i386/include/npx.h
+++ b/sys/arch/i386/include/npx.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: npx.h,v 1.5 2003/06/02 23:27:47 millert Exp $ */
+/* $OpenBSD: npx.h,v 1.6 2004/02/01 19:05:23 deraadt Exp $ */
/* $NetBSD: npx.h,v 1.11 1994/10/27 04:16:11 cgd Exp $ */
/*-
@@ -86,9 +86,48 @@ struct save87 {
u_long sv_ex_tw; /* tag word for last exception */
};
-/* For the pcb. */
-union fsave87 {
- struct save87 npx;
+/* Environment of FPU/MMX/SSE/SSE2. */
+struct envxmm {
+/*0*/ uint16_t en_cw; /* FPU Control Word */
+ uint16_t en_sw; /* FPU Status Word */
+ uint8_t en_rsvd0;
+ uint8_t en_tw; /* FPU Tag Word (abridged) */
+ uint16_t en_opcode; /* FPU Opcode */
+ uint32_t en_fip; /* FPU Instruction Pointer */
+ uint16_t en_fcs; /* FPU IP selector */
+ uint16_t en_rsvd1;
+/*16*/ uint32_t en_foo; /* FPU Data pointer */
+ uint16_t en_fos; /* FPU Data pointer selector */
+ uint16_t en_rsvd2;
+ uint32_t en_mxcsr; /* MXCSR Register State */
+ uint32_t en_rsvd3;
+};
+
+/* FPU regsters in the extended save format. */
+struct fpaccxmm {
+ uint8_t fp_bytes[10];
+ uint8_t fp_rsvd[6];
+};
+
+/* SSE/SSE2 registers. */
+struct xmmreg {
+ uint8_t sse_bytes[16];
+};
+
+/* FPU/MMX/SSE/SSE2 context */
+struct savexmm {
+ struct envxmm sv_env; /* control/status context */
+ struct fpaccxmm sv_ac[8]; /* ST/MM regs */
+ struct xmmreg sv_xmmregs[8]; /* XMM regs */
+ uint8_t sv_rsvd[16 * 14];
+ /* 512-bytes --- end of hardware portion of save area */
+ uint32_t sv_ex_sw; /* saved SW from last exception */
+ uint32_t sv_ex_tw; /* saved TW from last exception */
+};
+
+union savefpu {
+ struct save87 sv_87;
+ struct savexmm sv_xmm;
#ifdef GPL_MATH_EMULATE
union i387_union gplemu;
#else
@@ -109,6 +148,12 @@ struct emcsts {
#define __OpenBSD_NPXCW__ 0x127f
/*
+ * The default MXCSR value at reset is 0x1f80, IA-32 Instruction
+ * Set Reference, pg. 3-369.
+ */
+#define __INITIAL_MXCSR__ 0x1f80
+
+/*
* The standard control word from finit is 0x37F, giving:
* round to nearest
* 64-bit precision
@@ -133,4 +178,7 @@ struct emcsts {
#define __INITIAL_NPXCW__ __OpenBSD_NPXCW__
+void process_xmm_to_s87(const struct savexmm *, struct save87 *);
+void process_s87_to_xmm(const struct save87 *, struct savexmm *);
+
#endif /* !_I386_NPX_H_ */
diff --git a/sys/arch/i386/include/pcb.h b/sys/arch/i386/include/pcb.h
index 4a7c0094ef2..611ab5996a8 100644
--- a/sys/arch/i386/include/pcb.h
+++ b/sys/arch/i386/include/pcb.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: pcb.h,v 1.10 2004/02/01 12:26:45 grange Exp $ */
+/* $OpenBSD: pcb.h,v 1.11 2004/02/01 19:05:23 deraadt Exp $ */
/* $NetBSD: pcb.h,v 1.21 1996/01/08 13:51:42 mycroft Exp $ */
/*-
@@ -62,10 +62,11 @@ struct pcb {
#define pcb_gs pcb_tss.tss_gs
#define pcb_ldt_sel pcb_tss.tss_ldt
int pcb_tss_sel;
- union descriptor *pcb_ldt; /* per process (user) LDT */
- int pcb_ldt_len; /* number of LDT entries */
+ union descriptor *pcb_ldt; /* per process (user) LDT */
+ int pcb_ldt_len; /* number of LDT entries */
int pcb_cr0; /* saved image of CR0 */
- union fsave87 pcb_savefpu; /* floating point state for 287/387 */
+ int pcb_pad[2]; /* savefpu on 16-byte boundary */
+ union savefpu pcb_savefpu; /* floating point state for FPU */
struct emcsts pcb_saveemc; /* Cyrix EMC state */
/*
* Software pcb (extension)
diff --git a/sys/arch/i386/include/psl.h b/sys/arch/i386/include/psl.h
index 6d46152398d..2d71d97218b 100644
--- a/sys/arch/i386/include/psl.h
+++ b/sys/arch/i386/include/psl.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: psl.h,v 1.13 2003/06/02 23:27:47 millert Exp $ */
+/* $OpenBSD: psl.h,v 1.14 2004/02/01 19:05:23 deraadt Exp $ */
/* $NetBSD: psl.h,v 1.30 1996/05/13 01:28:05 mycroft Exp $ */
/*-
@@ -58,6 +58,7 @@
#define PSL_VIF 0x00080000 /* virtual interrupt enable flag */
#define PSL_VIP 0x00100000 /* virtual interrupt pending flag */
#define PSL_ID 0x00200000 /* identification flag */
+#define PSL_XCRYPT 0x20000000 /* VIA xcrypt: operation loaded */
#define PSL_MBO 0x00000002 /* must be one bits */
#define PSL_MBZ 0xffc08028 /* must be zero bits */