Added a pctr pseudo-device for accessing the Pentium performance counters,

and a program pctrctl to set the counter functions.

2 files changed, 53 insertions, 21 deletions

diff --git a/sys/arch/i386/include/cpu.h b/sys/arch/i386/include/cpu.h
index 4f5cbd78e41..3abe70557f5 100644
--- a/sys/arch/i386/include/cpu.h
+++ b/sys/arch/i386/include/cpu.h
@@ -99,27 +99,25 @@ void	delay __P((int));
 /*
  * High resolution clock support (Pentium only)
  */
-#define CPU_CLOCKUPDATE(otime, ntime) \
-	do { \
-		if (pentium_mhz) { \
-			__asm __volatile("cli\n" \
-					 "movl (%2), %%eax\n" \
-					 "movl %%eax, (%1)\n" \
-					 "movl 4(%2), %%eax\n" \
-					 "movl %%eax, 4(%1)\n" \
-					 "movl $0x10, %%ecx\n" \
-					 "xorl %%eax, %%eax\n" \
-					 "movl %%eax, %%edx\n" \
-					 ".byte 0xf, 0x30\n" \
-					 "sti\n" \
-					 "#%0%1%2" \
-					 : "=m" (*otime) \
-					 : "c" (otime), "b" (ntime) \
-					 : "ax", "cx", "dx"); \
-		} \
-		else { \
-			*(otime) = *(ntime); \
-		} \
+extern u_quad_t pentium_base_tsc;
+#define CPU_CLOCKUPDATE(otime, ntime)					\
+	do {								\
+		if (pentium_mhz) {					\
+			__asm __volatile("cli\n"			\
+					 "movl (%3), %%eax\n"		\
+					 "movl %%eax, (%2)\n"		\
+					 "movl 4(%3), %%eax\n"		\
+					 "movl %%eax, 4(%2)\n"		\
+					 ".byte 0xf, 0x31\n"		\
+					 "sti\n"			\
+					 "#%0 %1 %2 %3"			\
+					 : "=m" (*otime),		\
+					 "=A" (pentium_base_tsc)	\
+					 : "c" (otime), "b" (ntime));	\
+		}							\
+		else {							\
+			*(otime) = *(ntime);				\
+		}							\
 	} while (0)
 #endif
 void	delay __P((int));
diff --git a/sys/arch/i386/include/pctr.h b/sys/arch/i386/include/pctr.h
new file mode 100644
index 00000000000..641b3436ca5
--- /dev/null
+++ b/sys/arch/i386/include/pctr.h
@@ -0,0 +1,34 @@
+/*	$OpenBSD: pctr.h,v 1.1 1996/08/08 18:47:04 dm Exp $	*/
+
+/*
+ * Pentium performance counter driver for OpenBSD.
+ * Author: David Mazieres <dm@lcs.mit.edu>
+ */
+
+#ifndef _I386_PERFCNT_H_
+#define _I386_PERFCNT_H_
+
+typedef u_quad_t pctrval;
+
+#define PCTR_NUM 2
+
+struct pctrst {
+  u_short pctr_fn[PCTR_NUM];
+  pctrval pctr_tsc;
+  pctrval pctr_hwc[PCTR_NUM];
+  pctrval pctr_idl;
+};
+
+/* Bit values in fn fields and PIOCS ioctl's */
+#define PCTR_K 0x40    /* Monitor kernel-level events */
+#define PCTR_U 0x80    /* Monitor user-level events */
+#define PCTR_C 0x100   /* count cycles rather than events */
+
+/* ioctl to set which counter a device tracks. */
+#define PCIOCRD _IOR('c', 1, struct pctrst)   /* Read counter value */
+#define PCIOCS0 _IOW('c', 8, unsigned short)  /* Set counter 0 function */
+#define PCIOCS1 _IOW('c', 9, unsigned short)  /* Set counter 1 function */
+
+#define _PATH_PCTR "/dev/pctr"
+
+#endif /* ! _I386_PERFCNT_H_ */