diff options
| author | Philip Guenthe <guenther@cvs.openbsd.org> | 2011-03-20 21:44:09 +0000 |
|---|---|---|
| committer | Philip Guenthe <guenther@cvs.openbsd.org> | 2011-03-20 21:44:09 +0000 |
| commit | 2adbed0e667a38266c5f7af35a555358a3a18065 (patch) | |
| tree | 0cacbe115f2ec8d48c44183272e96f6a904dabff /sys/arch/i386/include | |
| parent | 66da337841752aaa4e76f748b61818f649a94e5f (diff) | |
When reading MXCSR from userland sigcontext or a ptrace request,
mask out invalid bits to prevent a protect fault.
Original diff by joshe@; further feedback and ok kettenis@
Diffstat (limited to 'sys/arch/i386/include')
| -rw-r--r-- | sys/arch/i386/include/npx.h | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/sys/arch/i386/include/npx.h b/sys/arch/i386/include/npx.h index 7b92a8693fb..c4171607f67 100644 --- a/sys/arch/i386/include/npx.h +++ b/sys/arch/i386/include/npx.h @@ -1,4 +1,4 @@ -/* $OpenBSD: npx.h,v 1.15 2010/09/29 15:11:31 joshe Exp $ */ +/* $OpenBSD: npx.h,v 1.16 2011/03/20 21:44:08 guenther Exp $ */ /* $NetBSD: npx.h,v 1.11 1994/10/27 04:16:11 cgd Exp $ */ /*- @@ -96,7 +96,7 @@ struct envxmm { uint16_t en_fos; /* FPU Data pointer selector */ uint16_t en_rsvd2; uint32_t en_mxcsr; /* MXCSR Register State */ - uint32_t en_rsvd3; + uint32_t en_mxcsr_mask; /* Mask for valid MXCSR bits (may be 0) */ }; /* FPU regsters in the extended save format. */ @@ -141,7 +141,8 @@ struct emcsts { * The default MXCSR value at reset is 0x1f80, IA-32 Instruction * Set Reference, pg. 3-369. */ -#define __INITIAL_MXCSR__ 0x1f80 +#define __INITIAL_MXCSR__ 0x1f80 +#define __INITIAL_MXCSR_MASK__ 0xffbf /* * The standard control word from finit is 0x37F, giving: @@ -158,6 +159,8 @@ void process_s87_to_xmm(const struct save87 *, struct savexmm *); struct cpu_info; struct trapframe; +extern uint32_t fpu_mxcsr_mask; + void npxinit(struct cpu_info *); void npxtrap(struct trapframe *); void fpu_kernel_enter(void); |