diff options
author | Jonathan Gray <jsg@cvs.openbsd.org> | 2008-06-13 00:00:46 +0000 |
---|---|---|
committer | Jonathan Gray <jsg@cvs.openbsd.org> | 2008-06-13 00:00:46 +0000 |
commit | 1f2334458c66964c60bfd9ad0d09c4f963c40db1 (patch) | |
tree | 0e1e9129a4c35f7edaf25d9a403919b3daa635cc /sys/arch/i386 | |
parent | e2a4920ea3159df08848a57ba1f12c310f0cf9dd (diff) |
Detect if Intel's Safer Mode Extensions (SMX) are present,
See http://download.intel.com/technology/security/downloads/31516804.pdf
for more information.
ok deraadt@ 'looks ok to me' djm@
Diffstat (limited to 'sys/arch/i386')
-rw-r--r-- | sys/arch/i386/i386/machdep.c | 3 | ||||
-rw-r--r-- | sys/arch/i386/include/specialreg.h | 3 |
2 files changed, 4 insertions, 2 deletions
diff --git a/sys/arch/i386/i386/machdep.c b/sys/arch/i386/i386/machdep.c index d7a3ad84ad7..881a6e5dd58 100644 --- a/sys/arch/i386/i386/machdep.c +++ b/sys/arch/i386/i386/machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: machdep.c,v 1.430 2008/06/08 20:57:18 miod Exp $ */ +/* $OpenBSD: machdep.c,v 1.431 2008/06/13 00:00:45 jsg Exp $ */ /* $NetBSD: machdep.c,v 1.214 1996/11/10 03:16:17 thorpej Exp $ */ /*- @@ -1061,6 +1061,7 @@ const struct cpu_cpuid_feature i386_cpuid_ecxfeatures[] = { { CPUIDECX_MWAIT, "MWAIT" }, { CPUIDECX_DSCPL, "DS-CPL" }, { CPUIDECX_VMX, "VMX" }, + { CPUIDECX_SMX, "SMX" }, { CPUIDECX_EST, "EST" }, { CPUIDECX_TM2, "TM2" }, { CPUIDECX_CNXTID, "CNXT-ID" }, diff --git a/sys/arch/i386/include/specialreg.h b/sys/arch/i386/include/specialreg.h index 7dc9f548496..3efc505c191 100644 --- a/sys/arch/i386/include/specialreg.h +++ b/sys/arch/i386/include/specialreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: specialreg.h,v 1.32 2007/10/17 02:30:25 deraadt Exp $ */ +/* $OpenBSD: specialreg.h,v 1.33 2008/06/13 00:00:45 jsg Exp $ */ /* $NetBSD: specialreg.h,v 1.7 1994/10/27 04:16:26 cgd Exp $ */ /*- @@ -135,6 +135,7 @@ #define CPUIDECX_MWAIT 0x00000008 /* Monitor/Mwait */ #define CPUIDECX_DSCPL 0x00000010 /* CPL Qualified Debug Store */ #define CPUIDECX_VMX 0x00000020 /* Virtual Machine Extensions */ +#define CPUIDECX_SMX 0x00000040 /* Safer Mode Extensions */ #define CPUIDECX_EST 0x00000080 /* enhanced SpeedStep */ #define CPUIDECX_TM2 0x00000100 /* thermal monitor 2 */ #define CPUIDECX_CNXTID 0x00000400 /* Context ID */ |