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authorJonathan Gray <jsg@cvs.openbsd.org>2021-03-11 11:17:01 +0000
committerJonathan Gray <jsg@cvs.openbsd.org>2021-03-11 11:17:01 +0000
commit1cfad7d108ee7092af52ec7682972c5630373ea5 (patch)
treeb38923ca7998705b936c4df5ea682d5080b443fc /sys/arch/luna88k/dev
parent0ce400bf88ebeed805f0bdba0a25f6849d6828e6 (diff)
spelling
Diffstat (limited to 'sys/arch/luna88k/dev')
-rw-r--r--sys/arch/luna88k/dev/mb89352.c6
-rw-r--r--sys/arch/luna88k/dev/mb89352reg.h4
-rw-r--r--sys/arch/luna88k/dev/mb89352var.h4
-rw-r--r--sys/arch/luna88k/dev/sioreg.h4
4 files changed, 9 insertions, 9 deletions
diff --git a/sys/arch/luna88k/dev/mb89352.c b/sys/arch/luna88k/dev/mb89352.c
index 868c42d91d5..b0a912838c9 100644
--- a/sys/arch/luna88k/dev/mb89352.c
+++ b/sys/arch/luna88k/dev/mb89352.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: mb89352.c,v 1.30 2020/09/22 19:32:51 krw Exp $ */
+/* $OpenBSD: mb89352.c,v 1.31 2021/03/11 11:16:58 jsg Exp $ */
/* $NetBSD: mb89352.c,v 1.5 2000/03/23 07:01:31 thorpej Exp $ */
/* NecBSD: mb89352.c,v 1.4 1998/03/14 07:31:20 kmatsuda Exp */
@@ -1579,7 +1579,7 @@ spc_intr(void *arg)
/*
* On LUNA-88K2, 2 spc(4)'s share the level 3 interrupt.
- * So, first, check if this deivce needs to process this interrupt.
+ * So, first, check if this device needs to process this interrupt.
*/
ints = bus_space_read_1(iot, ioh, INTS);
if (ints == 0) /* No interrupt event on this device */
@@ -1761,7 +1761,7 @@ loop:
/* disable disconnect interrupt */
bus_space_write_1(iot, ioh, PCTL,
bus_space_read_1(iot, ioh, PCTL) & ~PCTL_BFINT_ENAB);
- /* XXX reset interrput */
+ /* XXX reset interrupt */
bus_space_write_1(iot, ioh, INTS, ints);
switch (sc->sc_state) {
diff --git a/sys/arch/luna88k/dev/mb89352reg.h b/sys/arch/luna88k/dev/mb89352reg.h
index ff8e6b20abf..ed90d55072c 100644
--- a/sys/arch/luna88k/dev/mb89352reg.h
+++ b/sys/arch/luna88k/dev/mb89352reg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: mb89352reg.h,v 1.4 2008/10/17 18:30:20 okan Exp $ */
+/* $OpenBSD: mb89352reg.h,v 1.5 2021/03/11 11:16:58 jsg Exp $ */
/* $NetBSD: mb89352reg.h,v 1.3 2003/08/07 16:31:02 agc Exp $ */
/* NecBSD: mb89352reg.h,v 1.3 1998/03/14 07:04:34 kmatsuda Exp */
@@ -84,7 +84,7 @@
* FUJITSU MB89352A SCSI Protocol Controller Hardware Description.
*/
-/* Definitions, most of them has turned out to be unneccesary, but here they
+/* Definitions, most of them have turned out to be unnecessary, but here they
* are anyway.
*/
diff --git a/sys/arch/luna88k/dev/mb89352var.h b/sys/arch/luna88k/dev/mb89352var.h
index 02fa68c7f13..0df2bc6358f 100644
--- a/sys/arch/luna88k/dev/mb89352var.h
+++ b/sys/arch/luna88k/dev/mb89352var.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: mb89352var.h,v 1.7 2020/07/23 00:08:10 krw Exp $ */
+/* $OpenBSD: mb89352var.h,v 1.8 2021/03/11 11:16:58 jsg Exp $ */
/* $NetBSD: mb89352var.h,v 1.6 2003/08/02 12:48:09 tsutsui Exp $ */
/* NecBSD: mb89352var.h,v 1.4 1998/03/14 07:31:22 kmatsuda Exp */
@@ -63,7 +63,7 @@
/*
* ACB. Holds additional information for each SCSI command Comments: We
* need a separate scsi command block because we may need to overwrite it
- * with a request sense command. Basicly, we refrain from fiddling with
+ * with a request sense command. Basically, we refrain from fiddling with
* the scsi_xfer struct (except do the expected updating of return values).
* We'll generally update: xs->{flags,resid,error,sense,status} and
* occasionally xs->retries.
diff --git a/sys/arch/luna88k/dev/sioreg.h b/sys/arch/luna88k/dev/sioreg.h
index 7ec6b04b6a4..1aeff4c231b 100644
--- a/sys/arch/luna88k/dev/sioreg.h
+++ b/sys/arch/luna88k/dev/sioreg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: sioreg.h,v 1.1 2004/04/21 15:23:55 aoyama Exp $ */
+/* $OpenBSD: sioreg.h,v 1.2 2021/03/11 11:16:58 jsg Exp $ */
/* $NetBSD: sioreg.h,v 1.1 2000/01/05 08:48:55 nisimura Exp $ */
/*
* Copyright (c) 1992 OMRON Corporation.
@@ -65,7 +65,7 @@
#define WR0_RSTINT 0x10 /* Reset External/Status Interrupt */
#define WR0_CHANRST 0x18 /* Channel Reset */
#define WR0_INTNXT 0x20 /* Enable Interrupt on Next Receive Character */
-#define WR0_RSTPEND 0x28 /* Reset Transmitter Interrput/DMA Pending */
+#define WR0_RSTPEND 0x28 /* Reset Transmitter Interrupt/DMA Pending */
#define WR0_ERRRST 0x30 /* Error Reset */
#define WR0_ENDINTR 0x38 /* End of Interrupt */