initial import of NetBSD tree

1 files changed, 79 insertions, 0 deletions

diff --git a/sys/arch/m68k/fpsp/FPSP.sa b/sys/arch/m68k/fpsp/FPSP.sa
new file mode 100644
index 00000000000..1a3692d4667
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+++ b/sys/arch/m68k/fpsp/FPSP.sa
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+*	$NetBSD: FPSP.sa,v 1.2 1994/10/26 07:48:33 cgd Exp $
+
+*	MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
+*	M68000 Hi-Performance Microprocessor Division
+*	M68040 Software Package 
+*
+*	M68040 Software Package Copyright (c) 1993, 1994 Motorola Inc.
+*	All rights reserved.
+*
+*	THE SOFTWARE is provided on an "AS IS" basis and without warranty.
+*	To the maximum extent permitted by applicable law,
+*	MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
+*	INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A
+*	PARTICULAR PURPOSE and any warranty against infringement with
+*	regard to the SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF)
+*	and any accompanying written materials. 
+*
+*	To the maximum extent permitted by applicable law,
+*	IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
+*	(INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS
+*	PROFITS, BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR
+*	OTHER PECUNIARY LOSS) ARISING OF THE USE OR INABILITY TO USE THE
+*	SOFTWARE.  Motorola assumes no responsibility for the maintenance
+*	and support of the SOFTWARE.  
+*
+*	You are hereby granted a copyright license to use, modify, and
+*	distribute the SOFTWARE so long as this entire notice is retained
+*	without alteration in any modified and/or redistributed versions,
+*	and that such modified versions are clearly identified as such.
+*	No licenses are granted by implication, estoppel or otherwise
+*	under any patents or trademarks of Motorola, Inc.
+
+*
+*	FPSP.sa 3.1 12/10/90
+*
+*	Init file for testing FPSP software package.
+* 
+*	Takes over the exception vectors that the FPSP handles.
+*
+
+FPSP	IDNT	2,1 Motorola 040 Floating Point Software Package
+
+CODE_ST		equ	$10000	;address of test code start
+
+FLINE_VEC	equ	$2c
+BSUN_VEC	equ	$c0
+INEX2_VEC	equ	$c4
+DZ_VEC		equ	$c8
+UNFL_VEC	equ	$cc
+OPERR_VEC	equ	$d0
+OVFL_VEC	equ	$d4
+SNAN_VEC	equ	$d8
+UNSUP_VEC	equ	$dc
+
+	xref	fline,unsupp
+	xref	bsun,inex,dz,unfl 
+	xref	operr,ovfl,snan
+	
+	section	7
+
+* Load vector table with addresses of FPSP routines and
+* branch to CODE_ST, start address of test code.
+
+	xdef	start
+start:
+	movec.l	VBR,a0
+	move.l	#fline,FLINE_VEC(a0)
+	move.l	#bsun,BSUN_VEC(a0)
+	move.l	#inex,INEX2_VEC(a0)
+	move.l	#dz,DZ_VEC(a0)
+	move.l	#unfl,UNFL_VEC(a0)
+	move.l	#operr,OPERR_VEC(a0)
+	move.l	#ovfl,OVFL_VEC(a0)
+	move.l	#snan,SNAN_VEC(a0)
+	move.l	#unsupp,UNSUP_VEC(a0)
+
+	jmp	CODE_ST
+
+	end