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authorMark Kettenis <kettenis@cvs.openbsd.org>2018-08-11 11:16:44 +0000
committerMark Kettenis <kettenis@cvs.openbsd.org>2018-08-11 11:16:44 +0000
commit0a852d319a0d210b300571bb23276b398406031d (patch)
treec1c623f288cb843798c427878f2b18032891c71e /sys/arch/m88k
parent9a77c781842ea754c207a3ccbfa25616a69ceb5b (diff)
Fix a couple of bugs in the ITS support code:
- Don't dereference sc_prop if we're not handling an LPI. Fixes a crash on qemu when emulating a GICv3 without ITS (and therefore no LPIs(. - Use the true IPL when calculating the priority of an LPI. The old code used a variable that still had the IPL_MPSAFE flag in it. - Write to the right GITS_BASERn instead of ialways writing to GITS_BASER0. - Flush the cache after initializing/modifying the in-memory tables. The GICv3 on the SynQuacer isn't fully coherent and only supports the "non-shareable" attribute for its in-memory tables. So we have to flush the cache to the point of coherency to guarentee that the GIC sees our changes to those tables. Throw in a full memory barrier for good measure. Also add support for the SynQuacer pre-ITS. ok jsg@, patrick@
Diffstat (limited to 'sys/arch/m88k')
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