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authorMiod Vallat <miod@cvs.openbsd.org>2011-10-09 17:01:35 +0000
committerMiod Vallat <miod@cvs.openbsd.org>2011-10-09 17:01:35 +0000
commit2957b789dda5fee3e9d1fb70d7c9e68a8a0f098b (patch)
treed1278a42ea705deef0e6f29be01ab767a2cb85ab /sys/arch/m88k
parentf69dddbdb4dc8b35eddd78677164d4280092188d (diff)
Rework secondary processor initialization. cmmu initialization is now
performed much earlier in the processor startup. No visible change, paves the way for the much important diff three commits from here.
Diffstat (limited to 'sys/arch/m88k')
-rw-r--r--sys/arch/m88k/m88k/genassym.cf5
-rw-r--r--sys/arch/m88k/m88k/m8820x_machdep.c18
-rw-r--r--sys/arch/m88k/m88k/pmap.c8
3 files changed, 18 insertions, 13 deletions
diff --git a/sys/arch/m88k/m88k/genassym.cf b/sys/arch/m88k/m88k/genassym.cf
index c8a34ae279f..270e36d06b6 100644
--- a/sys/arch/m88k/m88k/genassym.cf
+++ b/sys/arch/m88k/m88k/genassym.cf
@@ -1,4 +1,4 @@
-# $OpenBSD: genassym.cf,v 1.22 2010/09/28 20:27:55 miod Exp $
+# $OpenBSD: genassym.cf,v 1.23 2011/10/09 17:01:34 miod Exp $
#
# Copyright (c) 1982, 1990 The Regents of the University of California.
# All rights reserved.
@@ -28,7 +28,7 @@
# SUCH DAMAGE.
#
# @(#)genassym.c 7.8 (Berkeley) 5/7/91
-# $Id: genassym.cf,v 1.22 2010/09/28 20:27:55 miod Exp $
+# $Id: genassym.cf,v 1.23 2011/10/09 17:01:34 miod Exp $
#
include <sys/param.h>
@@ -61,6 +61,7 @@ export SONPROC
# cpu fields
struct cpu_info
+member ci_flags
member ci_curproc
member ci_curpcb
member ci_curpmap
diff --git a/sys/arch/m88k/m88k/m8820x_machdep.c b/sys/arch/m88k/m88k/m8820x_machdep.c
index 7e8f58a925d..757ee00e060 100644
--- a/sys/arch/m88k/m88k/m8820x_machdep.c
+++ b/sys/arch/m88k/m88k/m8820x_machdep.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: m8820x_machdep.c,v 1.47 2011/01/05 22:16:16 miod Exp $ */
+/* $OpenBSD: m8820x_machdep.c,v 1.48 2011/10/09 17:01:34 miod Exp $ */
/*
* Copyright (c) 2004, 2007, 2010, 2011, Miodrag Vallat.
*
@@ -396,8 +396,7 @@ m8820x_initialize_cpu(cpuid_t cpu)
int cssp, type;
apr_t apr;
- apr = ((0x00000 << PG_BITS) | CACHE_WT | CACHE_GLOBAL | CACHE_INH) &
- ~APR_V;
+ apr = ((0x00000 << PG_BITS) | CACHE_GLOBAL | CACHE_INH) & ~APR_V;
cmmu = m8820x_cmmu + (cpu << cmmu_shift);
@@ -480,11 +479,22 @@ m8820x_initialize_cpu(cpuid_t cpu)
/*
* Enable instruction cache.
- * Data cache will be enabled later.
*/
apr &= ~CACHE_INH;
m8820x_cmmu_set_reg(CMMU_SAPR, apr, MODE_VAL, cpu, INST_CMMU);
+ /*
+ * Data cache will be enabled at pmap_bootstrap_cpu() time,
+ * because the PROM won't likely expect its work area in memory
+ * to be cached. On at least aviion, starting secondary processors
+ * returns an error code although the processor has correctly spun
+ * up, if the PROM work area is cached.
+ */
+#ifdef dont_do_this_at_home
+ apr |= CACHE_WT;
+ m8820x_cmmu_set_reg(CMMU_SAPR, apr, MODE_VAL, cpu, DATA_CMMU);
+#endif
+
ci->ci_zeropage = m8820x_zeropage;
ci->ci_copypage = m8820x_copypage;
}
diff --git a/sys/arch/m88k/m88k/pmap.c b/sys/arch/m88k/m88k/pmap.c
index a20bd5cebe3..25cf380ce07 100644
--- a/sys/arch/m88k/m88k/pmap.c
+++ b/sys/arch/m88k/m88k/pmap.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: pmap.c,v 1.63 2011/01/05 22:20:22 miod Exp $ */
+/* $OpenBSD: pmap.c,v 1.64 2011/10/09 17:01:34 miod Exp $ */
/*
* Copyright (c) 2001-2004, 2010, Miodrag Vallat.
@@ -763,12 +763,6 @@ pmap_bootstrap(paddr_t s_rom, paddr_t e_rom)
void
pmap_bootstrap_cpu(cpuid_t cpu)
{
- /* Invalidate entire kernel TLB and get ready for address translation */
-#ifdef MULTIPROCESSOR
- if (cpu != master_cpu)
- cmmu_initialize_cpu(cpu);
-#endif
-
/* Load supervisor pointer to segment table. */
cmmu_set_sapr(pmap_kernel()->pm_apr);
#ifdef PMAPDEBUG