Compute syhcnronous transfer periods with a better accuracy, to get better

results on the 16.5MHz clock case. ok krw@

1 files changed, 9 insertions, 9 deletions

diff --git a/sys/arch/mac68k/dev/esp.c b/sys/arch/mac68k/dev/esp.c
index f38532e73cb..dca06803f87 100644
--- a/sys/arch/mac68k/dev/esp.c
+++ b/sys/arch/mac68k/dev/esp.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: esp.c,v 1.30 2010/06/28 18:31:01 krw Exp $	*/
+/*	$OpenBSD: esp.c,v 1.31 2010/11/11 17:55:32 miod Exp $	*/
 /*	$NetBSD: esp.c,v 1.17 1998/09/05 15:15:35 pk Exp $	*/
 
 /*
@@ -246,15 +246,15 @@ espattach(parent, self, aux)
 		esc->irq_mask = V2IF_SCSIIRQ;
 		if (reg_offset == 0x10000) {
 			/* From the Q650 developer's note */
-			sc->sc_freq = 16500000;
+			sc->sc_freq = 16500;
 		} else {
-			sc->sc_freq = 25000000;
+			sc->sc_freq = 25000;
 		}
 	} else {
 		esc->sc_reg = (volatile u_char *) SCSIBase + 0x402;
 		via2_register_irq(&esc->sc_ih, self->dv_xname);
 		esc->irq_mask = 0;
-		sc->sc_freq = 25000000;
+		sc->sc_freq = 25000;
 	}
 
 	if (quick) {
@@ -283,10 +283,10 @@ espattach(parent, self, aux)
 	 * in "clocks per byte", and has a minimum value of 4.
 	 * The SCSI period used in negotiation is one-fourth
 	 * of the time (in nanoseconds) needed to transfer one byte.
-	 * Since the chip's clock is given in MHz, we have the following
-	 * formula: 4 * period = (1000 / freq) * 4
+	 * Since the chip's clock is given in kHz, we have the following
+	 * formula: 4 * period = (1000000 / freq) * 4
 	 */
-	sc->sc_minsync = (1000 * 1000000) / sc->sc_freq;
+	sc->sc_minsync = 1000000 / sc->sc_freq;
 
 	/* We need this to fit into the TCR... */
 	sc->sc_maxxfer = 64 * 1024;
@@ -296,8 +296,8 @@ espattach(parent, self, aux)
 		sc->sc_maxxfer = 8 * 1024;
 	}
 
-	/* gimme MHz */
-	sc->sc_freq /= 1000000;
+	/* convert sc_freq to MHz */
+	sc->sc_freq /= 1000;
 
 	/*
 	 * Configure interrupts.