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authorVisa Hankala <visa@cvs.openbsd.org>2018-04-09 13:46:16 +0000
committerVisa Hankala <visa@cvs.openbsd.org>2018-04-09 13:46:16 +0000
commitc95aa7ef85117622d22232dafe11000a0872226e (patch)
treea002cc57b274df7f0abdf0f107ba310e6b53be8e /sys/arch/mips64/include
parent8b765a6f71edb5150965be4c38f0e7d27fc38251 (diff)
Add a driver for the OCTEON cryptographic unit. It provides
a hardware-accelerated implementation of several encryption and authentication algorithms for ipsec(4): AES-CBC AES-CTR AES-GCM AES-GMAC HMAC-MD5 HMAC-SHA1 HMAC-SHA2-256 HMAC-SHA2-384 HMAC-SHA2-512 Please note that the driver is currently disabled. OK deraadt@
Diffstat (limited to 'sys/arch/mips64/include')
-rw-r--r--sys/arch/mips64/include/mips_cpu.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/sys/arch/mips64/include/mips_cpu.h b/sys/arch/mips64/include/mips_cpu.h
index 33afa4df332..65f555043cd 100644
--- a/sys/arch/mips64/include/mips_cpu.h
+++ b/sys/arch/mips64/include/mips_cpu.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: mips_cpu.h,v 1.7 2017/08/26 13:53:46 visa Exp $ */
+/* $OpenBSD: mips_cpu.h,v 1.8 2018/04/09 13:46:15 visa Exp $ */
/*-
* Copyright (c) 1992, 1993
@@ -54,6 +54,7 @@
#define SR_COP_USABILITY 0x30000000 /* CP0 and CP1 only */
#define SR_COP_0_BIT 0x10000000
#define SR_COP_1_BIT 0x20000000
+#define SR_COP_2_BIT 0x40000000
#define SR_RP 0x08000000
#define SR_FR_32 0x04000000
#define SR_RE 0x02000000