diff options
| author | Visa Hankala <visa@cvs.openbsd.org> | 2017-08-26 13:53:47 +0000 |
|---|---|---|
| committer | Visa Hankala <visa@cvs.openbsd.org> | 2017-08-26 13:53:47 +0000 |
| commit | cc73752fcb0b6a75e545d75b31b83111691ffa4f (patch) | |
| tree | b49f409a1012c8af960e76743fc7a983d6d5428f /sys/arch/mips64/include | |
| parent | 17ba9d3b1c5091b8beda8c168a3a100586d3e89e (diff) | |
Use macros for Config1 bits.
Diffstat (limited to 'sys/arch/mips64/include')
| -rw-r--r-- | sys/arch/mips64/include/mips_cpu.h | 28 |
1 files changed, 27 insertions, 1 deletions
diff --git a/sys/arch/mips64/include/mips_cpu.h b/sys/arch/mips64/include/mips_cpu.h index 94cb0c6234a..33afa4df332 100644 --- a/sys/arch/mips64/include/mips_cpu.h +++ b/sys/arch/mips64/include/mips_cpu.h @@ -1,4 +1,4 @@ -/* $OpenBSD: mips_cpu.h,v 1.6 2017/06/11 03:35:30 visa Exp $ */ +/* $OpenBSD: mips_cpu.h,v 1.7 2017/08/26 13:53:46 visa Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -293,6 +293,32 @@ #define FPC_CSR $31 /* + * Config1 register + */ +#define CONFIG1_M 0x80000000u +#define CONFIG1_MMUSize1 0x7e000000u +#define CONFIG1_MMUSize1_SHIFT 25 +#define CONFIG1_IS 0x01c00000u +#define CONFIG1_IS_SHIFT 22 +#define CONFIG1_IL 0x00380000u +#define CONFIG1_IL_SHIFT 19 +#define CONFIG1_IA 0x00070000u +#define CONFIG1_IA_SHIFT 16 +#define CONFIG1_DS 0x0000e000u +#define CONFIG1_DS_SHIFT 13 +#define CONFIG1_DL 0x00001c00u +#define CONFIG1_DL_SHIFT 10 +#define CONFIG1_DA 0x00000380u +#define CONFIG1_DA_SHIFT 7 +#define CONFIG1_C2 0x00000040u +#define CONFIG1_MD 0x00000020u +#define CONFIG1_PC 0x00000010u +#define CONFIG1_WR 0x00000008u +#define CONFIG1_CA 0x00000004u +#define CONFIG1_EP 0x00000002u +#define CONFIG1_FP 0x00000001u + +/* * Config3 register */ #define CONFIG3_M 0x80000000 |