diff options
| author | Visa Hankala <visa@cvs.openbsd.org> | 2016-12-17 11:51:03 +0000 |
|---|---|---|
| committer | Visa Hankala <visa@cvs.openbsd.org> | 2016-12-17 11:51:03 +0000 |
| commit | f3cb7f0c535a5021146a2ea210372a07b9393a23 (patch) | |
| tree | 9e2b950e8bf9ce50c848ebb3f35812bbf0aa4684 /sys/arch/mips64/include | |
| parent | bdb7cfa4d1d528237d2cdd434762213d1b4c4406 (diff) | |
Make Octeon model strings a bit more specific. While there,
add CN70xx/CN71xx.
Diffstat (limited to 'sys/arch/mips64/include')
| -rw-r--r-- | sys/arch/mips64/include/cpu.h | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/sys/arch/mips64/include/cpu.h b/sys/arch/mips64/include/cpu.h index 7eb47813237..9bc7d881548 100644 --- a/sys/arch/mips64/include/cpu.h +++ b/sys/arch/mips64/include/cpu.h @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu.h,v 1.112 2016/12/16 12:01:19 fcambus Exp $ */ +/* $OpenBSD: cpu.h,v 1.113 2016/12/17 11:51:01 visa Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -380,7 +380,7 @@ void cp0_calibrate(struct cpu_info *); #define MIPS_R4000 0x04 /* MIPS R4000/4400 CPU ISA III */ #define MIPS_R3LSI 0x05 /* LSI Logic R3000 derivate ISA I */ #define MIPS_R6000A 0x06 /* MIPS R6000A CPU ISA II */ -#define MIPS_OCTEON 0x06 /* Cavium OCTEON MIPS64R2*/ +#define MIPS_CN50XX 0x06 /* Cavium OCTEON CN50xx MIPS64R2*/ #define MIPS_R3IDT 0x07 /* IDT R3000 derivate ISA I */ #define MIPS_R10000 0x09 /* MIPS R10000/T5 CPU ISA IV */ #define MIPS_R4200 0x0a /* MIPS R4200 CPU (ICE) ISA III */ @@ -399,7 +399,8 @@ void cp0_calibrate(struct cpu_info *); #define MIPS_LOONGSON 0x42 /* STC LoongSon CPU ISA III */ #define MIPS_VR5400 0x54 /* NEC Vr5400 CPU ISA IV+ */ #define MIPS_LOONGSON2 0x63 /* STC LoongSon2/3 CPU ISA III+ */ -#define MIPS_OCTEON2 0x93 /* Cavium OCTEON II MIPS64R2 */ +#define MIPS_CN61XX 0x93 /* Cavium OCTEON II CN6[01]xx MIPS64R2 */ +#define MIPS_CN71XX 0x96 /* Cavium OCTEON III CN7[01]xx MIPS64R2 */ /* * MIPS FPU types. Only soft, rest is the same as cpu type. |