diff options
| author | Miod Vallat <miod@cvs.openbsd.org> | 2012-03-25 13:45:06 +0000 |
|---|---|---|
| committer | Miod Vallat <miod@cvs.openbsd.org> | 2012-03-25 13:45:06 +0000 |
| commit | 39d954f78803650f7d251609c0d107507c223da6 (patch) | |
| tree | 262263c96b33c5e305500fbe922de8d381c0217a /sys/arch/mips64 | |
| parent | 85abb75f87fda11a365a28d24be2799a5b1cdfb7 (diff) | |
Only set the low order bits of CpuCacheAliasMask if it is nonzero, regression
of previous computation fix.
Diffstat (limited to 'sys/arch/mips64')
| -rw-r--r-- | sys/arch/mips64/mips64/cache_loongson2.S | 6 | ||||
| -rw-r--r-- | sys/arch/mips64/mips64/cache_r10k.S | 6 | ||||
| -rw-r--r-- | sys/arch/mips64/mips64/cache_r5k.S | 6 |
3 files changed, 15 insertions, 3 deletions
diff --git a/sys/arch/mips64/mips64/cache_loongson2.S b/sys/arch/mips64/mips64/cache_loongson2.S index 7772713d37f..4a67811c366 100644 --- a/sys/arch/mips64/mips64/cache_loongson2.S +++ b/sys/arch/mips64/mips64/cache_loongson2.S @@ -1,4 +1,4 @@ -/* $OpenBSD: cache_loongson2.S,v 1.5 2012/03/19 20:42:26 miod Exp $ */ +/* $OpenBSD: cache_loongson2.S,v 1.6 2012/03/25 13:45:05 miod Exp $ */ /* * Copyright (c) 2009 Miodrag Vallat. @@ -152,7 +152,11 @@ ConfResult: addu t1, ta0, -1 # Use icache for alias mask srl t1, t2 + and t1, ~(PAGE_SIZE - 1) + beqz t1, 1f + nop or t1, (PAGE_SIZE - 1) +1: PTR_S t1, CpuCacheAliasMask sw ta0, CI_L1INSTCACHESIZE(a0) # store cache size. diff --git a/sys/arch/mips64/mips64/cache_r10k.S b/sys/arch/mips64/mips64/cache_r10k.S index a9f2e03adf1..59007cca103 100644 --- a/sys/arch/mips64/mips64/cache_r10k.S +++ b/sys/arch/mips64/mips64/cache_r10k.S @@ -1,4 +1,4 @@ -/* $OpenBSD: cache_r10k.S,v 1.13 2012/03/19 20:42:26 miod Exp $ */ +/* $OpenBSD: cache_r10k.S,v 1.14 2012/03/25 13:45:05 miod Exp $ */ /* * Copyright (c) 2004 Opsycon AB (www.opsycon.se) @@ -158,7 +158,11 @@ ConfResult: addu t1, ta0, -1 # Use icache for alias mask srl t1, t2 + and t1, ~(PAGE_SIZE - 1) + beqz t1, 1f + nop or t1, (PAGE_SIZE - 1) +1: #ifdef MULTIPROCESSOR PTR_L ta2, CpuCacheAliasMask or t1, ta2 # Pick largest mask diff --git a/sys/arch/mips64/mips64/cache_r5k.S b/sys/arch/mips64/mips64/cache_r5k.S index 45b5cf49517..5a972b8970f 100644 --- a/sys/arch/mips64/mips64/cache_r5k.S +++ b/sys/arch/mips64/mips64/cache_r5k.S @@ -1,4 +1,4 @@ -/* $OpenBSD: cache_r5k.S,v 1.32 2012/03/19 20:42:26 miod Exp $ */ +/* $OpenBSD: cache_r5k.S,v 1.33 2012/03/25 13:45:05 miod Exp $ */ /* * Copyright (c) 1998-2004 Opsycon AB (www.opsycon.se) @@ -368,7 +368,11 @@ ConfResult: addu t1, ta0, -1 # Use icache for alias mask srl t1, t2 + and t1, ~(PAGE_SIZE - 1) + beqz t1, 1f + nop or t1, (PAGE_SIZE - 1) +1: PTR_S t1, CpuCacheAliasMask sw ta0, CI_L1INSTCACHESIZE(a0) # store cache size. |