Pass L2 cache size in struct cpu_hwinfo, so that bootstrap of secondary

processors can display correct data. Now cpu1 on octane is correctly
reported in dmesg.

2 files changed, 20 insertions, 2 deletions

diff --git a/sys/arch/mips64/include/cpu.h b/sys/arch/mips64/include/cpu.h
index 634b772aa98..746fa74aa71 100644
--- a/sys/arch/mips64/include/cpu.h
+++ b/sys/arch/mips64/include/cpu.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpu.h,v 1.56 2010/02/28 17:23:23 miod Exp $	*/
+/*	$OpenBSD: cpu.h,v 1.57 2010/02/28 18:01:36 miod Exp $	*/
 
 /*-
  * Copyright (c) 1992, 1993
@@ -369,6 +369,7 @@ struct cpu_hwinfo {
 	uint32_t	clock;	/* Hz */
 	uint32_t	tlbsize;
 	uint		type;
+	uint32_t	l2size;
 };
 
 struct cpu_info {
diff --git a/sys/arch/mips64/mips64/cpu.c b/sys/arch/mips64/mips64/cpu.c
index cb24078eff9..dc9f2512fd5 100644
--- a/sys/arch/mips64/mips64/cpu.c
+++ b/sys/arch/mips64/mips64/cpu.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpu.c,v 1.26 2010/02/02 01:29:56 syuu Exp $ */
+/*	$OpenBSD: cpu.c,v 1.27 2010/02/28 18:01:39 miod Exp $ */
 
 /*
  * Copyright (c) 1997-2004 Opsycon AB (www.opsycon.se)
@@ -109,6 +109,23 @@ cpuattach(struct device *parent, struct device *dev, void *aux)
 	ci->ci_cpuid = cpuno;
 	ci->ci_dev = dev;
 	bcopy(ch, &ci->ci_hw, sizeof(struct cpu_hwinfo));
+#ifdef MULTIPROCESSOR
+	/*
+	 * When attaching secondary processors, cache information is not
+	 * available yet.  But since the MP-capable systems we run on
+	 * currently all have R10k-style caches, we can quickly compute
+	 * the needed values.
+	 */
+	if (!ISSET(ci->ci_flags, CPUF_PRIMARY)) {
+		ci->ci_cacheways = 2;
+		ci->ci_l1instcachesize = 32 * 1024;
+		ci->ci_l1instcacheline = 64;
+		ci->ci_l1datacachesize = 32 * 1024;
+		ci->ci_l1datacacheline = 64;
+		ci->ci_l2size = ch->l2size;
+		ci->ci_l3size = 0;
+	}
+#endif
 
 	printf(": ");