diff options
author | Takuya ASADA <syuu@cvs.openbsd.org> | 2009-10-07 08:35:48 +0000 |
---|---|---|
committer | Takuya ASADA <syuu@cvs.openbsd.org> | 2009-10-07 08:35:48 +0000 |
commit | 3aa5f4e167455894dc0c933fd98e931557b55d01 (patch) | |
tree | db648cf06d696194491882713128ededc7d54f36 /sys/arch/mips64 | |
parent | f263e2ad6e36282018fa401e143f1bdd612a62ed (diff) |
ipending, cpl moved into cpu_info
OK miod@
Diffstat (limited to 'sys/arch/mips64')
-rw-r--r-- | sys/arch/mips64/include/cpu.h | 4 | ||||
-rw-r--r-- | sys/arch/mips64/include/cpustate.h | 5 | ||||
-rw-r--r-- | sys/arch/mips64/mips64/context.S | 10 | ||||
-rw-r--r-- | sys/arch/mips64/mips64/exception.S | 11 | ||||
-rw-r--r-- | sys/arch/mips64/mips64/interrupt.c | 24 | ||||
-rw-r--r-- | sys/arch/mips64/mips64/softintr.c | 10 |
6 files changed, 37 insertions, 27 deletions
diff --git a/sys/arch/mips64/include/cpu.h b/sys/arch/mips64/include/cpu.h index a74da48580f..119c34483f7 100644 --- a/sys/arch/mips64/include/cpu.h +++ b/sys/arch/mips64/include/cpu.h @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu.h,v 1.37 2009/09/30 06:22:00 syuu Exp $ */ +/* $OpenBSD: cpu.h,v 1.38 2009/10/07 08:35:47 syuu Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -374,6 +374,8 @@ struct cpu_info { int ci_want_resched; /* need_resched() invoked */ cpuid_t ci_cpuid; /* our CPU ID */ u_int32_t ci_randseed; /* per cpu random seed */ + intrmask_t ci_cpl; + intrmask_t ci_ipending; #ifdef MULTIPROCESSOR u_long ci_flags; /* flags; see below */ #endif diff --git a/sys/arch/mips64/include/cpustate.h b/sys/arch/mips64/include/cpustate.h index 3172938a733..7512fdbf9c5 100644 --- a/sys/arch/mips64/include/cpustate.h +++ b/sys/arch/mips64/include/cpustate.h @@ -1,4 +1,4 @@ -/* $OpenBSD: cpustate.h,v 1.6 2004/10/20 12:49:15 pefo Exp $ */ +/* $OpenBSD: cpustate.h,v 1.7 2009/10/07 08:35:47 syuu Exp $ */ /* * Copyright (c) 2002-2003 Opsycon AB (www.opsycon.se / www.opsycon.com) @@ -79,7 +79,8 @@ SAVE_REG(a3, PC, frame, bo) ;\ SAVE_REG(sp, SP, frame, bo) ;\ PTR_ADDU a0, frame, bo ;\ - lw a2, cpl ;\ + GET_CPU_INFO(v0, v1) ;\ + lw a2, CI_CPL(v0) ;\ SAVE_REG(a2, CPL, frame, bo) /* diff --git a/sys/arch/mips64/mips64/context.S b/sys/arch/mips64/mips64/context.S index 088e96e31cc..2bc1781125e 100644 --- a/sys/arch/mips64/mips64/context.S +++ b/sys/arch/mips64/mips64/context.S @@ -1,4 +1,4 @@ -/* $OpenBSD: context.S,v 1.24 2009/09/30 06:22:00 syuu Exp $ */ +/* $OpenBSD: context.S,v 1.25 2009/10/07 08:35:47 syuu Exp $ */ /* * Copyright (c) 2002-2003 Opsycon AB (www.opsycon.se / www.opsycon.com) @@ -60,8 +60,9 @@ LEAF(savectx, 0) REG_S s8, PCB_CONTEXT+9*REGSZ(a0) REG_S ra, PCB_CONTEXT+10*REGSZ(a0) REG_S v0, PCB_CONTEXT+11*REGSZ(a0) + GET_CPU_INFO(t0, t1) + lw t0, CI_CPL(t0) cfc0 t1, COP_0_ICR - lw t0, cpl REG_S t1, PCB_CONTEXT+12*REGSZ(a0) # save status register REG_S t0, PCB_CONTEXT+13*REGSZ(a0) j ra @@ -114,7 +115,7 @@ NON_LEAF(cpu_switchto, FRAMESZ(CF_SZ), ra) beqz a0, 1f mfc0 v0, COP_0_STATUS_REG - lw t0, cpl + lw t0, CI_CPL(t1) REG_S s0, PCB_CONTEXT+0*REGSZ(t3) # do a 'savectx()' REG_S s1, PCB_CONTEXT+1*REGSZ(t3) REG_S s2, PCB_CONTEXT+2*REGSZ(t3) @@ -283,7 +284,8 @@ ctx3: REG_L s7, PCB_CONTEXT+7*REGSZ(t3) REG_L sp, PCB_CONTEXT+8*REGSZ(t3) REG_L s8, PCB_CONTEXT+9*REGSZ(t3) - sw a0, cpl + GET_CPU_INFO(t1, t0) + sw a0, CI_CPL(t1) #ifdef IMASK_EXTERNAL jal hw_setintrmask nop diff --git a/sys/arch/mips64/mips64/exception.S b/sys/arch/mips64/mips64/exception.S index 4c6af38e399..cbb602acb67 100644 --- a/sys/arch/mips64/mips64/exception.S +++ b/sys/arch/mips64/mips64/exception.S @@ -1,4 +1,4 @@ -/* $OpenBSD: exception.S,v 1.22 2009/09/30 06:22:00 syuu Exp $ */ +/* $OpenBSD: exception.S,v 1.23 2009/10/07 08:35:47 syuu Exp $ */ /* * Copyright (c) 2002-2003 Opsycon AB (www.opsycon.se / www.opsycon.com) @@ -330,7 +330,7 @@ NNON_LEAF(u_intr, FRAMESZ(CF_SZ), ra) GET_CPU_INFO(k1, k0) PTR_L k0, CI_CURPROCPADDR(k1) RESTORE_REG(a3, CPL, k0, 0) - sw a3, cpl + sw a3, CI_CPL(k1) .set noat RESTORE_REG(a0, PC, k0, 0) #if 0 @@ -491,7 +491,7 @@ NNON_LEAF(u_general, FRAMESZ(CF_SZ), ra) GET_CPU_INFO(k1, k0) PTR_L k0, CI_CURPROCPADDR(k1) RESTORE_REG(a3, CPL, k0, 0) - sw a3, cpl + sw a3, CI_CPL(k1) .set noat RESTORE_CPU_SREG(k0, 0) RESTORE_REG(a0, PC, k0, 0) @@ -521,8 +521,9 @@ LEAF(proc_trampoline, 0) * start at spl0 and with interrupts enabled, and these * won't ``return to userland''. */ - sw zero, cpl # lower to spl0 - lw t0, ipending + GET_CPU_INFO(t0, t1) + sw zero, CI_CPL(t0) # lower to spl0 + lw t0, CI_IPENDING(t0) beqz t0, 1f nop diff --git a/sys/arch/mips64/mips64/interrupt.c b/sys/arch/mips64/mips64/interrupt.c index 97aaedc3519..df8ec0ac5f1 100644 --- a/sys/arch/mips64/mips64/interrupt.c +++ b/sys/arch/mips64/mips64/interrupt.c @@ -1,4 +1,4 @@ -/* $OpenBSD: interrupt.c,v 1.41 2009/08/06 21:05:49 miod Exp $ */ +/* $OpenBSD: interrupt.c,v 1.42 2009/10/07 08:35:47 syuu Exp $ */ /* * Copyright (c) 2001-2004 Opsycon AB (www.opsycon.se / www.opsycon.com) @@ -58,9 +58,6 @@ static struct evcount soft_count; static int soft_irq = 0; -volatile intrmask_t cpl; -volatile intrmask_t ipending; - intrmask_t imask[NIPLS]; intrmask_t idle_mask; @@ -134,6 +131,7 @@ void interrupt(struct trap_frame *); void interrupt(struct trap_frame *trapframe) { + struct cpu_info *ci = curcpu(); u_int32_t pending; u_int32_t cause; int i; @@ -189,12 +187,12 @@ interrupt(struct trap_frame *trapframe) #endif xcpl = splsoft(); - if ((ipending & SINT_ALLMASK) & ~xcpl) { + if ((ci->ci_ipending & SINT_ALLMASK) & ~xcpl) { dosoftint(xcpl); } __asm__ (" .set noreorder\n"); - cpl = xcpl; + ci->ci_cpl = xcpl; __asm__ (" sync\n .set reorder\n"); } @@ -275,11 +273,12 @@ splinit() int splraise(int newcpl) { + struct cpu_info *ci = curcpu(); int oldcpl; __asm__ (" .set noreorder\n"); - oldcpl = cpl; - cpl = oldcpl | newcpl; + oldcpl = ci->ci_cpl; + ci->ci_cpl = oldcpl | newcpl; __asm__ (" sync\n .set reorder\n"); return (oldcpl); } @@ -287,11 +286,13 @@ splraise(int newcpl) void splx(int newcpl) { - if (ipending & ~newcpl) + struct cpu_info *ci = curcpu(); + + if (ci->ci_ipending & ~newcpl) (*pending_hand)(newcpl); else { __asm__ (" .set noreorder\n"); - cpl = newcpl; + ci->ci_cpl = newcpl; __asm__ (" sync\n .set reorder\n"); #ifdef IMASK_EXTERNAL hw_setintrmask(newcpl); @@ -302,9 +303,10 @@ splx(int newcpl) int spllower(int newcpl) { + struct cpu_info *ci = curcpu(); int oldcpl; - oldcpl = cpl; + oldcpl = ci->ci_cpl; splx(newcpl); return (oldcpl); } diff --git a/sys/arch/mips64/mips64/softintr.c b/sys/arch/mips64/mips64/softintr.c index 182d979466d..62c6f220780 100644 --- a/sys/arch/mips64/mips64/softintr.c +++ b/sys/arch/mips64/mips64/softintr.c @@ -1,4 +1,4 @@ -/* $OpenBSD: softintr.c,v 1.1 2009/03/20 18:41:06 miod Exp $ */ +/* $OpenBSD: softintr.c,v 1.2 2009/10/07 08:35:47 syuu Exp $ */ /* $NetBSD: softintr.c,v 1.2 2003/07/15 00:24:39 lukem Exp $ */ /* @@ -167,6 +167,7 @@ softintr_disestablish(void *arg) void softintr_schedule(void *arg) { + struct cpu_info *ci = curcpu(); struct soft_intrhand *sih = (struct soft_intrhand *)arg; struct soft_intrq *siq = sih->sih_siq; @@ -174,7 +175,7 @@ softintr_schedule(void *arg) if (sih->sih_pending == 0) { TAILQ_INSERT_TAIL(&siq->siq_list, sih, sih_list); sih->sih_pending = 1; - atomic_setbits_int(&ipending, SINTMASK(siq->siq_si)); + atomic_setbits_int(&ci->ci_ipending, SINTMASK(siq->siq_si)); } mtx_leave(&siq->siq_mtx); } @@ -201,10 +202,11 @@ netintr(void) void dosoftint(intrmask_t xcpl) { + struct cpu_info *ci = curcpu(); int sir, q, mask; - while ((sir = (ipending & SINT_ALLMASK & ~xcpl)) != 0) { - atomic_clearbits_int(&ipending, sir); + while ((sir = (ci->ci_ipending & SINT_ALLMASK & ~xcpl)) != 0) { + atomic_clearbits_int(&ci->ci_ipending, sir); for (q = SI_NQUEUES - 1; q >= 0; q--) { mask = SINTMASK(q); |