Enable __HAVE_PMAP_DIRECT on mips64, unless the kernel is configured to

run on R5000 family processors (e.g. sgi GENERIC-IP32), where direct XKPHYS
mappings hit a silicon bug.

2 files changed, 42 insertions, 2 deletions

diff --git a/sys/arch/mips64/include/pmap.h b/sys/arch/mips64/include/pmap.h
index ba19c5e643d..ee632dfcffa 100644
--- a/sys/arch/mips64/include/pmap.h
+++ b/sys/arch/mips64/include/pmap.h
@@ -1,4 +1,4 @@
-/*      $OpenBSD: pmap.h,v 1.21 2010/11/24 20:59:17 miod Exp $ */
+/*      $OpenBSD: pmap.h,v 1.22 2010/11/28 20:30:51 miod Exp $ */
 
 /*
  * Copyright (c) 1987 Carnegie-Mellon University
@@ -145,6 +145,23 @@ void pmap_update_kernel_page(vaddr_t, pt_entry_t);
 #else
 #define pmap_update_kernel_page(va, entry) tlb_update(va, entry)
 #endif
+
+/*
+ * Most R5000 processors (and related families) have a silicon bug preventing
+ * the ll/sc (and lld/scd) instructions from honouring the caching mode
+ * when accessing XKPHYS addresses.
+ *
+ * Since pool memory is allocated with pmap_map_direct() if __HAVE_PMAP_DIRECT,
+ * and many structures containing fields which will be used with
+ * <machine/atomic.h> routines are allocated from pools, __HAVE_PMAP_DIRECT can
+ * not be defined on systems which may use flawed processors.
+ */
+#if !defined(CPU_R5000) && !defined(CPU_RM7000)
+#define	__HAVE_PMAP_DIRECT
+vaddr_t	pmap_map_direct(vm_page_t);
+vm_page_t pmap_unmap_direct(vaddr_t);
+#endif
+
 #endif	/* _KERNEL */
 
 #endif	/* !_MIPS_PMAP_H_ */
diff --git a/sys/arch/mips64/mips64/pmap.c b/sys/arch/mips64/mips64/pmap.c
index fa10067705c..d404043f642 100644
--- a/sys/arch/mips64/mips64/pmap.c
+++ b/sys/arch/mips64/mips64/pmap.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pmap.c,v 1.50 2010/11/24 20:59:19 miod Exp $	*/
+/*	$OpenBSD: pmap.c,v 1.51 2010/11/28 20:30:54 miod Exp $	*/
 
 /*
  * Copyright (c) 2001-2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -1648,3 +1648,26 @@ pmap_proc_iflush(struct proc *p, vaddr_t va, vsize_t len)
 	Mips_InvalidateICache(curcpu(), va, len);
 #endif
 }
+
+#ifdef __HAVE_PMAP_DIRECT
+vaddr_t
+pmap_map_direct(vm_page_t pg)
+{
+	paddr_t pa = VM_PAGE_TO_PHYS(pg);
+	vaddr_t va = PHYS_TO_XKPHYS(pa, CCA_CACHED);
+
+	return va;
+}
+
+vm_page_t
+pmap_unmap_direct(vaddr_t va)
+{
+	paddr_t pa = XKPHYS_TO_PHYS(va);
+	vm_page_t pg = PHYS_TO_VM_PAGE(pa);
+
+	if (CpuCacheAliasMask)
+		Mips_HitInvalidateDCache(curcpu(), va, pa, PAGE_SIZE);
+
+	return pg;
+}
+#endif