diff options
author | Miod Vallat <miod@cvs.openbsd.org> | 2003-10-11 22:08:58 +0000 |
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committer | Miod Vallat <miod@cvs.openbsd.org> | 2003-10-11 22:08:58 +0000 |
commit | 57d2abb4c707e3cc3473d7afe7e191295d3dd748 (patch) | |
tree | 1e0922211e48024416c6954ba7d1fc429ac16e81 /sys/arch/mvme88k/dev/busswreg.h | |
parent | f98251456fb2389246c3c5003d861df01903ab0b (diff) |
Nuke trailing whitespace.
Diffstat (limited to 'sys/arch/mvme88k/dev/busswreg.h')
-rw-r--r-- | sys/arch/mvme88k/dev/busswreg.h | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/sys/arch/mvme88k/dev/busswreg.h b/sys/arch/mvme88k/dev/busswreg.h index 7ae067e298f..ab7e8158bd7 100644 --- a/sys/arch/mvme88k/dev/busswreg.h +++ b/sys/arch/mvme88k/dev/busswreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: busswreg.h,v 1.3 2001/12/19 04:02:25 smurph Exp $ */ +/* $OpenBSD: busswreg.h,v 1.4 2003/10/11 22:08:57 miod Exp $ */ /* * Memory map for BusSwitch chip found in mvme197 boards. @@ -126,11 +126,11 @@ struct bussw_reg { #define BS_XCC_FBSY 0x00000004 #define BS_XCC_DIAG 0x00000008 -/* - * INTR1 - Abort Control Register - * Cross Processor Interrupt Register - * Timer Interrupt 1 Register - * Timer Interrupt 2 Register +/* + * INTR1 - Abort Control Register + * Cross Processor Interrupt Register + * Timer Interrupt 1 Register + * Timer Interrupt 2 Register */ #define BS_INTR1_ABORT_ICLR 0x08000000 /* abort interrupt clear */ #define BS_INTR1_ABORT_IEN 0x10000000 /* abort interrupt enable */ @@ -163,11 +163,11 @@ struct bussw_reg { #define BS_VBASE_SRC_EXT 0x4 /* external interrupt */ #define BS_VBASE_SRC_SPUR 0x7 /* spurious interrupt */ -/* - * INTR2 - Write Post Control Register - * Processor Address Log Interrupt Register - * External Interrupt Register - * Vector Base +/* + * INTR2 - Write Post Control Register + * Processor Address Log Interrupt Register + * External Interrupt Register + * Vector Base */ #define BS_INTR2_WPINT_ICLR 0x08000000 /* WPINT interrupt clear */ #define BS_INTR2_WPINT_IEN 0x10000000 /* WPINT interrupt enable */ |