Kill struct md_p, which was really only necessary for mvme88k; on

luna88k it disappears completely, while mvme88k keeps 3 global variables,
one of them scheduled to disappear very soon.

1 files changed, 83 insertions, 103 deletions

diff --git a/sys/arch/mvme88k/dev/clock.c b/sys/arch/mvme88k/dev/clock.c
index a68832f3242..50436c966a2 100644
--- a/sys/arch/mvme88k/dev/clock.c
+++ b/sys/arch/mvme88k/dev/clock.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: clock.c,v 1.42 2004/08/25 21:47:54 miod Exp $ */
+/*	$OpenBSD: clock.c,v 1.43 2004/11/08 16:39:31 miod Exp $ */
 /*
  * Copyright (c) 1999 Steve Murphree, Jr.
  * Copyright (c) 1995 Theo de Raadt
@@ -105,10 +105,8 @@
 int	clockmatch(struct device *, void *, void *);
 void	clockattach(struct device *, struct device *, void *);
 
-void	sbc_initclock(void);
-void	sbc_initstatclock(void);
-void	m188_initclock(void);
-void	m188_initstatclock(void);
+void	sbc_init_clocks(void);
+void	m188_init_clocks(void);
 void	m188_cio_init(unsigned);
 u_int	read_cio(int);
 void	write_cio(int, u_int);
@@ -193,14 +191,13 @@ clockattach(struct device *parent, struct device *self, void *args)
 		sc->sc_profih.ih_ipl = ca->ca_ipl;
 		prof_reset = ca->ca_ipl | PCC2_IRQ_IEN | PCC2_IRQ_ICLR;
 		pcctwointr_establish(PCC2V_TIMER1, &sc->sc_profih, "clock");
-		md.clock_init_func = sbc_initclock;
 		sc->sc_statih.ih_fn = sbc_statintr;
 		sc->sc_statih.ih_arg = 0;
 		sc->sc_statih.ih_wantframe = 1;
 		sc->sc_statih.ih_ipl = ca->ca_ipl;
 		stat_reset = ca->ca_ipl | PCC2_IRQ_IEN | PCC2_IRQ_ICLR;
 		pcctwointr_establish(PCC2V_TIMER2, &sc->sc_statih, "stat");
-		md.statclock_init_func = sbc_initstatclock;
+		md_init_clocks = sbc_init_clocks;
 		break;
 #endif /* NPCCTWO */
 #if NSYSCON > 0
@@ -210,13 +207,12 @@ clockattach(struct device *parent, struct device *self, void *args)
 		sc->sc_profih.ih_wantframe = 1;
 		sc->sc_profih.ih_ipl = ca->ca_ipl;
 		sysconintr_establish(SYSCV_TIMER2, &sc->sc_profih, "clock");
-		md.clock_init_func = m188_initclock;
 		sc->sc_statih.ih_fn = m188_statintr;
 		sc->sc_statih.ih_arg = 0;
 		sc->sc_statih.ih_wantframe = 1;
 		sc->sc_statih.ih_ipl = ca->ca_ipl;
 		sysconintr_establish(SYSCV_TIMER1, &sc->sc_statih, "stat");
-		md.statclock_init_func = m188_initstatclock;
+		md_init_clocks = m188_init_clocks;
 		break;
 #endif /* NSYSCON */
 	}
@@ -227,15 +223,16 @@ clockattach(struct device *parent, struct device *self, void *args)
 #if NPCCTWO > 0
 
 void
-sbc_initclock(void)
+sbc_init_clocks(void)
 {
-#ifdef CLOCK_DEBUG
-	printf("SBC clock init\n");
-#endif
+	int statint, minint;
+
+#ifdef DIAGNOSTIC
 	if (1000000 % hz) {
 		printf("cannot get %d Hz clock; using 100 Hz\n", hz);
 		hz = 100;
 	}
+#endif
 	tick = 1000000 / hz;
 
 	/* profclock */
@@ -247,41 +244,15 @@ sbc_initclock(void)
 	    PCC2_TCTL_CEN | PCC2_TCTL_COC | PCC2_TCTL_COVF;
 	*(volatile u_int8_t *)(OBIO_START + PCC2_BASE + PCCTWO_T1ICR) =
 	    prof_reset;
-}
-
-/*
- * clockintr: ack intr and call hardclock
- */
-int
-sbc_clockintr(void *eframe)
-{
-	*(volatile u_int8_t *)(OBIO_START + PCC2_BASE + PCCTWO_T1ICR) =
-	    prof_reset;
-
-	intrcnt[M88K_CLK_IRQ]++;
-
-	hardclock(eframe);
-#if NBUGTTY > 0
-	bugtty_chkinput();
-#endif /* NBUGTTY */
-
-	return (1);
-}
 
-void
-sbc_initstatclock(void)
-{
-	int statint, minint;
-
-#ifdef CLOCK_DEBUG
-	printf("SBC statclock init\n");
-#endif
 	if (stathz == 0)
 		stathz = hz;
+#ifdef DIAGNOSTIC
 	if (1000000 % stathz) {
 		printf("cannot get %d Hz statclock; using 100 Hz\n", stathz);
 		stathz = 100;
 	}
+#endif
 	profhz = stathz;		/* always */
 
 	statint = 1000000 / stathz;
@@ -302,6 +273,25 @@ sbc_initstatclock(void)
 	statmin = statint - (statvar >> 1);
 }
 
+/*
+ * clockintr: ack intr and call hardclock
+ */
+int
+sbc_clockintr(void *eframe)
+{
+	*(volatile u_int8_t *)(OBIO_START + PCC2_BASE + PCCTWO_T1ICR) =
+	    prof_reset;
+
+	intrcnt[M88K_CLK_IRQ]++;
+
+	hardclock(eframe);
+#if NBUGTTY > 0
+	bugtty_chkinput();
+#endif /* NBUGTTY */
+
+	return (1);
+}
+
 int
 sbc_statintr(void *eframe)
 {
@@ -372,6 +362,58 @@ sbc_statintr(void *eframe)
  * counters interrupt at the same time...
  */
 
+void
+m188_init_clocks(void)
+{
+	volatile u_int32_t imr;
+	int statint, minint;
+
+#ifdef DIAGNOSTIC
+	if (1000000 % hz) {
+		printf("cannot get %d Hz clock; using 100 Hz\n", hz);
+		hz = 100;
+	}
+#endif
+	tick = 1000000 / hz;
+
+	simple_lock_init(&cio_lock);
+	m188_cio_init(tick);
+
+	if (stathz == 0)
+		stathz = hz;
+#ifdef DIAGNOSTIC
+	if (1000000 % stathz) {
+		printf("cannot get %d Hz statclock; using 100 Hz\n", stathz);
+		stathz = 100;
+	}
+#endif
+	profhz = stathz;		/* always */
+
+	/*
+	 * The DUART runs at 3.6864 MHz, CT#1 will run in PCLK/16 mode.
+	 */
+	statint = (3686400 / 16) / stathz;
+	minint = statint / 2 + 100;
+	while (statvar > minint)
+		statvar >>= 1;
+	statmin = statint - (statvar >> 1);
+
+	/* clear the counter/timer output OP3 while we program the DART */
+	*(volatile u_int32_t *)DART_OPCR = 0x00;
+	/* set interrupt vec */
+	*(volatile u_int32_t *)DART_IVR = SYSCON_VECT + SYSCV_TIMER1;
+	/* do the stop counter/timer command */
+	imr = *(volatile u_int32_t *)DART_STOPC;
+	/* set counter/timer to counter mode, PCLK/16 */
+	*(volatile u_int32_t *)DART_ACR = 0x30;
+	*(volatile u_int32_t *)DART_CTUR = (statint >> 8);
+	*(volatile u_int32_t *)DART_CTLR = (statint & 0xff);
+	/* set the counter/timer output OP3 */
+	*(volatile u_int32_t *)DART_OPCR = 0x04;
+	/* give the start counter/timer command */
+	imr = *(volatile u_int32_t *)DART_STARTC;
+}
+
 int
 m188_clockintr(void *eframe)
 {
@@ -391,24 +433,6 @@ m188_clockintr(void *eframe)
 	return (1);
 }
 
-void
-m188_initclock(void)
-{
-#ifdef CLOCK_DEBUG
-	printf("VME188 clock init\n");
-#endif
-#ifdef DIAGNOSTIC
-	if (1000000 % hz) {
-		printf("cannot get %d Hz clock; using 100 Hz\n", hz);
-		hz = 100;
-	}
-#endif
-	tick = 1000000 / hz;
-
-	simple_lock_init(&cio_lock);
-	m188_cio_init(tick);
-}
-
 int
 m188_statintr(void *eframe)
 {
@@ -441,50 +465,6 @@ m188_statintr(void *eframe)
 	return (1);
 }
 
-void
-m188_initstatclock(void)
-{
-	volatile u_int32_t imr;
-	int statint, minint;
-
-#ifdef CLOCK_DEBUG
-	printf("VME188 statclock init\n");
-#endif
-	if (stathz == 0)
-		stathz = hz;
-#ifdef DIAGNOSTIC
-	if (1000000 % stathz) {
-		printf("cannot get %d Hz statclock; using 100 Hz\n", stathz);
-		stathz = 100;
-	}
-#endif
-	profhz = stathz;		/* always */
-
-	/*
-	 * The DUART runs at 3.6864 MHz, CT#1 will run in PCLK/16 mode.
-	 */
-	statint = (3686400 / 16) / stathz;
-	minint = statint / 2 + 100;
-	while (statvar > minint)
-		statvar >>= 1;
-	statmin = statint - (statvar >> 1);
-
-	/* clear the counter/timer output OP3 while we program the DART */
-	*(volatile u_int32_t *)DART_OPCR = 0x00;
-	/* set interrupt vec */
-	*(volatile u_int32_t *)DART_IVR = SYSCON_VECT + SYSCV_TIMER1;
-	/* do the stop counter/timer command */
-	imr = *(volatile u_int32_t *)DART_STOPC;
-	/* set counter/timer to counter mode, PCLK/16 */
-	*(volatile u_int32_t *)DART_ACR = 0x30;
-	*(volatile u_int32_t *)DART_CTUR = (statint >> 8);
-	*(volatile u_int32_t *)DART_CTLR = (statint & 0xff);
-	/* set the counter/timer output OP3 */
-	*(volatile u_int32_t *)DART_OPCR = 0x04;
-	/* give the start counter/timer command */
-	imr = *(volatile u_int32_t *)DART_STARTC;
-}
-
 /* Write CIO register */
 void
 write_cio(int reg, u_int val)