Allow userland to cause the data cache to be flushed for any arbitrary address

range in the current process, using trap #451.

This is necessary for proper gcc trampolines operation, and, later, ld.so...

1 files changed, 2 insertions, 2 deletions

diff --git a/sys/arch/mvme88k/dev/vs.c b/sys/arch/mvme88k/dev/vs.c
index dc9576218a4..3c570d1384f 100644
--- a/sys/arch/mvme88k/dev/vs.c
+++ b/sys/arch/mvme88k/dev/vs.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: vs.c,v 1.54 2005/04/27 14:07:38 miod Exp $	*/
+/*	$OpenBSD: vs.c,v 1.55 2005/04/27 14:09:45 miod Exp $	*/
 
 /*
  * Copyright (c) 2004, Miodrag Vallat.
@@ -408,7 +408,7 @@ vs_scsicmd(struct scsi_xfer *xs)
 	 * to flush the cache for a write and flush with inval for
 	 * a read, prior to starting the IO.
 	 */
-	dma_cachectl((vaddr_t)xs->data, xs->datalen,
+	dma_cachectl(pmap_kernel(), (vaddr_t)xs->data, xs->datalen,
 	    flags & SCSI_DATA_IN ? DMA_CACHE_SYNC_INVAL : DMA_CACHE_SYNC);
 	
 	option = 0;