diff options
| author | Miod Vallat <miod@cvs.openbsd.org> | 2007-12-21 23:56:55 +0000 |
|---|---|---|
| committer | Miod Vallat <miod@cvs.openbsd.org> | 2007-12-21 23:56:55 +0000 |
| commit | e75943d8996c486b5a5e70675a74ece6ff708469 (patch) | |
| tree | 4d9b49965be76cb7b2a953145ab9386961af86d2 /sys/arch/mvme88k | |
| parent | 896826fa125e5d339a36662fdda6b10d51e8cc87 (diff) | |
Change the EF_xxx constants to be real offsets within the trapframe, instead
of offsets / sizeof(register_t), and nuke the REG_OFF macro. No functional
change.
Diffstat (limited to 'sys/arch/mvme88k')
| -rw-r--r-- | sys/arch/mvme88k/mvme88k/eh.S | 50 |
1 files changed, 25 insertions, 25 deletions
diff --git a/sys/arch/mvme88k/mvme88k/eh.S b/sys/arch/mvme88k/mvme88k/eh.S index 0fbb193b838..283c68e6e97 100644 --- a/sys/arch/mvme88k/mvme88k/eh.S +++ b/sys/arch/mvme88k/mvme88k/eh.S @@ -1,4 +1,4 @@ -/* $OpenBSD: eh.S,v 1.66 2006/11/19 11:08:55 miod Exp $ */ +/* $OpenBSD: eh.S,v 1.67 2007/12/21 23:56:54 miod Exp $ */ /* * Copyright (c) 2006, Miodrag Vallat * @@ -49,11 +49,11 @@ ENTRY(pfsr_save_187) ld TMP2, TMP, CI_PFSR_I0 ld TMP3, TMP2, r0 - st TMP3, r31, REG_OFF(EF_IPFSR) + st TMP3, r31, EF_IPFSR ld TMP2, TMP, CI_PFSR_D0 ld TMP3, TMP2, r0 br.n _ASM_LABEL(pfsr_done) - st TMP3, r31, REG_OFF(EF_DPFSR) + st TMP3, r31, EF_DPFSR #endif #ifdef MVME188 @@ -83,47 +83,47 @@ ENTRY(pfsr_save_188_quad) * handle a bunch of CMMU faults at once in trap.c. */ or.u TMP, r0, hi16(VME_CMMU_I0) - ld TMP2, TMP, lo16(VME_CMMU_I0) + REG_OFF(CMMU_PFSR) + ld TMP2, TMP, lo16(VME_CMMU_I0) + CMMU_PFSR * 4 extu TMP3, TMP2, 3<16> bcnd.n ne0, TMP3, 1f - st r0, TMP, lo16(VME_CMMU_I0) + REG_OFF(CMMU_PFSR) + st r0, TMP, lo16(VME_CMMU_I0) + CMMU_PFSR * 4 or.u TMP, r0, hi16(VME_CMMU_I1) - ld TMP2, TMP, lo16(VME_CMMU_I1) + REG_OFF(CMMU_PFSR) + ld TMP2, TMP, lo16(VME_CMMU_I1) + CMMU_PFSR * 4 extu TMP3, TMP2, 3<16> bcnd.n ne0, TMP3, 1f - st r0, TMP, lo16(VME_CMMU_I1) + REG_OFF(CMMU_PFSR) + st r0, TMP, lo16(VME_CMMU_I1) + CMMU_PFSR * 4 or.u TMP, r0, hi16(VME_CMMU_I2) - ld TMP2, TMP, lo16(VME_CMMU_I2) + REG_OFF(CMMU_PFSR) + ld TMP2, TMP, lo16(VME_CMMU_I2) + CMMU_PFSR * 4 extu TMP3, TMP2, 3<16> bcnd.n ne0, TMP3, 1f - st r0, TMP, lo16(VME_CMMU_I2) + REG_OFF(CMMU_PFSR) + st r0, TMP, lo16(VME_CMMU_I2) + CMMU_PFSR * 4 or.u TMP, r0, hi16(VME_CMMU_I3) - ld TMP2, TMP, lo16(VME_CMMU_I3) + REG_OFF(CMMU_PFSR) - st r0, TMP, lo16(VME_CMMU_I3) + REG_OFF(CMMU_PFSR) + ld TMP2, TMP, lo16(VME_CMMU_I3) + CMMU_PFSR * 4 + st r0, TMP, lo16(VME_CMMU_I3) + CMMU_PFSR * 4 1: - st TMP2, r31, REG_OFF(EF_IPFSR) + st TMP2, r31, EF_IPFSR or.u TMP, r0, hi16(VME_CMMU_D0) - ld TMP2, TMP, lo16(VME_CMMU_D0) + REG_OFF(CMMU_PFSR) + ld TMP2, TMP, lo16(VME_CMMU_D0) + CMMU_PFSR * 4 extu TMP3, TMP2, 3<16> bcnd.n ne0, TMP3, 2f - st r0, TMP, lo16(VME_CMMU_D0) + REG_OFF(CMMU_PFSR) + st r0, TMP, lo16(VME_CMMU_D0) + CMMU_PFSR * 4 or.u TMP, r0, hi16(VME_CMMU_D1) - ld TMP2, TMP, lo16(VME_CMMU_D1) + REG_OFF(CMMU_PFSR) + ld TMP2, TMP, lo16(VME_CMMU_D1) + CMMU_PFSR * 4 extu TMP3, TMP2, 3<16> bcnd.n ne0, TMP3, 2f - st r0, TMP, lo16(VME_CMMU_D1) + REG_OFF(CMMU_PFSR) + st r0, TMP, lo16(VME_CMMU_D1) + CMMU_PFSR * 4 or.u TMP, r0, hi16(VME_CMMU_D2) - ld TMP2, TMP, lo16(VME_CMMU_D2) + REG_OFF(CMMU_PFSR) + ld TMP2, TMP, lo16(VME_CMMU_D2) + CMMU_PFSR * 4 extu TMP3, TMP2, 3<16> bcnd.n ne0, TMP3, 2f - st r0, TMP, lo16(VME_CMMU_D2) + REG_OFF(CMMU_PFSR) + st r0, TMP, lo16(VME_CMMU_D2) + CMMU_PFSR * 4 or.u TMP, r0, hi16(VME_CMMU_D3) - ld TMP2, TMP, lo16(VME_CMMU_D3) + REG_OFF(CMMU_PFSR) - st r0, TMP, lo16(VME_CMMU_D3) + REG_OFF(CMMU_PFSR) + ld TMP2, TMP, lo16(VME_CMMU_D3) + CMMU_PFSR * 4 + st r0, TMP, lo16(VME_CMMU_D3) + CMMU_PFSR * 4 2: br.n _ASM_LABEL(pfsr_done) - st TMP2, r31, REG_OFF(EF_DPFSR) + st TMP2, r31, EF_DPFSR ENTRY(pfsr_save_188_double) /* @@ -143,7 +143,7 @@ ENTRY(pfsr_save_188_double) 1: ld TMP3, TMP2, r0 st r0, TMP2, r0 - st TMP3, r31, REG_OFF(EF_IPFSR) + st TMP3, r31, EF_IPFSR ld TMP2, TMP, CI_PFSR_D0 ld TMP3, TMP2, r0 @@ -155,7 +155,7 @@ ENTRY(pfsr_save_188_double) ld TMP3, TMP2, r0 st r0, TMP2, r0 br.n _ASM_LABEL(pfsr_done) - st TMP3, r31, REG_OFF(EF_DPFSR) + st TMP3, r31, EF_DPFSR ENTRY(pfsr_save_188_straight) /* @@ -165,10 +165,10 @@ ENTRY(pfsr_save_188_straight) */ ld TMP2, TMP, CI_PFSR_I0 ld TMP3, TMP2, r0 - st TMP3, r31, REG_OFF(EF_IPFSR) + st TMP3, r31, EF_IPFSR ld TMP2, TMP, CI_PFSR_D0 ld TMP3, TMP2, r0 br.n _ASM_LABEL(pfsr_done) - st TMP3, r31, REG_OFF(EF_DPFSR) + st TMP3, r31, EF_DPFSR #endif /* MVME188 */ |