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authorMiod Vallat <miod@cvs.openbsd.org>2003-10-05 20:24:20 +0000
committerMiod Vallat <miod@cvs.openbsd.org>2003-10-05 20:24:20 +0000
commit19c8093cf1709730e5210400ee3b336e5b338f4b (patch)
tree70def39918be03e176dc943679828084800b057e /sys/arch/mvme88k
parentd98cf5a8239e586a5ebd9cdef5df594e469ee60c (diff)
typos
Diffstat (limited to 'sys/arch/mvme88k')
-rw-r--r--sys/arch/mvme88k/dev/dartreg.h14
-rw-r--r--sys/arch/mvme88k/include/m88100.h18
2 files changed, 16 insertions, 16 deletions
diff --git a/sys/arch/mvme88k/dev/dartreg.h b/sys/arch/mvme88k/dev/dartreg.h
index ddc3750d5e4..45b14208048 100644
--- a/sys/arch/mvme88k/dev/dartreg.h
+++ b/sys/arch/mvme88k/dev/dartreg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: dartreg.h,v 1.3 2001/07/04 08:09:22 niklas Exp $ */
+/* $OpenBSD: dartreg.h,v 1.4 2003/10/05 20:24:10 miod Exp $ */
/*
* Something to put append a 'U' to a long constant if it's C so that
@@ -39,7 +39,7 @@
/* the access to the same command register must be delayed,
because the chip has some hardware problems in this case */
-#define DELAY_CR { volatile register int i; for ( i=0; i<250; ++i ); }
+#define DELAY_CR do { volatile int i; for (i = 0; i < 250; ++i); } while (0)
/*********************** MC68681 DEFINITIONS ************************/
#define PORTOFFSET 0x10 /* offset for port b address space */
@@ -109,7 +109,7 @@
#define FFULL 0x02 /* receiver FIFO full */
#define RXRDY 0x01 /* receiver ready */
-/* output port configuration register: OPCR operations */
+/* output port configuration register: OPCR operations */
#define OPSET 0x00 /* set all op lines to op function */
#define OPSETTO 0x04 /* use OP3 for timer output */
@@ -160,7 +160,7 @@
#define CSRA 1 /* clock-select register a*/
#define CRA 2 /* command register a */
#define TBA 3 /* transmitter buffer a */
-#define ACR 4 /* auxialiary control register*/
+#define ACR 4 /* auxiliary control register*/
#define IMR 5 /* interrupt mask register */
#define CTUR 6 /* counter/timer upper reg */
#define CTLR 7 /* counter/timer lower reg */
@@ -188,7 +188,7 @@ struct dart_rd_reg
volatile unsigned int rd_ipcr; /* input port change register */
volatile unsigned int rd_isr; /* interrupt status register */
volatile unsigned int rd_cur; /* current MSB of counter */
- volatile unsigned int rd_clr; /* current LSB of counter */
+ volatile unsigned int rd_clr; /* current LSB of counter */
volatile unsigned int rd_mrb; /* mode register b */
volatile unsigned int rd_srb; /* status register b*/
volatile unsigned int dummyxb; /* do not access */
@@ -208,7 +208,7 @@ struct dart_wr_reg
volatile unsigned int wr_csra; /* clock-select register a*/
volatile unsigned int wr_cra; /* command register a */
volatile unsigned int wr_tba; /* transmitter buffer a */
- volatile unsigned int wr_acr; /* auxialiary control register*/
+ volatile unsigned int wr_acr; /* auxiliary control register*/
volatile unsigned int wr_imr; /* interrupt mask register */
volatile unsigned int wr_ctur; /* counter/timer upper reg */
volatile unsigned int wr_ctlr; /* counter/timer lower reg */
@@ -271,7 +271,7 @@ struct dart_sv_reg
volatile unsigned char sv_mr2[MAXPORTS]; /* mode register 2 a */
volatile unsigned char sv_csr[MAXPORTS]; /* clock-select register a*/
volatile unsigned char sv_cr[MAXPORTS]; /* command register a */
- volatile unsigned char sv_acr; /* auxialiary control register*/
+ volatile unsigned char sv_acr; /* auxiliary control register*/
volatile unsigned char sv_imr; /* interrupt mask register */
volatile unsigned char sv_ivr; /* interrupt vector register */
};
diff --git a/sys/arch/mvme88k/include/m88100.h b/sys/arch/mvme88k/include/m88100.h
index cf5b66e8c60..04f6c612ac0 100644
--- a/sys/arch/mvme88k/include/m88100.h
+++ b/sys/arch/mvme88k/include/m88100.h
@@ -1,27 +1,27 @@
-/* $OpenBSD: m88100.h,v 1.10 2003/09/26 23:37:02 miod Exp $ */
-/*
+/* $OpenBSD: m88100.h,v 1.11 2003/10/05 20:24:19 miod Exp $ */
+/*
* Mach Operating System
* Copyright (c) 1993-1992 Carnegie Mellon University
* All Rights Reserved.
- *
+ *
* Permission to use, copy, modify and distribute this software and its
* documentation is hereby granted, provided that both the copyright
* notice and this permission notice appear in all copies of the
* software, derivative works or modified versions, and any portions
* thereof, and that both notices appear in supporting documentation.
- *
+ *
* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
* ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- *
+ *
* Carnegie Mellon requests users of this software to return to
- *
+ *
* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
* School of Computer Science
* Carnegie Mellon University
* Pittsburgh PA 15213-3890
- *
- * any improvements or extensions that they make and grant Carnegie Mellon
+ *
+ * any improvements or extensions that they make and grant Carnegie Mellon
* the rights to redistribute these changes.
*/
@@ -36,7 +36,7 @@
* DMT0, DMT1, DMT2 layout
*
* The DMT_SKIP bit is never set by the cpu. It is used to mark 'known'
- * transactions so that they don't get prosessed a second time by
+ * transactions so that they don't get processed a second time by
* data_access_emulation().
*/
#define DMT_SKIP 0x00010000 /* skip this dmt */