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authorMiod Vallat <miod@cvs.openbsd.org>2009-02-14 17:39:52 +0000
committerMiod Vallat <miod@cvs.openbsd.org>2009-02-14 17:39:52 +0000
commit6bb1f9f28218a81cec05e8039eac5289b9004965 (patch)
tree1896e96933a048c267fb22f53dfcfa278ed40c9f /sys/arch/mvme88k
parente68f801000ba2b6f90ef0350797b51b7b2482257 (diff)
Fix a few defines.
Diffstat (limited to 'sys/arch/mvme88k')
-rw-r--r--sys/arch/mvme88k/dev/busswreg.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/sys/arch/mvme88k/dev/busswreg.h b/sys/arch/mvme88k/dev/busswreg.h
index c806110c000..2354e61bfcf 100644
--- a/sys/arch/mvme88k/dev/busswreg.h
+++ b/sys/arch/mvme88k/dev/busswreg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: busswreg.h,v 1.12 2009/02/13 23:28:05 miod Exp $ */
+/* $OpenBSD: busswreg.h,v 1.13 2009/02/14 17:39:51 miod Exp $ */
/*
* Memory map for BusSwitch chip found in mvme197 boards.
@@ -166,7 +166,7 @@
#define BS_WPINT_LEVEL(x) (x & BS_WPINT_LM)
/* Processor Address Log Interrupt Register */
-#define BS_PALINT_ICLR 0x00 /* PALINT interrupt clear */
+#define BS_PALINT_ICLR 0x08 /* PALINT interrupt clear */
#define BS_PALINT_IEN 0x10 /* PALINT interrupt enable */
#define BS_PALINT_INT 0x20 /* PALINT interrupt received */
#define BS_PALINT_PLTY 0x80 /* PALINT polarity */
@@ -174,7 +174,7 @@
#define BS_PALINT_LEVEL(x) (x & BS_PALINT_LM)
/* External Interrupt Register */
-#define BS_XINT_ICLR 0x00 /* XINT interrupt clear */
+#define BS_XINT_ICLR 0x08 /* XINT interrupt clear */
#define BS_XINT_IEN 0x10 /* XINT interrupt enable */
#define BS_XINT_INT 0x20 /* XINT interrupt received */
#define BS_XINT_EL 0x40 /* XINT edge/level */